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    • 91. 发明申请
    • EEPROM CELL
    • EEPROM单元
    • US20120074483A1
    • 2012-03-29
    • US12888437
    • 2010-09-23
    • Sung Mun JUNGKian Hong LIMJianbo YANGSwee Tuck WOOSanford CHU
    • Sung Mun JUNGKian Hong LIMJianbo YANGSwee Tuck WOOSanford CHU
    • H01L29/788H01L21/336
    • H01L29/7881G11C16/0433H01L21/28273H01L27/11521H01L27/11524H01L29/66825
    • A method of forming a device is disclosed. The method includes providing a substrate prepared with a cell area and forming first and second gates of first and second transistors in the cell area. The first gate includes a second sub-gate surrounding a first sub-gate. The first and second sub-gates of the first gate are separated by a first intergate dielectric layer. The second gate includes a second sub-gate surrounding a first sub-gate. The first and second sub-gates of the second gate are separated by a second intergate dielectric layer. The method also includes forming first and second junctions of the first and second transistors. A first gate terminal is formed and coupled to the second sub-gate of the first transistor. A second gate terminal is formed and coupled to at least the first sub-gate of the second transistor.
    • 公开了一种形成装置的方法。 该方法包括提供准备有单元区域的基板,并在单元区域中形成第一和第二晶体管的第一和第二栅极。 第一栅极包括围绕第一子栅极的第二子栅极。 第一栅极的第一和第二子栅极由第一栅极介电层分开。 第二栅极包括围绕第一子栅极的第二子栅极。 第二栅极的第一和第二子栅极由第二栅极间介电层分开。 该方法还包括形成第一和第二晶体管的第一和第二结。 第一栅极端子形成并耦合到第一晶体管的第二子栅极。 第二栅极端子形成并耦合到至少第二晶体管的第一子栅极。