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1. 发明授权

US5270565A Electro-static discharge protection circuit with bimodal resistance characteristics 失效
标题翻译：具有双峰电阻特性的静电放电保护电路
公开(公告)号：US5270565A
公开(公告)日：1993-12-14
申请号：US708790
申请日：1991-05-30
申请人： Kwok Fai V. Lee , Alan Lee , Melvin L. Marmet , Kenneth W. Ouyang
发明人： Kwok Fai V. Lee , Alan Lee , Melvin L. Marmet , Kenneth W. Ouyang
IPC分类号： H01L27/02 , H01L29/06 , H01L29/78
CPC分类号： H01L27/0288 , H01L27/0266 , H01L29/7835 , H01L27/0251
摘要： An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.
摘要翻译：采用具有与输入/输出缓冲电路串联的双峰电阻特性的扩展电阻结构和集成电路上的输入/输出电接触焊盘的静电放电保护电路。扩展电阻结构与缓冲电路中的器件或器件整体形成，由于ESD击穿效应而容易受到损坏。在正常电路操作期间的第一电阻模式中，电阻器具有低电阻值，并且几乎不引入额外的负载输入/输出缓冲电路。在ESD放电期间的第二工作模式中，电阻器具有第二显着更高的电阻，其在ESD事件期间减小电流值，从而保护缓冲电路。厚氧化物回夹装置也用于提供具有低功耗的并联ESD放电路径。

2. 发明授权

US5051860A Electro-static discharge protection circuit with bimodal resistance characteristics 失效
标题翻译：具有双峰电阻特性的静电放电保护电路
公开(公告)号：US5051860A
公开(公告)日：1991-09-24
申请号：US351670
申请日：1989-05-12
申请人： Kowk Fai V. Lee , Alan Lee , Melvin L. Marmet , Kenneth W. Ouyang
发明人： Kowk Fai V. Lee , Alan Lee , Melvin L. Marmet , Kenneth W. Ouyang
IPC分类号： H01L27/02
CPC分类号： H01L27/0266 , H01L27/0288
摘要： An electrostatic discharge protection circuit employing an extended resistive structure having bimodal resistance characteristics in series with an input/output buffer circuit and an input/output electrical contact pad on an integrated circuit. The extended resistive structure is integrally formed with the device or devices in the buffer circuit most susceptible to damage due to ESD breakdown effects. In a first resistance mode during normal circuit operations, the resistor has a low resistance value and introduces virtually no additional load to the input/output buffer circuitry. In a second mode of operation during ESD discharge, the resistor has a second significantly higher resistance which reduces current values during the ESD event thereby protecting the buffer circuit. Thick oxide snap-back device is also employed to provide a parallel ESD discharge path with low power dissipation.
摘要翻译：采用具有与输入/输出缓冲电路串联的双峰电阻特性的扩展电阻结构和集成电路上的输入/输出电接触焊盘的静电放电保护电路。扩展电阻结构与缓冲电路中的器件或器件整体形成，由于ESD击穿效应而容易受到损坏。在正常电路操作期间的第一电阻模式中，电阻器具有低电阻值，并且实际上不向输入/输出缓冲器电路引入额外的负载。在ESD放电期间的第二工作模式中，电阻器具有第二显着更高的电阻，其在ESD事件期间减小电流值，从而保护缓冲电路。厚氧化物回夹装置也用于提供具有低功耗的并联ESD放电路径。

3. 发明授权

US5173755A Capacitively induced electrostatic discharge protection circuit 失效
标题翻译：电容式感应静电放电保护电路
公开(公告)号：US5173755A
公开(公告)日：1992-12-22
申请号：US711101
申请日：1991-06-03
申请人： Ramon Co , Kwok Fai V. Lee , Kenneth W. Ouyang
发明人： Ramon Co , Kwok Fai V. Lee , Kenneth W. Ouyang
IPC分类号： H01L27/02
CPC分类号： H01L27/0251
摘要： An integrated circuit electrostatic discharge (ESD) protection circuit employs a capacitor and a zener diode to trigger a thick oxide ESD shunt field effect transistor (FET). When an ESD induced voltage at an input or output node reaches the turn-on voltage determined by the zener diode breakdown voltage, the shunting transistor is turned on by current capacitively coupled to the base of the parasitic bipolar transistor inherently formed in the thick oxide FET. The parasitic bipolar transistor is turned on in its saturated mode, substantially shorting the node to ground. At the end of the ESD event when the ESD induced current is no longer sufficient to keep the shunting transistor in its saturated mode, the shunting transistor turns off and the ESD protection circuit returns to its off mode, monitoring the input or output node for the occurrence of another ESD event.
摘要翻译：集成电路静电放电（ESD）保护电路采用电容器和齐纳二极管来触发厚氧化物ESD分流场效应晶体管（FET）。当输入或输出节点处的ESD感应电压达到由齐纳二极管击穿电压确定的接通电压时，分流晶体管通过电容耦合到固有地形成在厚氧化物FET中的寄生双极晶体管的基极的电流导通。寄生双极晶体管在饱和模式下导通，实质上使节点接地短路。在静电放电事件结束时，ESD感应电流不足以使分流晶体管保持饱和模式，分流晶体管截止，ESD保护电路恢复到关闭模式，监视输入或输出节点发生另一个ESD事件。

4. 发明授权

US4947063A Method and apparatus for reducing transient noise in integrated circuits 失效
标题翻译：降低集成电路瞬态噪声的方法和装置
公开(公告)号：US4947063A
公开(公告)日：1990-08-07
申请号：US161469
申请日：1988-02-26
申请人： Timothy G. O'Shaughnessy , David K. Chung , Richard W. Hull , Kenneth W. Ouyang , Victor G. Pierotti , Joseph A. Souza
发明人： Timothy G. O'Shaughnessy , David K. Chung , Richard W. Hull , Kenneth W. Ouyang , Victor G. Pierotti , Joseph A. Souza
IPC分类号： H03K17/16 , H03K19/003
CPC分类号： H03K17/166 , H03K17/163 , H03K19/00361
摘要： The transient noise generated at the output drivers of an integrated circuit chip is reduced by maintaining an increasing ramp shaped current through each output driver during the entire transition interval between binary states of a capacitive load. A capacitor fed by a fixed current source is connected across the input of each output driver stage. The fixed current source and capacitor are so selected as to generate across the input of each output driver stage a linear ramp shaped control voltage that regulates the charging/discharging current through the output driver stage and package inductance in the described manner. A specially designed bias circuit reduces the sensitivity of the resulting transient noise to process variations and operating conditions. A feedback connection from the package inductance to the bias control circuit for the fixed current source adjusts the fixed current inversely with the transient noise. A dynamic clamp suppresses voltage spikes extending outside the voltage supply operating range. A bias circuit arrangement compensates for sheet resistivity of the integrated circuit chip. If the resistance value of the sheet drops below a prescribed value, the fixed current is limited so it cannot exceed its designed value.
摘要翻译：在集成电路芯片的输出驱动器处产生的瞬态噪声通过在容性负载的二进制状态之间的整个转换间隔期间保持通过每个输出驱动器的斜坡形状电流而减小。由固定电流源馈送的电容器连接在每个输出驱动级的输入端。固定电流源和电容器被选择为在每个输出驱动级的输入端产生线性斜坡形控制电压，其以所述方式调节通过输出驱动级和封装电感的充电/放电电流。专门设计的偏置电路降低了所产生的瞬态噪声对工艺变化和工作条件的敏感性。从封装电感到用于固定电流源的偏置控制电路的反馈连接将与固定电流反向地调整固定电流与瞬态噪声。动态钳位电压可以抑制电压工作范围以外的电压尖峰。偏置电路布置补偿集成电路芯片的薄层电阻率。如果纸张的电阻值低于规定值，则固定电流受到限制，因此不能超过设计值。

5. 发明授权

US4871979A Variable frequency system having linear combination of charge pump and voltage controlled oscillator 失效
标题翻译：具有电荷泵和压控振荡器的线性组合的变频系统
公开(公告)号：US4871979A
公开(公告)日：1989-10-03
申请号：US80957
申请日：1987-08-03
申请人： Gerald Shearer , Karl M. Lofgren , Kenneth W. Ouyang
发明人： Gerald Shearer , Karl M. Lofgren , Kenneth W. Ouyang
IPC分类号： H03L7/089 , H04L7/033
CPC分类号： H03L7/0898 , H04L7/033
摘要： A phase locked loop system having a non-linear voltage controlled oscillator (VCO) is provided with a variable gain charge pump. The charge pump supplies a pump current to an integrating network which transforms the pump current into a frequency-modulating input voltage. The frequency-modulating input voltage is applied to an input of the VCO. The frequency-modulating input voltage is also coupled to a gain control input of the variable gain charge pump so that the magnitude of the pump current will be a function of the absolute value of the frequency-modulating voltage.A substantially constant loop gain may be obtained in the phase locked loop system by arranging the gain function of the variable gain charge pump in counterposed relation to the slope of a VCO transfer function defining the nonlinear relation between the frequency-modulating input voltage of the VCO and the output frequency of the VCO.
摘要翻译：具有非线性压控振荡器（VCO）的锁相环系统设置有可变增益电荷泵。电荷泵向集成网络提供泵浦电流，其将泵浦电流转换成调频输入电压。频率调制输入电压被施加到VCO的输入端。频率调制输入电压还耦合到可变增益电荷泵的增益控制输入，使得泵浦电流的大小将是频率调制电压的绝对值的函数。通过将可变增益电荷泵的增益函数与限定VCO的频率调制输入电压之间的非线性关系的VCO传递函数的斜率相反地设置，可以在锁相环系统中获得基本恒定的环路增益和VCO的输出频率。

6. 发明授权

US4733107A Low current high precision CMOS schmitt trigger circuit 失效
标题翻译：低电流高精度CMOS施密特触发电路
公开(公告)号：US4733107A
公开(公告)日：1988-03-22
申请号：US883957
申请日：1986-07-10
申请人： Timothy G. O'Shaughnessy , Kenneth W. Ouyang
发明人： Timothy G. O'Shaughnessy , Kenneth W. Ouyang
IPC分类号： H03K3/3565 , H03K3/29 , H03K5/153
CPC分类号： H03K3/3565
摘要： A CMOS Schmitt Trigger circuit includes a differential structure for comparing an input signal with a feedback signal and a feedback circuit for providing the feedback signal with one of two voltage levels. A CMOS switch pair is connected to one or both of the differential structure and feedback circuit to provide power to the circuit only when necessary so as to minimize power consumption.
摘要翻译： CMOS施密特触发电路包括用于将输入信号与反馈信号进行比较的差分结构和用于向两个电压电平之一提供反馈信号的反馈电路。 CMOS开关对连接到差分结构和反馈电路中的一个或两个，以在必要时为电路供电，以便最小化功耗。

7. 发明授权

US5162888A High DC breakdown voltage field effect transistor and integrated circuit 失效
标题翻译：高直流击穿电压场效应晶体管和集成电路
公开(公告)号：US5162888A
公开(公告)日：1992-11-10
申请号：US351669
申请日：1989-05-12
申请人： Ramon Co , Kenneth W. Ouyang , Jui C. Liang
发明人： Ramon Co , Kenneth W. Ouyang , Jui C. Liang
IPC分类号： H01L29/10 , H01L29/78
CPC分类号： H01L29/1045 , H01L29/7835
摘要： A field effect transistor device formed on an integrated circuit chip substrate and driven by the on-chip voltages having a well region formed in the substrate, and source and drain regions one of which is formed in the well region. The well region has a lower doping concentration than the source and drain regions and is of the same conductivity type. The well region provides a reduced electric field gradient at the source/substrate or drain/substrate junction and significantly increases the breakdown resistance of the device to DC voltages higher than the on-chip voltages. An input/output protection circuit employing the field effect transistor coupled in series between an integrated circuit output pad and the active devices on the chip providing ability to withstand coupling of the pad to a relatively high DC voltages.
摘要翻译：一种场效应晶体管器件，形成在集成电路芯片基板上，并由片上电压驱动，具有形成在衬底中的阱区，其中一个漏极区形成在阱区中。阱区具有比源区和漏区更低的掺杂浓度，并且具有相同的导电类型。阱区域在源极/衬底或漏极/衬底结点处提供减小的电场梯度，并且显着地将器件的耐击穿电压提高到高于片上电压的直流电压。使用串联耦合在集成电路输出焊盘和芯片上的有源器件之间的场效应晶体管的输入/输出保护电路提供了能够承受焊盘到相对高的DC电压的耦合的能力。

8. 发明授权

US4868482A CMOS integrated circuit having precision resistor elements 失效
标题翻译： CMOS集成电路具有精密电阻元件
公开(公告)号：US4868482A
公开(公告)日：1989-09-19
申请号：US104398
申请日：1987-10-05
申请人： Timothy G. O'Shaughnessy , Michael R. Spaur , Kenneth W. Ouyang
发明人： Timothy G. O'Shaughnessy , Michael R. Spaur , Kenneth W. Ouyang
IPC分类号： H03F3/345 , H03H11/46
CPC分类号： H03F3/345 , H03H11/46
摘要： A circuit is provided for realizing multiple precision resistor elements on an integrated circuit by sensing a reference resistor. The circuit contains a first current source which passes a first current through a reference resistor located either on or off of the integrated circuit to generate a reference voltage. The reference voltage is applied to the inverting input of a precision high gain operational amplifier. A second current source is connected to the drain of a first MOS transistor operating in its ohmic region. The second current source is also connected to the non-inverting input of the high gain operational amplifier. The output of the operational amplifier is electrically connected to the gate of the first and second MOS transistors. In operation, a precision resistance is developed across the second MOS transistor which is equal to or some determinable multiple of the resistance of the reference precision resistor located on or off chip. An operational amplifier adaptable to this circuit is also disclosed.
摘要翻译：提供一种电路，用于通过感测参考电阻器在集成电路上实现多个精密电阻器元件。该电路包含第一电流源，该第一电流源使第一电流通过位于集成电路的导通或关闭的参考电阻以产生参考电压。参考电压施加到精密高增益运算放大器的反相输入端。第二电流源连接到在其欧姆区工作的第一MOS晶体管的漏极。第二电流源也连接到高增益运算放大器的非反相输入。运算放大器的输出电连接到第一和第二MOS晶体管的栅极。在操作中，跨第二MOS晶体管产生精密电阻，其等于或定位在芯片上或芯片上的参考精密电阻器的电阻的一些可确定的倍数。还公开了适用于该电路的运算放大器。

9. 发明授权

US4692717A Voltage controlled oscillator with high speed current switching 失效
标题翻译：具有高速电流切换的压控振荡器
公开(公告)号：US4692717A
公开(公告)日：1987-09-08
申请号：US940212
申请日：1986-12-08
申请人： Kenneth W. Ouyang , Melvin Marmet
发明人： Kenneth W. Ouyang , Melvin Marmet
IPC分类号： H03K4/06 , H03K17/687 , H03K3/023 , H03K3/354
CPC分类号： H03K17/6872 , H03K4/06
摘要： A CMOS voltage controlled oscillator includes a reference capacitor which is charged and discharged by current source and sink output transistors. The output transistors are connected to control transistors in a current mirror fashion with current through the control transistors being maintained at a level proportional to the value of a control input voltage. The control transistors are selectively connected to the output transistors in a current mirror configuration to provide either current source or sink operation. Transmission gates are connected between the gates of the output and control transistors and selectively closed to render the proper output transistor conductive to achieve source or sink operation. MOS capacitors are connected to the control transistors to facilitate rapid switching of the output transistors to enable high frequency operation of the voltage controlled oscillator.
摘要翻译： CMOS压控振荡器包括由电流源和输出晶体管对其进行充电和放电的参考电容器。输出晶体管以电流镜连接到控制晶体管，电流通过控制晶体管保持在与控制输入电压的值成比例的水平。控制晶体管以电流反射镜配置选择性地连接到输出晶体管，以提供电流源或接收器操作。传输门连接在输出和控制晶体管的栅极之间，并且选择性地关闭以使合适的输出晶体管导通以实现源或阱操作。 MOS电容器连接到控制晶体管，以便于输出晶体管的快速切换，以实现压控振荡器的高频工作。

10. 发明授权

US5126692A Variable frequency system having linear combination of charge pump and voltage controlled oscillator 失效
标题翻译：具有电荷泵和压控振荡器的线性组合的变频系统
公开(公告)号：US5126692A
公开(公告)日：1992-06-30
申请号：US384279
申请日：1989-07-21
申请人： Gerald Shearer , Karl M. Lofgren , Kenneth W. Ouyang
发明人： Gerald Shearer , Karl M. Lofgren , Kenneth W. Ouyang
IPC分类号： H03L7/089 , H04L7/033
CPC分类号： H03L7/0898 , H04L7/033
摘要： A phase locked loop system having a non-linear voltage controlled oscillator (VCO) is provided with a variable gain charge pump. The charge pump supplies a pump current to an integrating network which transforms the pump current into a frequency-modulating input voltage. The frequency-modulating input voltage is applied to an input of the VCO. The frequency-modulating input voltage is also coupled to a gain control input of the variable gain charge pump so that the magnitude of the pump current will be a function of the absolute value of the frequency-modulating voltage.A substantially constant loop gain may be obtained in the phase locked loop system by arranging the gain function of the variable gain charge pump in counterposed relation to the slope of a VCO transfer function defining the nonlinear relation between the frequency-modulating input voltage of the VCO and the output frequency of the VCO.
摘要翻译：具有非线性压控振荡器（VCO）的锁相环系统设置有可变增益电荷泵。电荷泵向集成网络提供泵浦电流，其将泵浦电流转换成调频输入电压。频率调制输入电压被施加到VCO的输入端。频率调制输入电压还耦合到可变增益电荷泵的增益控制输入，使得泵浦电流的大小将是频率调制电压的绝对值的函数。通过将可变增益电荷泵的增益函数与限定VCO的频率调制输入电压之间的非线性关系的VCO传递函数的斜率相反地设置，可以在锁相环系统中获得基本恒定的环路增益和VCO的输出频率。

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