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    • 27. 发明公开
    • 스위치드 캐패시터 연산증폭기
    • 开关电容器操作放大器
    • KR1020120077430A
    • 2012-07-10
    • KR1020100139376
    • 2010-12-30
    • (주)세미솔루션
    • 김지형이정원
    • H03F3/70H03K5/08
    • H03F3/005H03F3/45475H03F3/70H03K3/0322
    • PURPOSE: A switched-capacitor operational amplifier is provided to improve a clock feedthrough of a transmission gator by generating a precise clock without overlap. CONSTITUTION: A clock generation part generates a negative phase clock signal by eliminating delay errors from an input clock. The clock generation part comprises a buffer(510), a first clock generator(520), and a second clock generator(530). The buffer comprises two inverters in order to buffer the input clock. The first clock generator outputs a high-level clock signal in the low state of the input clock. The second clock generator outputs a low-level clock signal in the low state of the input clock.
    • 目的:提供开关电容运算放大器,以通过产生精确的时钟而不重叠来改善传输定时器的时钟馈通。 构成:时钟产生部件通过消除输入时钟的延迟误差来产生负相位时钟信号。 时钟生成部分包括缓冲器(510),第一时钟发生器(520)和第二时钟发生器(530)。 缓冲器包括两个反相器,以缓冲输入时钟。 第一个时钟发生器在输入时钟的低电平状态下输出高电平时钟信号。 第二个时钟发生器在输入时钟的低电平状态下输出低电平时钟信号。
    • 28. 发明公开
    • 스위치드 커패시터 회로
    • 开关电容器电路
    • KR1020120033960A
    • 2012-04-09
    • KR1020110075651
    • 2011-07-29
    • 세미컨덕터 콤포넨츠 인더스트리즈 엘엘씨
    • 오니시아끼노부
    • H03F3/70H03F3/45
    • H03F3/005H03F1/0244H03F2203/45171H03H19/004H03M3/32H03M3/43H03M3/454
    • PURPOSE: A switched capacitor circuit is provided to improve the performance of an integrator by setting proper timing by using a 4-phase clock capable of independently controlling a switch. CONSTITUTION: A normal integration circuit(200) comprises a switched-capacitor circuit(202), an operational amplifier(204), and a condenser(206). The switched-capacitor circuit includes switches(SW1-SW4) and a condenser(C1). The operational amplifier and the condenser constitute an integration circuit. A non-inverting input terminal (+) of the operational amplifier is grounded. An inverted input terminal (-) and an output terminal are connected through the condenser. The normal integration circuit has a configuration in which a sampling mode and integration mode are controlled by four switches.
    • 目的:提供一个开关电容电路,通过使用能够独立控制开关的4相时钟,通过设定适当的时序来提高积分器的性能。 构成:正常积分电路(200)包括开关电容器电路(202),运算放大器(204)和冷凝器(206)。 开关电容电路包括开关(SW1-SW4)和冷凝器(C1)。 运算放大器和电容器构成集成电路。 运算放大器的非反相输入端(+)接地。 反相输入端( - )和输出端通过冷凝器连接。 正常积分电路具有采样模式和积分模式由四个开关控制的结构。