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1. 发明专利

JP2007266203A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2007266203A
公开(公告)日：2007-10-11
申请号：JP2006087683
申请日：2006-03-28
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： UESUGI TSUTOMU , KANECHIKA MASAKAZU , KIGAMI MASAHITO , HAYASHI EIKO , UEDA HIROYUKI , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H01L29/06 , H01L21/336 , H01L21/337 , H01L21/338 , H01L29/12 , H01L29/778 , H01L29/78 , H01L29/80 , H01L29/808 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To achieve a semiconductor device that is superior in on-characteristics and the breakdown voltage.
SOLUTION: A protective film 3 consisting of Al
2 O
3 crystal whose thickness being about 0.1 μm-0.3 μm is laminated on the top face of semiconductor layers 1 and 2. It is sufficient that this film thickness be the thickness for it to function as a diffusion barrier for impurity or implantation barrier for a carrier. This protective film 3 can be formed by the crystal growing of the Al
2 O
3 crystal, and the crystal growing of a thick GaN crystal layer can be carried out widely and easily further thereon. A thick high-breakdown-voltage insulating film 4, formed over a wide area is a semiconductor crystal layer laminated by such a crystal growth, and is formed of an intrinsic GaN crystal whose film thickness is about 20 μm. A protective film 5, consisting of Al
2 O
3 crystal, is formed by about 0.1 μm, further, thereon. This protective film 5 functions as the implantation barrier layer for the carrier or the protective film for preventing the diffusion (infiltration) of the impurity into the high-withstand-voltage insulating film 4.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：实现导通特性和击穿电压优异的半导体器件。
解决方案：由半导体层1的顶面上层叠由厚度为约0.1μm〜0.3μm的AlS / SiO 3结构构成的保护膜3，该膜厚度为其用作载体的杂质扩散阻挡层或植入阻挡层的厚度就足够了。该保护膜3可以通过Al 2 SB 3 O 3 / SiO 3晶体的晶体生长而形成，并且可以广泛且容易地进行厚GaN晶体层的晶体生长进一步在其上。在宽范围内形成的厚的高耐压绝缘膜4是通过这种晶体生长层叠的半导体晶体层，并且由膜厚度为约20μm的本征GaN晶体形成。由Al 2 SB 3结晶组成的保护膜5在其上进一步形成约0.1μm。该保护膜5用作用于防止杂质向高耐压绝缘膜4的扩散（渗入）的载体或保护膜的注入阻挡层。版权所有（C）2008，JPO＆INPIT

2. 发明专利

JP2007227850A Pressure sensor, and its manufacturing method 审中-公开
标题翻译：压力传感器及其制造方法
公开(公告)号：JP2007227850A
公开(公告)日：2007-09-06
申请号：JP2006050155
申请日：2006-02-27
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： KANECHIKA MASAKAZU , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H01L29/84 , G01L9/00
摘要： PROBLEM TO BE SOLVED: To attain a small pressure sensor which has high accuracy even under an environment of high temperature. SOLUTION: A cavity R between diaphragms (semiconductor crystal layers 103, 104) and a sapphire substrate 101 is formed by the transverse growing action of the semiconductor crystal layer 103. In the diaphragm of two-layer structure, a channel (face-like collector of negative polarized pole) composed of a highly concentrated two-dimensional electronic gas is formed on a hetrojunction interface by a piezoelectricity peculiar to a nitride semiconductor. Since the stress applied to the heterojunction also changes if the external pressure to the diaphragm changes, the electric conductivity (sheet resistance) of the channel also changes sensitively. As the result, the external pressure of the diaphragm can be measured by reading the amount of variation of its resistance value because the resistance between two ohmic electrodes (source electrode 107S and drain electrode 107D) changes correspondent to the external pressure. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：即使在高温环境下也能获得高精度的小压力传感器。解决方案：通过半导体晶体层103的横向生长作用，在膜片（半导体晶体层103,104）和蓝宝石衬底101之间形成空腔R.在两层结构的膜片中，通道（面由极高浓度的二维电子气体组成的负极化极的集电极）通过氮化物半导体所特有的压电特性形成在结合界面上。由于如果对隔膜的外部压力发生变化，施加到异质结的应力也发生变化，所以通道的导电性（薄层电阻）也变化敏感。结果，由于两个欧姆电极（源极电极107S和漏电极107D）之间的电阻相应于外部压力而变化，所以可以通过读取其电阻值的变化量来测量隔膜的外部压力。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2007143229A Inverter 有权
标题翻译： INVERTER
公开(公告)号：JP2007143229A
公开(公告)日：2007-06-07
申请号：JP2005330483
申请日：2005-11-15
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： KONDO HARUYOSHI , UESUGI TSUTOMU , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H02M7/537
摘要： PROBLEM TO BE SOLVED: To reduce power loss of an inverter having a bidirectional switching element. SOLUTION: A dead time management section 105 performs adaptive control of the length of dead time when a pair of semiconductor switching elements are tuned off simultaneously for every phase based on the direction of currents I U , I V and I W and neutral voltages V MU , V MV and V MW . When current I U of U phase is supplied from a semiconductor switching element SWUH to a load 10, gate voltage is operated at first through a gate driver 106 such that the element SWUH is turned off and the neutral voltage V MU is measured at the same time. If the neutral voltage V MU starts to drop even during the period of dead time, it can be considered that change to off state of the element SWUH has completed, and the gate voltage is operated such that a switching element SWUL on the low potential side is turned on at that moment. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了减少具有双向开关元件的逆变器的功率损耗。解决方案：死区时间管理部分105基于电流I U 的方向对每个相位同时关闭一对半导体开关元件来执行死区时间长度的自适应控制，中性电压V SB，V SB，MV SB SB，V SB SB >。当U相的电流I U 从半导体开关元件SWUH供给到负载10时，首先通过栅极驱动器106操作栅极电压，使得元件SWUH截止，并且中性电压同时测量V MU 。如果即使在死区时间内中性电压V SB也开始下降，则可以认为元件SWUH的关断状态的变化已经完成，并且栅极电压被操作，使得开关此时低电位侧的元件SWUL导通。版权所有（C）2007，JPO＆INPIT

4. 发明专利

JP2007115861A Hetero junction transistor 审中-公开
标题翻译：异位晶体管
公开(公告)号：JP2007115861A
公开(公告)日：2007-05-10
申请号：JP2005305167
申请日：2005-10-20
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： SUGIMOTO MASAHIRO , KACHI TORU , UESUGI TSUTOMU , UEDA HIROYUKI , SOEJIMA SHIGEMASA , KANECHIKA MASAKAZU , KIGAMI MASAHITO
IPC分类号： H01L29/12 , H01L21/336 , H01L29/78 , H01L29/786
CPC分类号： H01L29/7788 , H01L29/2003
摘要： PROBLEM TO BE SOLVED: To reduce variation in threshold voltages of the gate of a hetero junction transistor.
SOLUTION: A hetero junction transistor 10 has such structure as an embedded semiconductor region 24, an upper surface embedded insulating film 34, a first semiconductor region 42, a second semiconductor region 44, and a gate electrode 48, are sequentially formed. The embedded semiconductor region 24 is n-type gallium nitride (GaN) electrically insulated from a surrounding semiconductor region. The first semiconductor region 42 is formed from gallium nitride (GaN). The second semiconductor region 44 is formed from gallium nitride-aluminum (Al
0.3 Ga
0.7 N), with its band gap being wider than that of the first semiconductor region 42. A control electrode 26 is electrically connected to the embedded semiconductor region 24.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：减少异质结晶体管的栅极的阈值电压的变化。解决方案：异质结晶体管10具有如下嵌入式半导体区域24，上表面嵌入绝缘膜34，第一半导体区域42，第二半导体区域44和栅极电极48的结构。嵌入式半导体区域24是与周围半导体区域电绝缘的n型氮化镓（GaN）。第一半导体区域42由氮化镓（GaN）形成。第二半导体区域44由氮化镓铝（Al 0.3 S> 0.7 N）形成，其带隙比第一半导体区域42宽。控制电极26电连接到嵌入式半导体区域24.版权所有（C）2007，JPO＆INPIT

5. 发明专利

JP2006165191A Structure with semiconductor layer of iii-v compound and its manufacturing method 有权
标题翻译：结构与III-V化合物的半导体层及其制造方法
公开(公告)号：JP2006165191A
公开(公告)日：2006-06-22
申请号：JP2004353108
申请日：2004-12-06
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： CHIN SHEN FON , UESUGI TSUTOMU , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H01L21/205 , H01L21/02 , H01L29/06 , H01L29/20 , H01L33/16 , H01L33/32 , H01L33/34
摘要： PROBLEM TO BE SOLVED: To provide a structure where heat generated from a semiconductor device formed in a semiconductor layer of a III-V compound can efficiently be discharged outside the semiconductor layer. SOLUTION: The structure is provided with the semiconductor layer 40 of gallium nitride (GaN), and a lower layer 60 which is brought into contact with the semiconductor layer 40. The lower layer 60 is provided with a metal region 50 extending from the surface of the lower layer 60 to a backside. In a face orthogonal with a direction connecting the surface and the backside of the lower layer 60, the metal regions 50 are repetitively formed by leaving an interval. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种结构，其中形成在III-V族化合物的半导体层中的半导体器件产生的热可以有效地排出到半导体层的外部。解决方案：该结构设置有氮化镓（GaN）的半导体层40和与半导体层40接触的下层60.下层60设置有金属区域50，金属区域50从下层60的表面到背面。在与连接下层60的表面和背面的方向正交的面上，通过留下间隔来重复地形成金属区域50。版权所有（C）2006，JPO＆NCIPI

6. 发明专利

JP2006140368A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006140368A
公开(公告)日：2006-06-01
申请号：JP2004330123
申请日：2004-11-15
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： UESUGI TSUTOMU , UEDA HIROYUKI , SOEJIMA SHIGEMASA , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H01L29/80 , H01L21/338 , H01L29/12 , H01L29/778 , H01L29/78 , H01L29/812 , H01L29/861
CPC分类号： H01L29/7788 , H01L29/0649 , H01L29/0653 , H01L29/0692 , H01L29/0696 , H01L29/0843 , H01L29/0847 , H01L29/0891 , H01L29/2003 , H01L29/41 , H01L29/778 , H01L29/7802 , H01L29/8122
摘要： PROBLEM TO BE SOLVED: To suppress the reduction of a withstand voltage or the generation of a leakage current in a semiconductor device with a semiconductor layer in which there is a crystal defect.
SOLUTION: The semiconductor device has a drain electrode 22 connected to one polarity of a power supply and a semiconductor substrate 32. A current control layer 42 covering the surface of the semiconductor substrate 32 while leaving an uncovered region 55 and the semiconductor layers (a drift layer 56, a channel layer 54 and a source layer 52) covering the surface of the current control layer 42. The semiconductor device further has a source electrode 62 formed on the surface of the source layer 52 and connected to the other polarity of the power supply.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了抑制具有晶体缺陷的半导体层的半导体器件中的耐压降低或漏电流的产生。解决方案：半导体器件具有连接到电源和半导体衬底32的一个极性的漏电极22.覆盖半导体衬底32的表面同时留下未覆盖区域55的电流控制层42和半导体层（漂移层56，沟道层54和源极层52）覆盖电流控制层42的表面。半导体器件还具有形成在源极层52的表面上并连接到另一极性的源电极62 的电源。版权所有（C）2006，JPO＆NCIPI

7. 发明专利

JP2006032749A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006032749A
公开(公告)日：2006-02-02
申请号：JP2004210989
申请日：2004-07-20
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： SUGIMOTO MASAHIRO , KACHI TORU , NAKANO YOSHITAKA , UESUGI TSUTOMU , UEDA HIROYUKI , SOEJIMA SHIGEMASA
IPC分类号： H01L29/812 , H01L21/335 , H01L21/338 , H01L29/20 , H01L29/778
CPC分类号： H01L29/778 , H01L21/28 , H01L29/2003 , H01L29/66431 , H01L29/66462 , H01L29/7787
摘要： PROBLEM TO BE SOLVED: To realize stable normally-off performance in a semiconductor device which has a hetero structure and is constituted of a group III-V compound semiconductor. SOLUTION: In semiconductor device, a p-GaN layer 32, an SI-GaN layer 62 and an AlGaN layer 34 are laminated. The device has a gate electrode 44 which is subjected to Schottky connection in the front side of the AlGaN layer 34. The band gap of the AlGaN layer 34 is larger than that of the p-GaN layer 32 and the SI-GaN layer 62, and the impurity concentration of the SI-GaN layer 62 is ≤1×10 17 cm -3 . COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：在具有异质结构并由III-V族化合物半导体构成的半导体器件中实现稳定的常态性能。解决方案：在半导体器件中，层叠p-GaN层32，SI-GaN层62和AlGaN层34。器件具有在AlGaN层34的前侧经肖特基连接的栅电极44.AlGaN层34的带隙大于p-GaN层32和SI-GaN层62的带隙，并且SI-GaN层62的杂质浓度为≤1×10 17 cm -3 。版权所有（C）2006，JPO＆NCIPI

8. 发明专利

JP2007150165A Semiconductor device using resonant tunnelling phenomenon and method of manufacturing same 审中-公开
标题翻译：使用共振隧道络合物的半导体器件及其制造方法
公开(公告)号：JP2007150165A
公开(公告)日：2007-06-14
申请号：JP2005345528
申请日：2005-11-30
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： KANECHIKA MASAKAZU , ISHIGURO OSAMU , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H01L29/66 , H01L29/06
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device for switching which uses a resonant tunneling phenomenon and operates in a normally-off manner. SOLUTION: The semiconductor device has a semiconductor lower layer in repetitive structure of an electron barrier layer and a quantum well layer. A semiconductor upper layer having a quantum well layer sandwiched between electron barrier layers is formed on the semiconductor lower layer. The semiconductor device has a gate electrode for applying a voltage to the quantum well layer of the semiconductor upper layer. While the gate electrode is applied with no voltage, the base energy level of the quantum well layer of the semiconductor upper layer is adjusted to be higher than the base energy level of the quantum well layer of the semiconductor lower layer. The base energy levels are not equal to each other and no resonant tunneling phenomenon occurs, so the semiconductor device is normally off. When a voltage is applied to the gate electrode, the base energy levels become equal to each other and a resonant tunneling phenomenon occurs, so the semiconductor device turns on. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种使用谐振隧道现象并以常关方式操作的开关用半导体器件。解决方案：半导体器件具有电子势垒层和量子阱层重复结构的半导体下层。在半导体下层上形成具有夹在电子阻挡层之间的量子阱层的半导体上层。半导体器件具有用于向半导体上层的量子阱层施加电压的栅电极。当栅电极没有施加电压时，半导体上层的量子阱层的基极能级被调整为高于半导体下层的量子阱层的基极能级。基本能级彼此不相等，并且不会发生共振隧道现象，因此半导体器件通常断开。当对栅电极施加电压时，基极能量彼此相等并且发生谐振隧道现象，因此半导体器件导通。版权所有（C）2007，JPO＆INPIT

9. 发明专利

JP2007124842A Inverter 有权
标题翻译： INVERTER
公开(公告)号：JP2007124842A
公开(公告)日：2007-05-17
申请号：JP2005315704
申请日：2005-10-31
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： KONDO HARUYOSHI , UESUGI TSUTOMU , KACHI TORU , SUGIMOTO MASAHIRO
IPC分类号： H02M7/48
摘要： PROBLEM TO BE SOLVED: To reduce the power loss of an inverter having bi-directional switching elements. SOLUTION: A dead time management portion 105 performs the adaptive control of the length of dead time for each phase when a pair of semiconductor switching elements are both put into an OFF state simultaneously based on the direction of currents I U , I V , I W and middle point voltages V MU , V MV , V MW . For instance, when the current I U of U-phase is supplied from the semiconductor switch SWUH to a load 10, its gate voltage is operated via a gate driver 106 so as to put the element SWUH first into an OFF state and simultaneously, the middle point voltage V MU is measured. If the middle point voltage V MU starts to drop after that even during the dead time period, it can be considered that the change to the OFF state of the element SWUH has been completed. Its gate voltage is operated at that time so that the switching element SWUL at the low voltage side is put into an ON state. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：减少具有双向开关元件的逆变器的功率损耗。解决方案：当一对半导体开关元件都基于电流I U的方向同时进入关断状态时，死区时间管理部分105对每个相位执行死区时间长度的自适应控制 V ，I V ，I W ，中点电压V SB，V SB， SB> MW 。例如，当U相的电流I U 从半导体开关SWUH供给到负载10时，其栅极电压通过栅极驱动器106工作，以使元件SWUH首先进入 OFF状态，同时测量中点电压V SB SB。如果即使在死区时间内中间点电压V SB也开始下降，可以认为元件SWUH的关断状态的变化已经完成。其栅极电压在此时工作，使得低电压侧的开关元件SWUL处于导通状态。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2007103815A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2007103815A
公开(公告)日：2007-04-19
申请号：JP2005294381
申请日：2005-10-07
申请人： Toyota Central Res & Dev Lab Inc , Toyota Motor Corp , トヨタ自動車株式会社 , 株式会社豊田中央研究所
发明人： SUGIMOTO MASAHIRO , KACHI TORU , UESUGI TSUTOMU , UEDA HIROYUKI , SOEJIMA SHIGEMASA , KANECHIKA MASAKAZU , KIGAMI MASAHITO
IPC分类号： H01L27/08 , H01L21/76 , H01L29/06 , H01L29/26 , H01L29/786
摘要： PROBLEM TO BE SOLVED: To provide a structure which ensures the insulated separation between the switching device regions, while utilizing a flat semiconductor layer. SOLUTION: A semiconductor device 10 incorporates a p-type gallium nitride semiconductor layer 26. Switching device regions 12 and 16 are formed on the semiconductor layer 26 in a scattering manner. On a part of the top surface of the semiconductor layer 26 within the switching device regions 12 and 16, n-type semiconductor regions 32 and 36 are formed to be connected with electrodes 31 and 35, respectively. An inversion constraint structure 40 is provided to prevent any inversion of the conduction type on the top surface of the semiconductor layer 26 located between the switching device regions 12 and 16 lying adjacent to each other. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供一种利用平坦半导体层确保开关器件区域之间的绝缘分离的结构。解决方案：半导体器件10包含p型氮化镓半导体层26.开关器件区域12和16以散射方式形成在半导体层26上。在开关器件区域12和16内的半导体层26的顶表面的一部分上，形成n型半导体区域32和36，以分别与电极31和35连接。提供反转约束结构40以防止位于彼此相邻的开关器件区12和16之间的半导体层26的顶表面上的导电类型的任何反转。版权所有（C）2007，JPO＆INPIT

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