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1. 发明专利

JP2009237602A Memory system 审中-公开
标题翻译：记忆系统
公开(公告)号：JP2009237602A
公开(公告)日：2009-10-15
申请号：JP2008079016
申请日：2008-03-25
申请人： Toshiba Corp , Toshiba Memory Systems Co Ltd , 東芝メモリシステムズ株式会社 , 株式会社東芝
发明人： MIYASHITA TOSHIYUKI , OSHIMA TAKASHI , MURAKAMI TETSUYA
IPC分类号： G06F12/16
摘要： PROBLEM TO BE SOLVED: To provide a memory system improved in operational reliability. SOLUTION: This memory system is provided with: a semiconductor memory 3 with a non-volatile memory cell for storing data; and a backup control circuit 6 for supplying a backup power source 2 and a first external power source (power source C). When the first external power source is interrupted during the write-in of data in the memory cell of the semiconductor memory 3, the backup control circuit 6 supplies a voltage applied from the backup power source 2 to the semiconductor memory 3, and stops the supply of the voltage to be applied from the backup power source 2 after the end of the write-in of the data. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供改进的操作可靠性的存储器系统。解决方案：该存储器系统具有：具有用于存储数据的非易失性存储单元的半导体存储器3; 以及用于提供备用电源2和第一外部电源（电源C）的备用控制电路6。当在半导体存储器3的存储单元中写入数据期间第一外部电源中断时，备用控制电路6将从备用电源2施加的电压提供给半导体存储器3，并停止供应在写入数据结束之后从备用电源2施加的电压。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2010244605A Memory system 审中-公开
标题翻译：记忆系统
公开(公告)号：JP2010244605A
公开(公告)日：2010-10-28
申请号：JP2009091242
申请日：2009-04-03
申请人： Toshiba Corp , 株式会社東芝
发明人： TANAKA HIROAKI , MURAKAMI TETSUYA
IPC分类号： G11C16/02 , G11C16/06
CPC分类号： G11C11/5642 , G11C11/5628 , G11C16/3418 , G11C16/3431
摘要： PROBLEM TO BE SOLVED: To more reduce erase operation of data which is needed accompanying potential fluctuation of a cell. SOLUTION: A memory system includes a plurality of nonvolatile memory cells MC connected electrically to a common word line WL. Each memory cell stores a plurality of data corresponding to a plurality of potential ranks. Further the memory system measures a potential of the memory cell for each potential rank and includes a control part 14 changing a lower limit and upper limit of each potential rank based on this measurement result. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了更多地减少伴随电池的电位波动所需的数据的擦除操作。解决方案：存储器系统包括电连接到公共字线WL的多个非易失性存储单元MC。每个存储单元存储对应于多个潜在等级的多个数据。此外，存储器系统测量每个电位等级的存储单元的电位，并且包括基于该测量结果改变每个电位等级的下限和上限的控制部分14。版权所有（C）2011，JPO＆INPIT

3. 发明专利

JP2010176646A Memory system and interleaving control method for memory system 审中-公开
标题翻译：用于存储系统的存储系统和交互控制方法
公开(公告)号：JP2010176646A
公开(公告)日：2010-08-12
申请号：JP2009022044
申请日：2009-02-02
申请人： Toshiba Corp , Toshiba Information Systems (Japan) Corp , 東芝情報システム株式会社 , 株式会社東芝
发明人： NANJO HIROYUKI , MURAKAMI TETSUYA
IPC分类号： G06F12/06 , G06F12/00
CPC分类号： G06F12/0246 , G06F12/0607 , G06F2212/7203
摘要： PROBLEM TO BE SOLVED: To provide a memory system which efficiently achieves bank interleaving.
SOLUTION: A memory controller, including a priority order managing means for managing selective priority order for every bank, selects a memory area which has the highest selective priority order out of the banks in a ready state to change the selected memory area to a command target of the next operation command after transmitting the operation command and moves the next selective priority order of the selected memory area to the lowest priority by the priority order managing means.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种有效实现银行交错的存储系统。解决方案：包括用于管理每个存储体的选择性优先级顺序的优先顺序管理装置的存储器控制器在就绪状态下选择具有最高选择优先级顺序的存储区，以将选择的存储区改变为在发送操作命令之后的下一个操作命令的命令目标，并且通过优先级顺序管理装置将选择的存储区域的下一选择优先级顺序移动到最低优先级。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2010152542A Memory system 审中-公开
标题翻译：记忆系统
公开(公告)号：JP2010152542A
公开(公告)日：2010-07-08
申请号：JP2008328465
申请日：2008-12-24
申请人： Toshiba Corp , Toshiba Information Systems (Japan) Corp , 東芝情報システム株式会社 , 株式会社東芝
发明人： MORITA TAKEO , AOKI AKIRA , MURAKAMI TETSUYA
IPC分类号： G06F12/16
CPC分类号： G11C7/02 , G06F11/073 , G06F11/076 , G06F11/1068 , G06F12/0246 , G06F2212/7209 , G11C7/1006
摘要： PROBLEM TO BE SOLVED: To provide a memory system for reducing the frequency of generation of an error as much as possible in performing access to a DRAM.
SOLUTION: A memory system includes: a first nonvolatile memory 2; a second volatile memory 4; and a transfer controller 3 for transferring data between a host device and the first memory 2 through the second memory 4. The transfer controller 3 includes error count means 14 and 15 for calculating a parity error in inputting/outputting data to each divided region for each division unit obtained by dividing the storage area of the second memory 4 into a plurality of regions, and for counting the number of times of accumulation of the parity error; and a means for making the divided region where the count value obtained by the error count means exceeds a prescribed number of times a use impossible state.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种用于在执行对DRAM的访问时尽可能地减少错误产生的频率的存储器系统。解决方案：存储器系统包括：第一非易失性存储器2; 第二易失性存储器4; 以及用于通过第二存储器4在主机设备和第一存储器2之间传送数据的传送控制器3.传送控制器3包括差错计数装置14和15，用于计算每个分割区域的数据输入/输出中的奇偶校验错误通过将第二存储器4的存储区域划分为多个区域而获得的划分单元，并且用于对奇偶校验错误的累积次数进行计数; 以及用于使得由误差计数装置获得的计数值超过使用不可能状态的规定次数的分割区域的装置。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2007094921A Memory card and control method for it 审中-公开
标题翻译：存储卡及其控制方法
公开(公告)号：JP2007094921A
公开(公告)日：2007-04-12
申请号：JP2005285788
申请日：2005-09-30
申请人： Toshiba Corp , 株式会社東芝
发明人： MURAKAMI TETSUYA
IPC分类号： G06F12/16 , G06K17/00
摘要： PROBLEM TO BE SOLVED: To solve a problem of difficulty in surely writing multivalued data. SOLUTION: In a memory cell, data for a second page are written after data for a first page are written. In a holding circuit 7, the data for the first page read from the memory cell are held when the data for the second page are written. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：解决难以确定写入多值数据的问题。解决方案：在存储单元中，写入第一页的数据之后写入第二页的数据。在保持电路7中，当写入第二页的数据时，保持从存储单元读取的第一页的数据。版权所有（C）2007，JPO＆INPIT

6. 发明专利

JP2004171479A Helpdesk system and its method 审中-公开
公开(公告)号：JP2004171479A
公开(公告)日：2004-06-17
申请号：JP2002339533
申请日：2002-11-22
申请人： Toshiba Corp , 株式会社東芝
发明人： TAKAGUCHI YOSHINORI , MURAKAMI TETSUYA , YOSHIE SUMUTO , SAITO HIROMI
IPC分类号： G06Q50/00 , G06Q50/10 , G06F17/60
摘要： PROBLEM TO BE SOLVED: To improve the efficiency and real-time property of a helpdesk business by automatically forming an answer text to a question from a customer and making a person in charge answer the question as occasion demands. SOLUTION: This system comprises a server 2. The server 2 comprises a dangerous word check means 2b for detecting whether a dangerous word is included in a question text q or not in reference to a dangerous word database; a person-in-charge intervention determination means 2d for calling a helpdesk operator terminal 7 to make the terminal intervene, when the inclusion of the dangerous word in the question text is detected, and when it is detected that the total point of questioning information given by a questioning check means 2c is a prescribed point or more; and an answer text formation means 2g for extracting and forming the answer test to the question text in reference to an answer text database when the intervention of the helpdesk operator terminal is not performed by the intervention determination means. COPYRIGHT: (C)2004,JPO

7. 发明专利

JP2006120082A Memory card, semiconductor device, and control method for memory card 有权
标题翻译：存储卡，半导体器件和存储卡的控制方法
公开(公告)号：JP2006120082A
公开(公告)日：2006-05-11
申请号：JP2004309751
申请日：2004-10-25
申请人： Toshiba Corp , 株式会社東芝
发明人： MURAKAMI TETSUYA , OSHIMA TAKASHI
IPC分类号： G06F11/00 , G06F9/50 , G06K19/07
CPC分类号： G11C16/16 , G11C16/0483 , G11C16/10
摘要： PROBLEM TO BE SOLVED: To streamline functional modifications to a program stored in a ROM. SOLUTION: A transfer function 41, when receiving a vendor command sent from a host 20, acquires modified firmware and an interrupt vector included in the vendor command and writes them into a predetermined area in a central management block 44 of a flash memory 3. A load function 42, in response to a trigger signal corresponding to an event indicating, for example, power supply from a power part 32 of the host 20, expands not only firmware 40 stored in the ROM 9 but also the modified firmware 45 and interrupt vector 46 stored in the central management block 44 of the flash memory 3 on a RAM 10 and notifies the expansion to a CPU 8 and the like as an interrupt signal. The CPU 8 receiving the interrupt signal executes a corresponding function in the firmware 40 or the modified firmware 45 according to information (for example, address on RAM area) indicated by the interrupt vector present on the RAM 10. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：简化对存储在ROM中的程序的功能修改。解决方案：传送函数41在接收到从主机20发送的供应商命令时，获取修改的固件和包含在供应商命令中的中断向量，并将它们写入闪速存储器的中央管理块44中的预定区域加载功能42响应于对应于指示例如来自主机20的电源部分32的电源的事件的触发信号，不仅扩展存储在ROM9中的固件40，而且还扩展了修改的固件45 以及存储在闪速存储器3的中央管理块44中的RAM10上的中断向量46，并将该扩展通知给CPU8等作为中断信号。接收到中断信号的CPU8根据存在于RAM10上的中断向量指示的信息（例如，RAM区域上的地址），在固件40或修正固件45中执行相应的功能。）2006年，日本特许厅和NCIPI

8. 发明专利

JP2004171480A Field survey report preparation support system and its method 有权
公开(公告)号：JP2004171480A
公开(公告)日：2004-06-17
申请号：JP2002339534
申请日：2002-11-22
申请人： Toshiba Corp , 株式会社東芝
发明人： MURAKAMI TETSUYA , SAITO HIROMI
IPC分类号： G10L15/00 , G08G1/13
摘要： PROBLEM TO BE SOLVED: To provide a field survey report preparation support system and its method capable of preparing a field survey report with location information of the field, without writing down the voice recorded field survey report to a document, when moving on a vehicle to perform a field survey.
SOLUTION: The field survey report preparation support system 10 is provided with a voice text conversion means 18b for receiving voice information input to a voice input means 16 on board a vehicle 11 and converting the information into text data, a location information display data generating means 18c for receiving location detection information of the vehicle when necessary from a location detecting means 12 on board the vehicle 11 for detecting a location of the vehicle, a survey report information producing means 18d for producing the field survey report information for survey report preparation including the text data and the location information display data, and an information storage means 18e for storing the field survey report information.
COPYRIGHT: (C)2004,JPO

9. 发明专利

JP2009146499A Nonvolatile memory card 审中-公开
标题翻译：非挥发性记忆卡
公开(公告)号：JP2009146499A
公开(公告)日：2009-07-02
申请号：JP2007322361
申请日：2007-12-13
申请人： Toshiba Corp , 株式会社東芝
发明人： MURAKAMI TETSUYA , NARA NOBUYOSHI , IMAMIYA KENICHI
IPC分类号： G11C16/06 , G06K19/07 , G11C16/04
CPC分类号： G11C5/143
摘要： PROBLEM TO BE SOLVED: To provide a nonvolatile memory card in which a problem caused by detection errors between respective voltage detectors never be caused in the nonvolatile memory card and its controller, and circuit scale can be reduced. SOLUTION: The nonvolatile memory card 100A is provided with a nonvolatile memory 110A and its controller 120A, the nonvolatile memory 110A and the controller 120A are provided with a first logic section 111 and a second logic section 121 corresponding to them, the nonvolatile memory 110A is provided with a voltage detector 112b for detecting power source voltage supplied to the nonvolatile memory and the controller from the outside, and an output of the detection is supplied to the first logic section of the nonvolatile memory to which the voltage detector is provided, while it can be supplied to the second logic section of the controller or/and a logic section 111' of at least one added nonvolatile memory 110B through a buffer amplifier simultaneously. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种非易失性存储卡，其中在非易失性存储卡及其控制器中不会引起各个电压检测器之间的检测误差引起的问题，并且可以减小电路规模。解决方案：非易失性存储卡100A设有非易失性存储器110A及其控制器120A，非易失性存储器110A和控制器120A设置有与其对应的第一逻辑部分111和第二逻辑部分121，非易失性存储器存储器110A设置有用于检测从外部提供给非易失性存储器和控制器的电源电压的电压检测器112b，并且将检测的输出提供给提供有电压检测器的非易失性存储器的第一逻辑部分同时可以通过缓冲放大器将其提供给控制器的第二逻辑部分和/或至少一个相加的非易失性存储器110B的逻辑部分111'。版权所有（C）2009，JPO＆INPIT

10. 发明专利

JPH04271536A DATA SIGNAL TRANSMITTER-RECEIVER 失效
公开(公告)号：JPH04271536A
公开(公告)日：1992-09-28
申请号：JP5400291
申请日：1991-02-26
申请人： TOSHIBA CORP
发明人： MURAKAMI TETSUYA
IPC分类号： H04L1/00 , H04L1/08
摘要： PURPOSE:To attain error correction at data transmission by comparing and checking sent codes and to correct a data error without re-transmission of the data. CONSTITUTION:A communication program converts sent data into codes and sends each code twice. Then the communication program compares and checks the sent codes, corrects them automatically and converts the codes into data. In the comparison check automatic correction, codes sent twice each are compared and when they are identical to each other, it is discriminated that there is no error, and when one of the codes is not an element of a set of the codes used for data transmission, the code of an element of the other set is discriminated to be correct because the code is not the element of the set resulting from the occurrence of an error. Thus, comparison check and automatic correction are attained.

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