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    • 8. 发明专利
    • Nonvolatile semiconductor memory device
    • 非易失性半导体存储器件
    • JP2009158018A
    • 2009-07-16
    • JP2007335552
    • 2007-12-27
    • Toshiba CorpToshiba Memory Systems Co Ltd東芝メモリシステムズ株式会社株式会社東芝
    • SHIRAKAWA MASANOBUTOKIWA NAOYA
    • G11C29/04G11C16/04G11C16/06
    • G11C16/20G11C16/0483G11C29/82
    • PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device in which defective address registration capacity is reduced. SOLUTION: The nonvolatile semiconductor memory device includes: a memory cell array consisting of a plurality of blocks in which electrically re-writable nonvolatile memory cells are arranged; a defective block position information registration region which is set in the memory cell array and stores defective block position information; an address decode circuit for performing block selection of the memory cell array; and a defective block flag latch which is provided in the address decode circuit and in which a defective block flag is set based on defective block position information read out from the defective block position information registration region of the memory cell array. In the defective block position information of the defective block position information registration region, a block position in a plurality of blocks and a column position in one page being as cell range in which the memory cell array is accessed simultaneously are corresponded with 1:1 and one bit is allotted for one block. COPYRIGHT: (C)2009,JPO&INPIT
    • 要解决的问题:提供一种其中减少了不良地址注册能力的非易失性半导体存储器件。 解决方案:非易失性半导体存储器件包括:由多个块组成的存储单元阵列,其中布置有电可重写的非易失性存储单元; 缺陷块位置信息登记区域,其被设置在存储单元阵列中并存储缺陷块位置信息; 地址解码电路,用于执行存储单元阵列的块选择; 以及设置在地址解码电路中的缺陷块标志锁存器,其中基于从存储单元阵列的缺陷块位置信息登记区域读出的缺陷块位置信息来设置有缺陷块标志。 在缺陷块位置信息登记区域的缺陷块位置信息中,多个块中的块位置和作为同时访问存储单元阵列的单元范围的一页中的列位置对应于1:1和 一个位被分配一个块。 版权所有(C)2009,JPO&INPIT