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    • 2. 发明专利
    • Semiconductor storage device
    • 半导体存储设备
    • JP2013120786A
    • 2013-06-17
    • JP2011266996
    • 2011-12-06
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIFUKUMOTO ATSUSHI
    • H01L21/336H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L29/7827H01L21/28008H01L27/11578H01L27/11582
    • PROBLEM TO BE SOLVED: To provide a highly-reliable semiconductor storage device.SOLUTION: According to an embodiment, a semiconductor storage device comprises: a substrate; a laminate having a plurality of electrode layers and a plurality of insulation layers which are alternately laminated on the substrate one by one; a cap film provided next to the electrode layer in a hole that penetrates the laminate; an insulation film provided on a sidewall of the cap film and including a charge storage film; and a channel body provided on a sidewall of the insulation film. The cap film includes a projection projecting toward the insulation film. The cap film has a thicker film thickness in a projection direction at a part where the projection is provided than a film thickness at another part where the projection is not provided.
    • 要解决的问题:提供高可靠性的半导体存储装置。 解决方案:根据实施例,半导体存储装置包括:基板; 具有多个电极层和多个绝缘层的层压体,其一个接一个地交替层压在所述基板上; 在穿过层叠体的孔中的电极层附近设置的盖膜; 设置在所述盖膜的侧壁上并具有电荷存储膜的绝缘膜; 以及设置在绝缘膜的侧壁上的通道体。 盖膜包括向绝缘膜突出的突起。 在没有设置突起的另一部分,盖膜在设置突起部分的投影方向具有较厚的膜厚度。 版权所有(C)2013,JPO&INPIT
    • 3. 发明专利
    • Nonvolatile semiconductor memory device, and method of manufacturing the same
    • 非挥发性半导体存储器件及其制造方法
    • JP2011198963A
    • 2011-10-06
    • JP2010063327
    • 2010-03-18
    • Toshiba Corp株式会社東芝
    • FUKUMOTO ATSUSHIAISO FUMIKINAKAO TAKASHIKAI TETSUYA
    • H01L21/8247H01L27/115H01L29/788H01L29/792
    • PROBLEM TO BE SOLVED: To provide a highly integrated nonvolatile semiconductor memory device and a method of manufacturing the same.SOLUTION: The nonvolatile semiconductor memory device 1 includes: a laminate ML in which a plurality of insulating films 15 and electrode films 14 are alternately laminated; a silicon pillar 31 extending in a laminating direction of the insulating films 15 and the electrode films 14 in the laminate ML; and a charge storage layer 26 between the electrode film 14 and the silicon pillar 31. The silicon pillar 31 is provided with a peripheral part 41 provided along a full length of the silicon pillar 31 and composed of silicon containing impurity and a central part 42 provided along the full length of the silicon pillar 31 and constituted by silicon containing impurity and oxygen. An oxygen concentration in the central part 42 is made higher than the oxygen concentration in the peripheral part 41, and a composition of the central part 42 is SiO(0
    • 要解决的问题:提供一种高度集成的非易失性半导体存储器件及其制造方法。解决方案:非易失性半导体存储器件1包括:层叠ML,其中多个绝缘膜15和电极膜14交替层叠 ; 在绝缘膜15的层叠方向上延伸的硅柱31和层叠体ML中的电极膜14; 以及在电极膜14和硅柱31之间的电荷存储层26.​​硅柱31设置有沿着硅柱31的全长设置并由含硅杂质构成的周边部41和设置有中心部42的中心部42 沿着硅柱31的全长,并由含硅杂质和氧构成。 使中心部分42的氧浓度高于周边部分41中的氧浓度,中心部分42的组成为SiO(0
    • 5. 发明专利
    • Method of manufacturing semiconductor device
    • 制造半导体器件的方法
    • JP2011060956A
    • 2011-03-24
    • JP2009208265
    • 2009-09-09
    • Toshiba Corp株式会社東芝
    • ISHIDA KOICHIAISO FUMIKINAKAO TAKASHIKAI WAKANAFUKUMOTO ATSUSHI
    • H01L27/10
    • PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device including a diode having an impurity region small in film thickness and having sufficient impurity concentration.
      SOLUTION: This method of manufacturing a semiconductor device includes processes of: forming an amorphous silicon layer 105; adsorbing an impurity layer 106 on the silicon layer 105 using a gas; forming an amorphous silicon layer 107 on the impurity layer 106; adsorbing an impurity layer 108 on the silicon layer 107 using another gas; forming an amorphous silicon layer 109 on the impurity layer 108; forming a lower electrode layer 15 on the silicon layer 109; forming a variable resistance layer 11 on the lower electrode layer; forming an upper electrode layer 16 on the variable resistance layer; forming a columnar structure by patterning the upper electrode layer, the variable resistance layer, the lower electrode layer, the silicon layer 109, the impurity layer 108, the silicon layer 107, the impurity layer 106, and the silicon layer 105; and applying heat after forming the silicon layer 109.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:提供一种制造半导体器件的方法,该半导体器件包括具有薄膜厚度小且杂质浓度较高的杂质区的二极管。 解决方案:这种制造半导体器件的方法包括以下工艺:形成非晶硅层105; 使用气体在硅层105上吸附杂质层106; 在杂质层106上形成非晶硅层107; 使用另一气体在硅层107上吸附杂质层108; 在杂质层108上形成非晶硅层109; 在硅层109上形成下电极层15; 在下电极层上形成可变电阻层11; 在可变电阻层上形成上电极层16; 通过图案化上电极层,可变电阻层,下电极层,硅层109,杂质层108,硅层107,杂质层106和硅层105形成柱状结构; 并且在形成硅层109之后施加热量。版权所有(C)2011,JPO&INPIT