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    • 1. 发明专利
    • Semiconductor memory device
    • 半导体存储器件
    • JP2013055204A
    • 2013-03-21
    • JP2011192011
    • 2011-09-02
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKI
    • H01L21/8247H01L21/336H01L27/115H01L29/788H01L29/792
    • H01L27/11582H01L27/1157
    • PROBLEM TO BE SOLVED: To provide a semiconductor memory device that can obtain sufficient erasing speed.SOLUTION: The semiconductor memory device includes: a substrate; a first stacked body that has a plurality of electrode layers and a plurality of first insulating layers alternately stacked on the substrate; a second stacked body that is provided on the first stacked body and has a selection gate and a second insulating layer provided thereon; a memory film that is provided on a sidewall of a first hole formed with penetration through the first stacked body in the stacking direction; a gate insulating film that is provided on a sidewall of a second hole which is in communication with the first hole and formed with penetration through the second stacked body in the stacking direction; and a channel body that is provided inside the memory film and inside the gate insulating film. A step portion is formed between a side surface of the selection gate and the second insulating layer, and a region located near an upper end of the selection gate of the channel body is being silicide.
    • 要解决的问题:提供可以获得足够的擦除速度的半导体存储器件。 解决方案:半导体存储器件包括:衬底; 第一层叠体,其具有交替层叠在所述基板上的多个电极层和多个第一绝缘层; 第二层叠体,设置在第一层叠体上并具有设置在其上的选择栅极和第二绝缘层; 记录膜,设置在形成为沿堆叠方向穿过第一层叠体的第一孔的侧壁上; 栅极绝缘膜,其设置在与所述第一孔连通并形成为沿所述堆叠方向穿过所述第二堆叠体的第二孔的侧壁上; 以及设置在存储膜内部和栅极绝缘膜内部的通道体。 在选择栅极的侧表面和第二绝缘层之间形成台阶部分,位于沟道主体的选择栅极上端附近的区域是硅化物。 版权所有(C)2013,JPO&INPIT
    • 2. 发明专利
    • Three-dimensional laminate nonvolatile semiconductor memory, and method of manufacturing the same
    • 三维层状非线性半导体存储器及其制造方法
    • JP2011066348A
    • 2011-03-31
    • JP2009217887
    • 2009-09-18
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIOZAWA YOSHIO
    • H01L27/115H01L21/8247H01L29/788H01L29/792
    • PROBLEM TO BE SOLVED: To relax an electric field applied to a tunnel insulating film formed nearby a corner part of a control gate electrode.
      SOLUTION: A three-dimensional laminate nonvolatile semiconductor memory includes a semiconductor layer, a columnar semiconductor region 101 which is formed on the semiconductor layer and perpendicular to the semiconductor layer, a first insulating film 102 formed on a side face of the semiconductor region 101, a charge accumulation film 103 formed on a side face of the first insulating film 102, a second insulating film 104 formed on a side face of the charge accumulation film 103, a plurality of control gate electrodes 105 formed in a flat plate shape parallel to the semiconductor layer in contact with a side face of the second insulating film 104, and a third insulating film 106 formed on respective side faces of the second insulating film 104 and the control gate electrodes 105, wherein the distance of the third insulating film 106 opposed across the semiconductor region 101 is longer than the distance of the control gate electrodes 105 opposed across the semiconductor region 101, and corner parts of the control gate electrodes 105 have curvature.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:放松施加到控制栅电极的角部附近形成的隧道绝缘膜的电场。 解决方案:三维层叠非易失性半导体存储器包括半导体层,形成在半导体层上并垂直于半导体层的柱状半导体区域101,形成在半导体的侧面上的第一绝缘膜102 区域101,形成在第一绝缘膜102的侧面上的电荷累积膜103,形成在电荷累积膜103的侧面上的第二绝缘膜104,形成为平板形状的多个控制栅电极105 平行于与第二绝缘膜104的侧面接触的半导体层,以及形成在第二绝缘膜104和控制栅电极105的各个侧面上的第三绝缘膜106,其中第三绝缘膜 106相对于跨越半导体区域101的控制栅电极105的距离长 ,控制栅电极105的角部具有曲率。 版权所有(C)2011,JPO&INPIT
    • 3. 发明专利
    • Semiconductor memory device, and method of manufacturing the same
    • 半导体存储器件及其制造方法
    • JP2010129594A
    • 2010-06-10
    • JP2008299753
    • 2008-11-25
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIOZAWA YOSHIOKAI TETSUYANATORI KATSUAKISEKINE KATSUYUKI
    • H01L21/8247H01L27/115H01L29/788H01L29/792
    • PROBLEM TO BE SOLVED: To improve charge retention characteristics of a charge storage film with respect to a semiconductor memory device having the charge storage film.
      SOLUTION: The semiconductor memory device (101) having bit lines and word lines includes a substrate (111), a first gate insulating film (121) formed on the substrate, the charge storage film (122) formed on the first gate insulating film, a second gate insulating film (123) formed on the charge storage film, and a gate electrode (124) formed on the second gate insulating film, the width of the charge storage film along the bit lines is narrower than the width of the gate electrode along the bit lines or the width of the charge storage film along the word lines is narrower than the channel width of a channel region formed in the substrate below the first gate insulating film.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 解决方案的问题:提高电荷存储膜相对于具有电荷存储膜的半导体存储器件的电荷保持特性。 具有位线和字线的半导体存储器件(101)包括衬底(111),形成在衬底上的第一栅极绝缘膜(121),形成在第一栅极上的电荷存储膜(122) 绝缘膜,形成在电荷存储膜上的第二栅极绝缘膜(123)和形成在第二栅极绝缘膜上的栅电极(124),沿着位线的电荷存储膜的宽度窄于 沿着位线的栅电极或沿着字线的电荷存储膜的宽度窄于形成在第一栅极绝缘膜下方的衬底中的沟道区的沟道宽度。 版权所有(C)2010,JPO&INPIT
    • 4. 发明专利
    • Nonvolatile semiconductor storage device and manufacturing method thereof
    • 非易失性半导体存储器件及其制造方法
    • JP2011049239A
    • 2011-03-10
    • JP2009194542
    • 2009-08-25
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIOZAWA YOSHIOSEKINE KATSUYUKIFUJITSUKA RYOTA
    • H01L29/792H01L21/8247H01L27/115H01L29/788
    • H01L29/792H01L21/28282H01L29/4234H01L29/513H01L29/66833
    • PROBLEM TO BE SOLVED: To suppress the increase of the energies of electrons leaked from a control gate electrode, and to prevent the deterioration of the insulating properties of a tunnel insulating film.
      SOLUTION: A nonvolatile semiconductor storage device includes a semiconductor layer 101, a first insulating film 102 formed on the surface of the semiconductor layer 101, and a charge storage film 103 formed on the surface of the first insulating film 102. The nonvolatile semiconductor storage device, further, includes a second insulating film 104 formed on the surface of the charge storage film and a control gate electrode 105, formed on the surface of the second insulating film 104. At least one layer of nonelastic scattering layers that reduce the energies of the electrons by scattering is contained in at least one of the charge storage film 103 and the second insulating film 104.
      COPYRIGHT: (C)2011,JPO&INPIT
    • 要解决的问题:抑制从控制栅电极泄漏的电子的能量的增加,并且防止隧道绝缘膜的绝缘性能的劣化。 解决方案:非易失性半导体存储装置包括半导体层101,形成在半导体层101的表面上的第一绝缘膜102和形成在第一绝缘膜102的表面上的电荷存储膜103.非挥发性半导体存储装置 半导体存储装置还包括形成在电荷存储膜的表面上的第二绝缘膜104和形成在第二绝缘膜104的表面上的控制栅电极105.至少一层非弹性散射层减少 电荷存储膜103和第二绝缘膜104中的至少一个中包含通过散射的电子的能量。(C)2011,JPO&INPIT
    • 5. 发明专利
    • 不揮発性記憶装置およびその製造方法
    • 非易失存储器件及其制造方法
    • JP2015056444A
    • 2015-03-23
    • JP2013187523
    • 2013-09-10
    • 株式会社東芝Toshiba Corp
    • HIGUCHI MASAAKIKITO TAKASHISHINGU MASAO
    • H01L21/8247H01L21/336H01L27/115H01L29/788H01L29/792
    • H01L27/11582H01L27/1157H01L29/66833H01L29/7926
    • 【課題】実施形態は、メモリホールの閉塞を防ぎ、製造歩留りを向上させることが可能な不揮発性記憶装置およびその製造方法を提供する。【解決手段】実施形態に係る不揮発性記憶装置は、第1の層と、前記第1の層上に設けられた第2の層と、前記第2の層上に積層された複数の導電膜を含む積層体と、前記積層体と前記第2の層を貫通し前記第1の層に至る半導体ピラーと、を備える。前記半導体ピラーは、その延在方向に沿って設けられた半導体膜と、前記半導体膜の周りを覆うメモリ膜と、を含み、前記メモリ膜は、前記積層体と前記半導体膜との間に設けられた第1の部分と、前記第2の層と前記半導体膜との間に設けられた第2の部分と、を有する。前記延在方向に垂直な平面内における前記第2の部分の外周は、前記積層体の前記第2の層側における前記第1の部分の外周よりも広い。【選択図】図2
    • 要解决的问题:提供一种能够防止存储孔被阻塞并提高制造成品率的非易失性存储装置及其制造方法。解决方案:根据实施例的非易失性存储装置包括:第一层; 设置在第一层上的第二层; 层叠在所述第二层上的多个导电膜的层叠体; 以及穿透层压体和第二层以到达第一层的半导体柱。 半导体柱包括沿着半导体柱的延伸方向设置的半导体膜和覆盖半导体膜的周围区域的存储膜。 记忆膜具有设置在层压体和半导体膜之间的第一部分和设置在第二层和半导体膜之间的第二部分。 垂直于延伸方向的平面中的第二部分的圆周比层叠体的第二层侧的第一部分的周长宽。
    • 6. 发明专利
    • Semiconductor memory device
    • 半导体存储器件
    • JP2013187421A
    • 2013-09-19
    • JP2012052273
    • 2012-03-08
    • Toshiba Corp株式会社東芝
    • YASUDA NAOKIHIGUCHI MASAAKISEKINE KATSUYUKISHINGU MASAO
    • H01L21/336H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L27/11582G11C16/0483
    • PROBLEM TO BE SOLVED: To provide a semiconductor memory device with improved data retention property and erasability.SOLUTION: A semiconductor memory device includes a substrate, a structure, a semiconductor layer, and a memory film. The structure has a plurality of electrode films and a plurality of insulating films that are alternately stacked. The semiconductor layer penetrates through the structure. The memory film is provided between the semiconductor layer and the plurality of electrode films. The memory film has a charge storage film, a block film, and a tunnel film. The block film is provided between the charge storage film and the plurality of electrode films. The tunnel film is provided between the charge storage film and the semiconductor layer. The tunnel film has a first film and a second film containing silicon oxide, and a third film provided between the first film and the second film and containing silicon oxynitride. When the composition of silicon oxynitride contained in the third film is expressed by the ratio of silicon oxide x and the ratio of silicon nitride (1-x), the following formula is satisfied: 0.5≤x
    • 要解决的问题:提供具有改进的数据保存性能和可擦除性的半导体存储器件。解决方案:半导体存储器件包括衬底,结构,半导体层和存储膜。 该结构具有交替层叠的多个电极膜和多个绝缘膜。 半导体层穿透结构。 存储膜设置在半导体层和多个电极膜之间。 记忆膜具有电荷存储膜,阻挡膜和隧道膜。 阻挡膜设置在电荷存储膜和多个电极膜之间。 隧道膜设置在电荷存储膜和半导体层之间。 隧道膜具有第一膜和含有氧化硅的第二膜,以及设置在第一膜和第二膜之间并含有氮氧化硅的第三膜。 当第三膜中所含的氮氧化硅的组成由氧化硅x与氮化硅(1-x)的比率表示时,满足下式:0.5≤x<1。
    • 7. 发明专利
    • Nonvolatile semiconductor storage device and method of manufacturing same
    • 非易失性半导体存储器件及其制造方法
    • JP2010123591A
    • 2010-06-03
    • JP2008292980
    • 2008-11-17
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIOZAWA YOSHIOKAI TETSUYA
    • H01L21/8247H01L21/316H01L27/115H01L29/788H01L29/792
    • PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor storage device having excellent charge retention characteristics, and a method of manufacturing the same.
      SOLUTION: The nonvolatile semiconductor storage device includes: a tunnel insulating film 12 having a first insulating film 12a formed on a principal surface of a semiconductor substrate 1 and containing at least nitrogen, a second insulating film 12b formed on the first insulating film 12a and containing at least silicon and oxygen, a third insulating film 12e formed on the second insulating film 12b and containing at least silicon and nitrogen, and a fourth insulating film 12d formed on the third insulating film 12e and containing at least silicon and nitrogen; a charge storage layer 13 formed on the tunnel insulating film 12; a block insulating film 15 formed on the charge storage layer 12; and a control gate 16 formed on the block insulating film 15, wherein nitrogen concentration in the third insulating film 12e is higher at an interface with the second insulating film 12b than at an interface with the fourth insulating film 12d.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 解决的问题:提供具有优异的电荷保持特性的非易失性半导体存储装置及其制造方法。 解决方案:非易失性半导体存储装置包括:隧道绝缘膜12,其具有形成在半导体衬底1的主表面上并至少包含氮的第一绝缘膜12a,形成在第一绝缘膜上的第二绝缘膜12b 12a并且至少含有硅和氧,形成在第二绝缘膜12b上并至少包含硅和氮的第三绝缘膜12e和形成在第三绝缘膜12e上并至少包含硅和氮的第四绝缘膜12d; 形成在隧道绝缘膜12上的电荷存储层13; 形成在电荷存储层12上的块绝缘膜15; 以及形成在块绝缘膜15上的控制栅极16,其中第三绝缘膜12e中的氮浓度在与第二绝缘膜12b的界面处比在与第四绝缘膜12d的界面处更高。 版权所有(C)2010,JPO&INPIT
    • 8. 发明专利
    • Nonvolatile semiconductor memory device and operation method thereof
    • 非易失性半导体存储器件及其操作方法
    • JP2014013634A
    • 2014-01-23
    • JP2012150023
    • 2012-07-03
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKISEKINE KATSUYUKIKATSUMATA RYUTAHAZAMA HIROAKI
    • G11C16/06G11C16/02G11C16/04H01L21/336H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L29/792G11C5/063G11C16/0408G11C16/0466G11C16/0483G11C16/14G11C16/3436H01L27/1052H01L27/1157H01L27/11582H01L29/7926
    • PROBLEM TO BE SOLVED: To provide a nonvolatile semiconductor memory device in which an over-erased state of a memory cell is eliminated in erasure operation to prevent deterioration in reliability, and an operation method of the nonvolatile semiconductor memory device.SOLUTION: The nonvolatile semiconductor memory device comprises: a semiconductor substrate; and a memory transistor including a laminate formed by stacking an inter-wordline insulator film and a word line conductive film alternately on the semiconductor substrate, a silicon pillar penetrating through the laminate, a tunnel insulator film provided on a surface of the silicon pillar opposed to the laminate, a charge accumulation layer provided on a surface of the tunnel insulator film opposed to the laminate, and a block insulator film provided on a surface of the charge accumulation layer opposed to the laminate so as to be in contact with the word line conductive film. A voltage is applied to the word line conductive film so that a potential of the silicon pillar with respect to the word line conductive film is reduced as the cross sectional area of the silicon pillar is smaller, thereby performing erasure operation of data in the memory transistor.
    • 要解决的问题:提供一种在擦除操作中消除存储单元的过擦除状态以防止可靠性劣化的非易失性半导体存储器件以及非易失性半导体存储器件的操作方法。解决方案:非易失性半导体 存储器件包括:半导体衬底; 以及存储晶体管,其包括通过在半导体衬底上交替地层叠字形间绝缘体膜和字线导电膜而形成的层叠体,穿透层叠体的硅柱,设置在与所述硅柱相对的硅柱的表面上的隧道绝缘膜 层压体,设置在与层叠体相对的隧道绝缘膜的表面上的电荷蓄积层,以及设置在与层叠体相对的电荷蓄积层的表面上的块状绝缘膜,以与字线导电 电影。 电压被施加到字线导电膜,使得硅柱相对于字线导电膜的电位随着硅柱的横截面积减小而减小,从而进行存储晶体管中的数据的擦除操作 。
    • 9. 发明专利
    • Semiconductor device
    • 半导体器件
    • JP2012195344A
    • 2012-10-11
    • JP2011056437
    • 2011-03-15
    • Toshiba Corp株式会社東芝
    • SEKINE KATSUYUKIHIGUCHI MASAAKI
    • H01L27/115H01L21/336H01L21/8247H01L29/788H01L29/792
    • H01L27/11582
    • PROBLEM TO BE SOLVED: To provide a semiconductor device that can suppress the movement of charges between cells without degrading other characteristics.SOLUTION: A semiconductor device comprises a substrate, a stack, a first insulating film, a charge storage film, a second insulating film, and a channel body. The stack has a plurality of electrode layers and a plurality of insulating layers that are alternately stacked on the substrate. The first insulating film is provided on the sidewall of a hole formed so as to penetrate through the stack. The charge storage film is provided inside the first insulating film in the hole. The charge storage film projects toward the electrode layers at the portions facing the electrode layers, and has a salients thicker than the other portions. The second insulating film is provided inside the charge storage film. The channel body is provided inside the second insulating film.
    • 要解决的问题:提供能够抑制电池之间的电荷的移动而不降低其他特性的半导体器件。 解决方案:半导体器件包括衬底,堆叠,第一绝缘膜,电荷存储膜,第二绝缘膜和通道体。 叠层具有交替层叠在基板上的多个电极层和多个绝缘层。 第一绝缘膜设置在形成为穿透堆叠的孔的侧壁上。 电荷存储膜设置在孔内的第一绝缘膜的内部。 电荷存储膜在面对电极层的部分朝向电极层突出,并且具有比其它部分更厚的凸极。 第二绝缘膜设置在电荷存储膜的内部。 通道体设置在第二绝缘膜的内部。 版权所有(C)2013,JPO&INPIT
    • 10. 发明专利
    • Semiconductor memory
    • 半导体存储器
    • JP2012069709A
    • 2012-04-05
    • JP2010212846
    • 2010-09-22
    • Toshiba Corp株式会社東芝
    • HIGUCHI MASAAKIFUJITA JUNYA
    • H01L21/8247H01L27/115H01L29/788H01L29/792
    • H01L27/11582H01L21/28273H01L29/7926
    • PROBLEM TO BE SOLVED: To provide a semiconductor memory having high operating speed.SOLUTION: A semiconductor memory comprises: a stack in which a plurality of insulating films and a plurality of electrode films are alternately stacked and in which through holes extending in the stacked direction of the insulating films and the electrode films are formed; blocking layers provided on the inner surfaces of the through holes; carrier storage layers surrounded by the blocking layers; tunnel layers surrounded by the carrier storage layers; and semiconductor pillars surrounded by the tunnel layers. The dielectric constant in portions at the semiconductor pillars sides in the tunnel layers is higher than that in portions at the carrier storage layers sides in the tunnel layers.
    • 要解决的问题:提供具有高操作速度的半导体存储器。 解决方案:半导体存储器包括:叠层,其中多个绝缘膜和多个电极膜交替堆叠,并且其中形成在绝缘膜和电极膜的堆叠方向上延伸的通孔; 设置在通孔的内表面上的阻挡层; 由阻挡层包围的载体储存层; 由载体存储层包围的隧道层; 以及由隧道层围绕的半导体柱。 在隧道层中的半导体柱侧的部分的介电常数高于隧道层中的载流子存储层侧的部分的介电常数。 版权所有(C)2012,JPO&INPIT