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1. 发明专利

JPH09283529A MANUFACTURE AND INSPECTION OF SEMICONDUCTOR SUBSTRATE 失效
公开(公告)号：JPH09283529A
公开(公告)日：1997-10-31
申请号：JP3211197
申请日：1997-02-17
申请人： TOSHIBA MICRO ELECTRONICS , TOSHIBA CORP
发明人： MIYASHITA MORIYA , OGINO MASANOBU , HOSHI TADAHIDE , NUMANO MASAKUNI , SAMATA SHUICHI , SEKIHARA AKIKO , AKITA KEIKO
IPC分类号： H01L21/66 , H01L21/322
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a semiconductor substrate which denuded zone(DZ) layer deep enough to prevent adverse influences to device characteristics is formed while avoiding a high-temperature annealing process at the time of manufacturing a semiconductor device with use wafer, and also to provide a method for suitably inspecting a density of oxygen precipitation (BMD) in the semiconductor substrate. SOLUTION: In the semiconductor substrate manufacturing method, oxygen precipitation nuclei are precipitated for a silicon single crystal having a region containing a first concentration of boron exceeding a predetermined value within a predetermined region on one major surface side, or oxygen precipitations are grown from the oxygen precipitation nuclei. Next, the substrate is annealed in a temperature range which is higher than a temperature of a first annealing step, sufficiently higher to reduce the oxygen precipitation nuclei or the oxygen precipitations grown therefrom and sufficiently lower to such an extent that boron re-distribution does not affect the oxygen precipitations to form a predetermined depth of denuded layer within the predetermined zone on one major surface side. The semiconductor substrate inspecting method further includes a step of measuring a density of odes of the oxygen precipitations grown from the oxygen precipitation nuclei precipitated within the silicon single crystal, following the above annealing process.

2. 发明专利

JPH08195481A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH08195481A
公开(公告)日：1996-07-30
申请号：JP633995
申请日：1995-01-19
申请人： TOSHIBA CORP
发明人： NUMANO MASAKUNI , SAMATA SHUICHI
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/108
摘要： PURPOSE: To increase the area of a capacitor without complicating the manufacturing process of a semiconductor element and enabling miniaturization. CONSTITUTION: This semiconductor device has a semiconductor substrate 11, a storage electrode 14, which is made by stacking polycrystalline silicon in the section on which to form a capacitor of this semiconductor substrate, an oxide film 18, which is made discontinuously or unequally on the surface of this storage electrode 14, and a granular selectively grown silicon layer 15 which is selectively grown in vapor phase on this oxide film 18.

3. 发明专利

JP2006216854A Manufacturing method for semiconductor device 有权
标题翻译：半导体器件的制造方法
公开(公告)号：JP2006216854A
公开(公告)日：2006-08-17
申请号：JP2005029454
申请日：2005-02-04
申请人： Toshiba Corp , 株式会社東芝
发明人： HONDA AKIRA , TSUTSUMI KAORI , MURAKAMI KAZUHIRO , NUMANO MASAKUNI , NAGAMATSU TAKAHITO , HARAKAWA HIDEAKI , MATSUYAMA HIDETO , EZAWA HIROKAZU , KANEKO HISAFUMI
IPC分类号： H01L21/28 , H01L21/3065 , H01L21/768
CPC分类号： H01L21/76802 , H01L21/02063 , H01L21/31116 , H01L21/76814
摘要： PROBLEM TO BE SOLVED: To solve the problem wherein it is difficult to sufficiently remove a damaged layer or a natural oxide film within a contact hole.
SOLUTION: The contact hole 14 for exposing an electrically conductive layer 12 is formed by subjecting an insulating film 13 to dry-etching, the plasma excited from an oxidizing gas is supplied onto the exposed electrically conductive layer 12 to subject the damaged layer 15 formed within the contact hole 14 to dry cleaning, a product 16 formed within the contact hole 14 by the dry cleaning is removed by wet treatment, dry treatment is carried out using a gas containing either NF
3 or HF, the natural oxide film 17 formed within the contact hole 14 by the wet treatment is etched, and the product formed by the etching is removed by heat treatment.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了解决难以充分地除去接触孔内的损伤层或自然氧化膜的问题。解决方案：用于暴露导电层12的接触孔14是通过对绝缘膜13进行干蚀刻来形成的，将从氧化气体激发的等离子体供应到暴露的导电层12上以使受损层 15，形成在接触孔14内以进行干洗，通过湿式处理除去形成在接触孔14内的通过干式清洁的产品16，使用含有NF 3 SB 3的气体进行干法处理 HF中，蚀刻通过湿式处理形成在接触孔14内的自然氧化膜17，并且通过热处理除去由蚀刻形成的产物。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2003332457A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2003332457A
公开(公告)日：2003-11-21
申请号：JP2003123705
申请日：2003-04-28
申请人： Toshiba Corp , 株式会社東芝
发明人： USHIKU YUKIHIRO , INABA SATOSHI , TAKAHASHI MINORU , YAGISHITA JUNJI , OKAYAMA YASUNORI , MATSUSHITA YOSHIAKI , KUBOTA HIROYASU , TSUCHIYA NORIHIKO , NUMANO MASAKUNI , HAYASHI YOSHIKI
IPC分类号： H01L21/76 , H01L21/8234 , H01L21/8238 , H01L21/8242 , H01L27/08 , H01L27/088 , H01L27/092 , H01L27/108 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device, preventing crystal defects caused by an embedded element isolation or introduction of impurities. SOLUTION: The semiconductor device is equipped with a semiconductor substrate and a MOS-type semiconductor element formed in the element region of the semiconductor substrate while at least one corner of the element region or the end parts of the same, which are superposed on a gate electrode, are given a concentration of impurities, which is lower than those of the element region. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种半导体器件，防止嵌入元件分离或引入杂质引起的晶体缺陷。解决方案：半导体器件配备有半导体衬底和形成在半导体衬底的元件区域中的MOS型半导体元件，而元件区域或其端部的至少一个角是重叠的在栅电极上给出的杂质浓度低于元件区域的浓度。版权所有（C）2004，JPO

5. 发明专利

JPH1022377A SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH1022377A
公开(公告)日：1998-01-23
申请号：JP17352496
申请日：1996-07-03
申请人： TOSHIBA CORP
发明人： MIYASHITA MORIYA , NUMANO MASAKUNI
IPC分类号： H01L21/762 , H01L21/02 , H01L21/265 , H01L21/304 , H01L21/322 , H01L21/76 , H01L27/12
摘要： PROBLEM TO BE SOLVED: To improve the insulation and crystal characteristics of a thin film SOI(silicon on insulator) layer by a partly removed buried oxide film and surface oxide film. SOLUTION: A silicon oxide film 2 is formed on one side of an Si single crystal substrate 1. Oxygen ions are implanted into the substrate through regions not covered with the film 2 to form a surface oxide film 3. Si single crystal portions 4 are formed epitaxially on regions where the Si single crystal is exposed. An Si single crystal substrate 5 separate from that substrate 1 is adhered and one side is polished to expose the ion-implanted surface oxide film 3 on the surface. This exposed film 3 serves for a reference for forming a pattern by the photolithography and is adapted to scribe line regions between chips which are used for isolating elements or have no elements formed.

6. 发明专利

JPH09251961A HEAT-TREATING BOAT 失效
公开(公告)号：JPH09251961A
公开(公告)日：1997-09-22
申请号：JP5974296
申请日：1996-03-15
申请人： TOSHIBA CORP
发明人： NUMANO MASAKUNI , UDOU SUKEMUNE , HOSOKI YOSHISATO
IPC分类号： B65G49/07 , H01L21/205 , H01L21/22 , H01L21/31 , H01L21/324 , H01L21/673 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To prevent wafers from slipping in heat-treating thereof by placing the wafers on warp-adaptive slopes of wafer mounting parts. SOLUTION: Posts 11-14 are connected by wafer mounting parts disposed at the same height as the posts to mount wafers 21. Slopes at an angle α corresponding to the warp of the wafers 21 are formed on wafer mounting faces 11a, 14a of grooves of a boat. The wafers are mounted on the slopes and heat- treated. A wafer mounting table has a radius of curvature of 0.5mm or more and the wafer 21 is mounted on this curve face. Thus, it is possible to reduce the slip due to the warp of the wafer and the boat groove.

7. 发明专利

JPH08279515A SILICON SEMICONDUCTOR SUBSTRATE AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JPH08279515A
公开(公告)日：1996-10-22
申请号：JP8160895
申请日：1995-04-07
申请人： TOSHIBA CORP
发明人： NUMANO MASAKUNI , SAMATA SHUICHI
IPC分类号： H01L21/322
摘要： PURPOSE: To suppress the residual lattice strain by the lattice constant difference due to fine defective density difference near surface by a method wherein the fine defective density within a specific range from the surface of a silicon semiconductor substrate after deposition heat treatment is specified to be in the region within a specific range. CONSTITUTION: A silicon semiconductor substrate is deposition heat-treated meeting the requirements for specifying the interlattice oxygen concentration ratio inside exceeding 50μm to the part not exceeding 3μm from the surface of said substrate to be exceeding four times as well as said concentration in the part not exceeding 3μm to be not exceeding 3×10 atoms/cm for deposition heat treatment. After the heat treatment, the fine defective density of 100μm-500μm from the surface is specified to be in the region of 5×10 -10 cm . Through these procedures, the residual lattice strain by the lattice constant difference due to the fine defective density difference near the surface of the silicon semiconductor substrate can be suppressed.

8. 发明专利

JPH08279462A VAPOR GROWTH METHOD 失效
公开(公告)号：JPH08279462A
公开(公告)日：1996-10-22
申请号：JP8160795
申请日：1995-04-07
申请人： TOSHIBA CORP
发明人： NUMANO MASAKUNI
IPC分类号： H01L21/205 , H01L21/20 , H01L21/265
摘要： PURPOSE: To secure even thickness in depositing and growing simultaneously a polycrystalline layer and a single-crystal layer by conducting a vapor growth method after device separation. CONSTITUTION: A technique of conducting a vapor growth method after damaging both an insulating material layer 2 and an exposed silicon wafer part 3 is employed for the process of simultaneously growing a polycrystalline silicon 7 on the insulating material layer 2 and a single-crystal silicon 6 on the exposed silicon wafer part 3, thus eliminateting what is called 'waiting time'.

9. 发明专利

JPH08274287A MOS SOI SUBSTRATE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH08274287A
公开(公告)日：1996-10-18
申请号：JP7335695
申请日：1995-03-30
申请人： TOSHIBA CERAMICS CO , TOSHIBA CORP
发明人： SUGIZAKI SHINICHI , NUMANO MASAKUNI , AMAI TSUTOMU , SAITO YOSHIHIKO
IPC分类号： H01L21/8242 , H01L21/02 , H01L21/322 , H01L27/108 , H01L27/12 , H01L29/786
摘要： PURPOSE: To provide a method of manufacturing a MOS SOI substrate, wherein a DRAM of trench capacitor cell structure can be lessened in fraction defective caused by discharge or storage of electric charge of a trench capacitor due to oxygen deposits in a semiconductor substrate when a DRAM is formed on the MOS SOI substrate. CONSTITUTION: A MOS SOI substrate is composed of a semiconductor substrate 1, an insulating layer 3 formed on the substrate 1, and a single crystal semiconductor thin film 5 provided onto the insulating layer 3, wherein oxygen deposits of the semiconductor substrate 1 are so set in density as to be below 2×10 (cm ) in a surface layer 7 10μm in thickness and above 5×10 (cm ) in an inner layer 9.

10. 发明专利

JPH08274104A SEMICONDUCTOR SUBSTRATE AND ITS MANUFACTURE 失效
公开(公告)号：JPH08274104A
公开(公告)日：1996-10-18
申请号：JP7361595
申请日：1995-03-30
申请人： TOSHIBA CORP
发明人： UENO YOSHIHIRO , AMAI TSUTOMU , NUMANO MASAKUNI , SAITO YOSHIHIKO
IPC分类号： H01L21/322
摘要： PURPOSE: To reduce deterioration of mechanical strength and failed devices by decreasing oxygen deposit. CONSTITUTION: In a method for manufacturing a semiconductor substrate where an area near the surface of the semiconductor is made flawless, a process for introducing the semiconductor substrate into a reducing atmosphere, inert gas, or mixed gas, a process for increasing the temperature of the reducing atmosphere, inert gas, or the mixed gas from 700 to 900 deg.C within 60 minutes, and a process for performing heat treatment at least at a temperature of 1,100 deg.C for 30 minutes are provided, thus reducing the occurrence of dislocation in the semiconductor substrate due to distortion and the stress caused by high- temperature heat treatment.

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