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1. 发明专利

JP2014103142A Semiconductor device and display device 有权
标题翻译：半导体器件和显示器件
公开(公告)号：JP2014103142A
公开(公告)日：2014-06-05
申请号：JP2012252106
申请日：2012-11-16
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所 , Sharp Corp , シャープ株式会社
发明人： MIYAKE HIROYUKI , YAMAZAKI SHUNPEI , TANADA YOSHIFUMI , SATO MANABU , SASAKI TOSHINARI , OKAZAKI KENICHI , HIZUKA JUNICHI , MATSUO TAKUYA , MATSUKIZONO HIROSHI , KANZAKI YOSUKE , MORI SHIGEYASU
IPC分类号： H01L29/786 , G02F1/1343 , H01L21/336
CPC分类号： H01L27/1225 , H01L27/124 , H01L29/78648
摘要： PROBLEM TO BE SOLVED: To provide a highly-reliable semiconductor device in which a threshold voltage of a transistor can be controlled.SOLUTION: A semiconductor device includes: a transistor having a gate electrode 116, a gate insulating film 117 formed on the gate electrode, a semiconductor layer 118 formed on the gate insulating film, and a source electrode 120 and a drain electrode 122 formed on the semiconductor layer; a first insulating film 124 formed of an inorganic material on the transistor; a second insulating film 126 formed of an organic material on the first insulating film; a first conductive film 128 formed on the second insulating film and formed in a region overlapped with the semiconductor layer; a third insulating film 138 formed of an inorganic material on the first conductive film; and a second conductive film 148 formed on the third insulating film and formed in a region overlapped with the first conductive film. An absolute value of a first potential given to the first conductive film is larger than that of a second potential given to the second conductive film.
摘要翻译：要解决的问题：提供可以控制晶体管的阈值电压的高可靠性的半导体器件。解决方案：一种半导体器件包括：具有栅极电极116的晶体管，形成在栅电极上的栅极绝缘膜117 形成在栅极绝缘膜上的半导体层118以及形成在半导体层上的源电极120和漏电极122; 由晶体管上的无机材料形成的第一绝缘膜124; 在第一绝缘膜上由有机材料形成的第二绝缘膜126; 形成在第二绝缘膜上并形成在与半导体层重叠的区域中的第一导电膜128; 在第一导电膜上由无机材料形成的第三绝缘膜138; 以及形成在第三绝缘膜上并形成在与第一导电膜重叠的区域中的第二导电膜148。给予第一导电膜的第一电位的绝对值大于给予第二导电膜的第二电位的绝对值。

2. 发明专利

JP2014010864A Pulse output circuit, display device, and electronic apparatus 有权
标题翻译：脉冲输出电路，显示设备和电子设备
公开(公告)号：JP2014010864A
公开(公告)日：2014-01-20
申请号：JP2012146791
申请日：2012-06-29
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： TANADA YOSHIFUMI , SATO MANABU
IPC分类号： G11C19/28 , G02F1/133 , G02F1/1368 , G09G3/20 , G09G3/36 , G11C19/00 , H01L29/786 , H03K17/06
摘要： PROBLEM TO BE SOLVED: To reduce a stress due to potential variation of one of the source and drain of a transistor.SOLUTION: In a structure, the high-level potential of a control signal such as a clock signal is reduced, and a boosting unit is separately provided in an output unit of a pulse output circuit. This structure allows the amplitude of an output signal to be compensated while reducing stress due to the potential variation of one of a source and drain of a transistor. In this case, to bring the transistor into an OFF state, a potential difference between the low level potential of the control signal and the power supply potential on a low-potential side is set to 0 or within a fixed value range.
摘要翻译：要解决的问题：减少由于晶体管的源极和漏极之一的电位变化引起的应力。解决方案：在一种结构中，诸如时钟信号的控制信号的高电位电位降低，并且增强单元分别设置在脉冲输出电路的输出单元中。该结构允许补偿输出信号的幅度，同时减少由于晶体管的源极和漏极之一的电位变化引起的应力。在这种情况下，为了使晶体管成为截止状态，控制信号的低电平电位与低电位侧的电源电位之间的电位差被设定为0或者在固定值范围内。

3. 发明专利

JP2010219511A Nonvolatile semiconductor memory device and method for manufacturing the same 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：JP2010219511A
公开(公告)日：2010-09-30
申请号：JP2010030134
申请日：2010-02-15
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： ASAMI YOSHINOBU , SATO MANABU
IPC分类号： H01L21/8247 , H01L21/20 , H01L21/336 , H01L27/10 , H01L27/115 , H01L29/786 , H01L29/788 , H01L29/792
CPC分类号： H01L27/11521 , H01L21/84 , H01L27/0207 , H01L27/11519 , H01L27/11526 , H01L27/11546 , H01L27/12 , H01L27/1248 , H01L27/1266
摘要： PROBLEM TO BE SOLVED: To form a nonvolatile memory element which is provided with a floating gate electrode and a high withstand voltage transistor which is provided with a thick gate insulating film over one substrate without increasing a driving voltage of the nonvolatile memory element. SOLUTION: A stacked film of a first insulating film and a second insulating film is formed between an island-shaped semiconductor region and a floating gate electrode of the nonvolatile memory element and between an island-shaped semiconductor region and a gate electrode of the transistor. A part in the first insulating film overlapping with the floating gate electrode is removed, and the insulating film between the island-shaped semiconductor region and the floating gate electrode is formed thinner than the gate insulating film of the transistor. The transistor includes a conductive film which is formed in the same layer as the floating gate electrode and a conductive film which is formed in the same layer as a control gate electrode, and these two conductive films are electrically connected to each other and function as the gate electrodes of the transistor. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：为了形成非易失性存储元件，其设置有在一个衬底上设置有厚栅极绝缘膜的浮栅和高耐压晶体管，而不增加非易失性存储元件的驱动电压。解决方案：在非易失性存储元件的岛状半导体区域和浮置栅电极之间以及在岛状半导体区域和栅电极之间形成第一绝缘膜和第二绝缘膜的叠层膜晶体管。除去与浮栅电极重叠的第一绝缘膜中的一部分，并且形成岛状半导体区域和浮栅之间的绝缘膜比晶体管的栅极绝缘膜更薄。晶体管包括形成在与浮置栅电极相同的层中的导电膜和与控制栅电极形成在同一层中的导电膜，并且这两个导电膜彼此电连接并用作晶体管的栅电极。版权所有（C）2010，JPO＆INPIT

4. 发明专利

JP2014038320A Display device 有权
标题翻译：显示设备
公开(公告)号：JP2014038320A
公开(公告)日：2014-02-27
申请号：JP2013147221
申请日：2013-07-16
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： YOKOYAMA MASATOSHI , KOMORI SHIGEKI , SATO MANABU , OKAZAKI KENICHI , YAMAZAKI SHUNPEI
IPC分类号： G02F1/1368 , H01L21/336 , H01L29/786
CPC分类号： G02F1/1368 , G02F1/133345 , G02F1/134309 , G02F1/13439 , G02F1/136227 , G02F1/136277 , G02F2202/02 , G02F2202/10 , H01L27/1222 , H01L27/1225 , H01L27/1248 , H01L27/1255 , H01L29/04 , H01L29/24 , H01L29/42356 , H01L29/42384 , H01L29/7869
摘要： PROBLEM TO BE SOLVED: To increase reliability of a display device by suppressing a variation in characteristics of a transistor due to released gas from an organic insulating film.SOLUTION: A display device includes a transistor, an organic insulating film which is provided over the transistor in order to reduce unevenness due to the transistor, and a capacitor over the organic insulating film. An entire surface of the organic insulating film is not covered with components of the capacitor (a transparent conductive layer and an inorganic insulating film), and released gas from the organic insulating film can be released to the outside from exposed part of the upper surface of the organic insulating film.
摘要翻译：要解决的问题：通过抑制来自有机绝缘膜的释放气体导致的晶体管的特性变化来提高显示装置的可靠性。解决方案：显示装置包括晶体管，设置在晶体管上的有机绝缘膜以减少由于晶体管引起的不均匀性和在有机绝缘膜上的电容器。有机绝缘膜的整个表面不被电容器（透明导电层和无机绝缘膜）的部件覆盖，并且来自有机绝缘膜的释放气体可以从外部暴露部分释放到外部有机绝缘膜。

5. 发明专利

JP2014030185A Pulse output circuit and semiconductor device 审中-公开
标题翻译：脉冲输出电路和半导体器件
公开(公告)号：JP2014030185A
公开(公告)日：2014-02-13
申请号：JP2013132206
申请日：2013-06-25
申请人： Semiconductor Energy Lab Co Ltd , 株式会社半導体エネルギー研究所
发明人： TANADA YOSHIFUMI , SATO MANABU , MIYAKE HIROYUKI , SASAKI TOSHINARI , OKAZAKI KENICHI , HIZUKA JUNICHI , YAMAZAKI SHUNPEI
IPC分类号： H03K3/356 , G02F1/1368 , H01L21/336 , H01L29/786 , H01L51/50 , H03K19/0175
CPC分类号： H03K3/01 , G09G3/3688 , G11C19/28
摘要： PROBLEM TO BE SOLVED: To provide a high-reliability semiconductor device capable of suppressing the shift of the threshold voltage of a transistor due to degradation.SOLUTION: A pulse output circuit comprises: a first transistor having a drain receiving a clock signal; a second transistor having a source receiving a first power-supply potential and having a drain connected to the drain of the first transistor; a third transistor having a drain receiving a second power-supply potential; a fourth transistor having a source receiving the first power-supply potential and having a drain connected to the drain of the third transistor; a fifth transistor having a source receiving the first power-supply potential and having a drain connected to a gate of the third transistor; and a sixth transistor having one of a source and a drain connected to the drain of the first transistor and having the other of them connected to the gate of the third transistor. The first transistor to the third transistor have back gates that are connected to one another, and the first to sixth transistors have the same conductivity type.
摘要翻译：要解决的问题：提供能够抑制由于劣化导致的晶体管的阈值电压偏移的高可靠性半导体器件。解决方案：脉冲输出电路包括：具有接收时钟信号的漏极的第一晶体管; 第二晶体管，其源极接收第一电源电位并具有连接到第一晶体管的漏极的漏极; 第三晶体管，具有接收第二电源电位的漏极; 第四晶体管，其具有接收第一电源电位的源极，并且具有连接到第三晶体管的漏极的漏极; 第五晶体管，其源极接收第一电源电位并具有连接到第三晶体管的栅极的漏极; 以及第六晶体管，其源极和漏极中的一个连接到第一晶体管的漏极，并且另一个连接到第三晶体管的栅极。第三晶体管至第三晶体管具有彼此连接的后栅极，第一至第六晶体管具有相同的导电类型。

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