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1. 发明专利

JPH0258353A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH0258353A
公开(公告)日：1990-02-27
申请号：JP21020388
申请日：1988-08-24
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO
IPC分类号： H01L21/768 , H01L21/316
摘要： PURPOSE:To form a semiconductor device having an interlayer insulating layer which has satisfactory crack resistance and step coverage by forming the interlayer insulating layer of first and second insulating layers, and disposing the first layer on the side of a semiconductor substrate. CONSTITUTION:A semiconductor substrate 1 containing a semiconductor element, etc., an aluminum alloy conductive layer 2 formed 0.6(mum) thick on the substrate, a first insulating layer 6 formed 0.2(mum) thick by a plasma CVD method using silane, nitrogen suboxide as reaction gases, and a second insulating layer 7 formed 0.6(mum) thick by a normal pressure CVD method using organic silane as reaction gas on the upper face of the layer 6, and an interlayer insulating layer is formed together with the first layer. In this structure, the layer 6 having no problem for crack resistance is disposed on the side in direct contact with the layer 2, and the layer 7 having a slight problem for the crack resistance but satisfactory step coverage is disposed in the shape not in direct contact with the layer 2.

2. 发明专利

JPS6386453A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6386453A
公开(公告)日：1988-04-16
申请号：JP23205386
申请日：1986-09-29
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , OKAMOTO TATSURO , ONO TAKIO , WATABE KIYOTO , KINOSHITA YASUSHI , NISHIKAWA KIICHI
IPC分类号： H01L21/3205
摘要： PURPOSE:To make larger the width of a first conductor film than the width of a wiring even though side etchings are generated and to improve the coverage forms of the step parts of an insulating film by a method wherein the first conductor film is etched using the wiring and parts of the thin films left only on the sidewall parts of this wiring as masks. CONSTITUTION:A thin film 10 consisting of an Si oxide film, a titanium-tungsten alloy film or the like is formed on the surface of a barrier metal film 2 and the surface of a wiring 3 by a CVD method or the like. Then, the thin film 10 is anisotropically etched by a reactive ion etching method or the like and thin films 10a and 10b are left only on the sidewall parts of the wiring 3. Then, the barrier metal film 2 is etched using the wiring 3 and the thin films 10a and 10b as masks to form a barrier metal film 21. At this time, the amounts of side etchings 50a and 50b to be generated are each contrived so as to become smaller than the widths of the bottom surfaces of the thin films 10a and 10b. Then, the thin films 10a and 10b are removed by isotropically etching. As the width of the barrier metal film 21 is larger than that of the wiring 3, the coverage form of an insulating film 60 to be lastly formed is improved.

3. 发明专利

JPS6249735B2 失效
公开(公告)号：JPS6249735B2
公开(公告)日：1987-10-21
申请号：JP19470481
申请日：1981-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , KOTANI HIDEO , YAKUSHIJI HISAO , HARADA HIROTSUGU
IPC分类号： H01L21/768

4. 发明专利

JPS62108531A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS62108531A
公开(公告)日：1987-05-19
申请号：JP24954085
申请日：1985-11-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , NAKAO SHUJI
IPC分类号： H01L21/316 , H01L21/314 , H01L21/318
摘要： PURPOSE:To obtain a semiconductor device having damp-proofing property by forming a coated glass film onto a final protective film being shaped, while coating a semiconductor element on a semiconductor substrate. CONSTITUTION:Glass for coating is manufactured by dissolving an silicon compound into an organic solvent. Glass for coating is applied onto a final protective film 3 through a specified method of application, and baked at a temperature of approximately 400-450 deg.C, thus forming an applying glass film as a thin-film mainly comprising silicon oxide. The glass liquid penetrates into a crack 4 and a pin hole 5 generated in the final protective film 3 through an application process while coating these crack and pinhole, thus shaping a solid mainly comprising silicon oxide through a braking process. Accordingly, the intrusion of moisture, etc. into a semiconductor device is prevented.

5. 发明专利

JPS6124467B2 JPS6124467B2 - 失效
公开(公告)号：JPS6124467B2
公开(公告)日：1986-06-11
申请号：JP4912681
申请日：1981-03-30
申请人： Mitsubishi Electric Corp
发明人： KOTANI HIDEO , MIZUGUCHI KAZUO , OOHAYASHI YOSHIKAZU , DENDA MASAHIKO , SATO SHINICHI
IPC分类号： C23C16/50 , C23C16/509 , H01L21/285
CPC分类号： C23C16/5096

6. 发明专利

JPS60214543A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS60214543A
公开(公告)日：1985-10-26
申请号：JP7119584
申请日：1984-04-09
申请人： Mitsubishi Electric Corp
发明人： MATSUDA SHIYUUICHI , OKAMOTO TATSUROU , KOTANI HIDEO
IPC分类号： H01L23/522 , H01L21/768 , H01L21/88
摘要： PURPOSE:To prevent the generation of a hillock and electromigration by a method wherein a metal film of Al or an Al-Si alloy is formed on the substrate, and after that, the surface of the metal film is made to oxide and the metal film is turned into an insulating film. CONSTITUTION:A metal film 2 is formed on an Si substrate 1 by a sputtering method and when a lamp annealing is performed by irradiating infrared rays 7 on the metal film 2 for a short time in an atmosphere of O2 gas, the surface of the metal film 2 is brought to high temperatures and is oxidized with O2 and a thin oxide film 8 is formed. Accordingly, a resist pattern 3 is formed, the metal film 2 is performed an atching using an RIE, and after that, when an interlayer insulating film 5 is formed by a CVD method, it can be prevented for a hillock to generate on the surface of the metal film 2. Moreover, the electromigration- resisting property of the metal film 2 is upgraded by this oxide film 8 and the lifetime of this semiconductor device is improved.
摘要翻译：目的：通过在基板上形成Al或Al-Si合金的金属膜的方法，防止产生小丘和电迁移，然后将金属膜的表面制成氧化物，将金属膜变成绝缘膜。构成：通过溅射法在Si衬底1上形成金属膜2，并且当通过在O 2气体的气氛中短时间地在金属膜2上照射红外线7进行灯退火时，金属的表面将膜2带到高温并用O 2氧化并形成薄的氧化膜8。因此，形成抗蚀剂图案3，使用RIE进行金属膜2的翘曲，之后，通过CVD法形成层间绝缘膜5时，可以防止在表面产生小丘此外，通过该氧化膜8使金属膜2的耐迁移性提高，并且该半导体器件的寿命得到改善。

7. 发明专利

JPS60193362A Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：JPS60193362A
公开(公告)日：1985-10-01
申请号：JP5031484
申请日：1984-03-14
申请人： Mitsubishi Electric Corp
发明人： OKAMOTO TATSUROU , KOTANI HIDEO , MATSUDA SHIYUUICHI
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/88
摘要： PURPOSE:To prevent the generation of a hillock on the wiring layers of a semiconductor device by a method wherein films consisting of a high melting point metal or the nitride thereof are provided to the surfaces of the wiring layers consisting of Al or an Al alloy. CONSTITUTION:An insulating film 2 is formed on the main surface of a semiconductor substrate 1, and a film 6 consisting of a high melting point metal is formed thereon. Then a film 3 consisting of Al or an Al alloy is formed, and a film 7 consisting of a high melting point metal is formed thereon. Then patterning of the films 3, 6, 7 is performed to form wiring layers 3a, 3b. Then after a film 8 consisting of a high melting point metal is formed on the whole surface of the top part, out of the film 8, the parts of regions in parallel with the main surface of the substrate 2 are removed to leave only the side face parts 8a-8d. After then, after an interlayer insulating film 4 is formed, a film 5 to be used as a wiring layer is formed. When a semiconductor device is constructed in such a way, because the high melting point metal or the nitride thereof existing on the surfaces of the wiring layers consisting of Al or an Al alloy diffuses to the surfaces of the wiring layers according to posterior heat treatment to form an alloy with the Al, growth of a hillock is suppressed.
摘要翻译：目的：为了防止在由Al或Al合金构成的布线层的表面上提供由高熔点金属或其氮化物构成的膜的方法在半导体器件的布线层上产生小丘。构成：在半导体基板1的主表面上形成绝缘膜2，在其上形成由高熔点金属构成的膜6。然后形成由Al或Al合金组成的膜3，并且在其上形成由高熔点金属组成的膜7。然后进行薄膜3,6,7的图案化以形成布线层3a，3b。然后，在顶部的整个表面上形成由高熔点金属构成的膜8之后，从膜8中除去与基板2的主表面平行的区域部分，仅留下侧面面部部分8a-8d。之后，在形成层间绝缘膜4之后，形成用作布线层的膜5。当以这种方式构造半导体器件时，由于存在于由Al或Al合金构成的布线层的表面上的高熔点金属或其氮化物根据后热处理扩散到布线层的表面，与Al形成合金，抑制了小丘的生长。

8. 发明专利

JPS59161841A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS59161841A
公开(公告)日：1984-09-12
申请号：JP3857283
申请日：1983-03-07
申请人： Mitsubishi Electric Corp
发明人： YAKUSHIJI HISAO , KOTANI HIDEO , IKEDA TATSUHIKO
IPC分类号： H01L21/3213 , H01L21/302 , H01L21/306 , H01L21/3065
摘要： PURPOSE:To increase the integration degree by making a wiring width slender by a method wherein first a hole is bored to the half by reactive ion etching, and next the remnant is removed with buffer hydrofluoric acid series solution, when a through hole to mutually connect conductive wiring films of the upper and lower layers is bored in an interlayer insulation film. CONSTITUTION:An insulation film 2 is adhered on a semiconductor substrate 1, the first conductive wiring film 5 of a fixed shape is formed thereon, and the interlayer insulation film 3 is provided over the entire surface including said film. Next, the through hole 4 is bored in the film 3, and then the second conductive wiring film 6 formed on the film 3 is put in contact with the film 5 via through hole. In this constitution, to bore the through hole 4, first a hole is bored to the half by reactive ion etching, and next the remnant is removed with the buffer hydrofluoric acid series solution, thus penetrating the hole 4. Thus, the inner diameter of the hole 4 can be reduced, and the upper surface of the hole 4 becomes tapered by the solution. Besides, the constriction of the film 6 is eliminated.
摘要翻译：目的：为了通过以下方法增加布线宽度，从而使布线宽度细长化：首先，通过反应离子蚀刻使孔钻到一半，然后用缓冲氢氟酸系溶液除去残留物，当相互连接的通孔上层和下层的导电布线膜在层间绝缘膜中钻孔。构成：在半导体基板1上粘接绝缘膜2，在其上形成固定形状的第一导电布线膜5，并且在包括所述膜的整个表面上设置层间绝缘膜3。接下来，通孔4在薄膜3中钻孔，然后通过通孔将形成在薄膜3上的第二导电布线膜6与薄膜5接触。在这种结构中，为了钻通孔4，首先通过反应离子蚀刻将一个孔钻到一半，然后用缓冲氢氟酸系溶液去除残留物，从而穿透孔4.因此，可以减小孔4，并且通过溶液使孔4的上表面变细。此外，消除了胶片6的收缩。

9. 发明专利

JPS5963731A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5963731A
公开(公告)日：1984-04-11
申请号：JP17554982
申请日：1982-10-04
申请人： Mitsubishi Electric Corp
发明人： KOTANI HIDEO , TSUKAMOTO KATSUHIRO
IPC分类号： H01L21/302
CPC分类号： H01L21/302
摘要： PURPOSE:To contrive to simplify the process, reduce the manufacturing cost, and improve the accuracy by a method wherein the relative position of a laser light put in photochemical reaction and a semiconductor substrate is adjusted by a computer, and an insulation film on the substrate in a reactive fluid atmosphere is etched with the laser light. CONSTITUTION:The reflection light of a positioning light 7 is detected 9 through a half mirror 8, and an X-Y table 6 is transferred by a signal of a controller 10. When a positioning conductive layer 5 comes to a position of the projection of the light 7, the reflection light is detected 9 and sent to the controller, and thus the position is detected. The laser light 7 is set up at a fixed position from the light 7, and then etches the insulation layer 3 at a required position into a required pattern by transfer-controlling the table 6 by the signal of the controller 10. When the substrate 1 is placed in e.g. CF3Br gas at 5.5Torr, and a CO2 laser pulse 11 of a width of 45nsec, 0.4J is applied to the insulation film 3, the CF3Br decomposes by photochemical reaction, thereby etching the SiO2. Or, the dipping of the substrate 1 in Br solution is effetive, and an etched pattern of a high accuracy can be obtained by both methods.
摘要翻译：目的：为了简化工艺，降低制造成本，并且通过以下方法提高精度，其中通过计算机调整放入光化学反应的激光的相对位置和半导体衬底以及衬底上的绝缘膜在反应性流体气氛中用激光蚀刻。构成：通过半反射镜8检测定位光7的反射光，并且通过控制器10的信号传送XY台6.当定位导电层5到达光的投影位置时如图7所示，检测到反射光9并发送到控制器，从而检测位置。将激光7从光7设置在固定位置，然后通过控制器10的信号传送控制台6，将所需位置的绝缘层3蚀刻成所需的图案。当基板1 被放置在例如在5.5Torr的CF3Br气体和宽度为45nsec的0.4J的CO2激光脉冲11施加到绝缘膜3上，CF 3 Br通过光化学反应分解，从而蚀刻SiO 2。或者，基板1在Br溶液中的浸渍是有效的，并且通过两种方法可以获得高精度的蚀刻图案。

10. 发明专利

JPS5895821A PARALLEL FLAT-PLATE TYPE PLASMA CVD METHOD 失效
公开(公告)号：JPS5895821A
公开(公告)日：1983-06-07
申请号：JP19470681
申请日：1981-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , YAKUSHIJI HISAO , TSUKAMOTO KATSUHIRO , HARADA HIROJI
IPC分类号： C23C16/505 , H01L21/205 , H01L21/31
摘要： PURPOSE:To obtain a smooth plasma CVD film having an excellent property of coating a staged part, by giving a sputtering effect with ions when the plasma CVD film is formed. CONSTITUTION:A plasma CVD film 2 is formed on a substrate 1 arranged on a parallel flat-plate electrode whereon a high-frequency power is impressed, by introducing a reactive gas and an inactive gas such as argon (Ar) under a reduced pressure and by supplying the high-frequency power to the electrode to generate plasma. On the surface of the above electrode, a cathode fall occurs, and thus active gas ions and inactive gas ions such as argon ions fall along a vertical electric field on the surfaces of the above electrode and a substrate 1. The energy of the ions thus falling is increased by reducing the pressure of gases and increasing a charged power, a sputtering phenomenon is thereby made to occur, and thus etching by the ions is performed simultaneously with the deposition by plasma CVD. In the case when a stage is formed beforehand on the substrate 1, the etching in the staged part is facilitated in comparison with that in a smooth part.

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