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1. 发明专利

JPH0878639A SEMICONDUCTOR STORAGE DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JPH0878639A
公开(公告)日：1996-03-22
申请号：JP21301594
申请日：1994-09-06
申请人： MITSUBISHI ELECTRIC CORP
发明人： OKAMOTO TATSURO
IPC分类号： H01L27/04 , H01L21/822 , H01L21/8242 , H01L27/108
摘要： PURPOSE: To provide an improved semiconductor storage device which allows the capacity to increase in a limited flat area with excellent reliability. CONSTITUTION: A trench 5 is provided on the surface of a semiconductor substrate 1. A plurality of recessed parts 5a are provided on the inner wall of the trench 5. An impurity diffusion layer 6, which is to be a storage node, is provided on the inner wall plane of the trench 5 including the recessed part 5a. A capacitor insulation film 7 covers the inner plane of the trench 5 so as to make contact with the impurity diffusion layer 6. A cell plate electrode 8 is provided in the trench 5 so as to make contact with the impurity diffusion layer 6 through the capacitor insulation film 7.

2. 发明专利

JPH0457096B2 失效
公开(公告)号：JPH0457096B2
公开(公告)日：1992-09-10
申请号：JP14743285
申请日：1985-07-02
申请人： MITSUBISHI ELECTRIC CORP
发明人： OONO TAKIO , NISHIHATA MIKIO , OKAMOTO TATSURO
IPC分类号： H01L29/78 , H01L21/28 , H01L21/336

3. 发明专利

JPH0434141B2 失效
公开(公告)号：JPH0434141B2
公开(公告)日：1992-06-05
申请号：JP1620385
申请日：1985-01-28
申请人： MITSUBISHI ELECTRIC CORP
发明人： WATAKABE YAICHIRO , OKAMOTO TATSURO , MATSUDA SHUICHI
IPC分类号： G03F1/00 , G03F1/54 , H01L21/027

4. 发明专利

JPH03262125A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH03262125A
公开(公告)日：1991-11-21
申请号：JP6194390
申请日：1990-03-12
申请人： MITSUBISHI ELECTRIC CORP
发明人： MAEKAWA KAZUYOSHI , OKAMOTO TATSURO
IPC分类号： H01L21/3205 , C22C9/10 , H01L23/52
摘要： PURPOSE:To augment the strength of a wiring at lower resistance further enhancing the stress migration resistance characteristics and the electromigration resistance characteristics by using CuSi base alloy as a metallic wiring material. CONSTITUTION:An oxide film 2 is formed on a silicon semiconductor 1; next, after forming a gate electrode 3, the first layer insulating film 3 is formed; later the first layer insulating film 3 is selectively etched away and after removing a resist used as a mask, a metallic layer comprising a metallic material different from the wiring material as an upper layer, e.g. a barrier metal 7, is formed; furthermore, later, a metallic wiring 4 comprising CuSi is formed using sputtering process or CVD technology. In these procedures, the Si content in Cu in the CuSi alloy is to be specified at 0.05at%-15at%.

5. 发明专利

JPH01214152A WAFER SCALE INTEGRATION TYPE SEMICONDUCTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPH01214152A
公开(公告)日：1989-08-28
申请号：JP4001488
申请日：1988-02-23
申请人： MITSUBISHI ELECTRIC CORP
发明人： MORIMOTO HIROAKI , OKAMOTO TATSURO , HATTA MUNEO
IPC分类号： H01L21/822 , H01L21/82 , H01L27/04
摘要： PURPOSE:To obtain a highly reliable semiconductor device, by forming a wiring for independent operation test in respective integrated circuit blocks that are formed on a semiconductor wafer and connecting blocks which are judged to be normal in operation from the results of the foregoing operation test. CONSTITUTION:A plurality of groups A1-C2 of the same kinds of integrated circuit blocks which have respective independent functions on a semiconductor wafer are formed. Then, the first wiring systems 13-18 which can check respective independent functions of the circuit blocks A1-C2 from block to block are formed. Further, the function test of the circuit blocks A1-C2 is carried out by using the wiring system 13-18. Further, the circuit blocks, for example, A2, B1, and C1 which operate normally are connected by the second wiring systems 19-20. Simultaneously input/output parts 21 and 22 for I/O signals from the outside are formed. A system where the circuit blocks A2, B1, and C1 operating normally are used is thus obtained.

6. 发明专利

JPS6411349A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6411349A
公开(公告)日：1989-01-13
申请号：JP16733487
申请日：1987-07-03
申请人： MITSUBISHI ELECTRIC CORP
发明人： OKAMOTO TATSURO
IPC分类号： H01L21/768 , H01L39/06 , H01R4/68
摘要： PURPOSE:To make connection between a substrate and a conductive layer have low contact resistance as well as high critical current density by forming the above connection which is formed through intervening an insulating layer so that its connection is performed at a conductive part of its connection by a surface wherein a substrate layer or a semiconductor layer is formed and also by a junction surface which is not parallel to the above surface at least. CONSTITUTION:The first and second interconnection films 3 and 6 are formed by using superconductive conductors composed of, for example, La-Sr-Cu-O system materials and a part of the second interconnection film 6 is embedded in a contact hole 5 to form an electrode 7 and junction is made between the electrode 7 and the first interconnection film 3. In a normal conductive state, electric resistance to the direction of an axis c is higher than that of each direction in the axes a and b. The first and second interconnection films 3 and 6 or either of the above films shall be a single crystal interconnection composed of the superconductive conductors having electrical, magnetic anisotropy and perform a crystal growth so that an X direction falls to the axis a. As a junction part connecting with the upper surface of the interconnection film 3 is perpendicular to the axis c, electric resistance in this direction is high but the junction part connecting with the side of the interconnection film 3 allows a current to flow in the direction along the axis a. Then contact resistance can be decreased.

7. 发明专利

JPS63209145A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63209145A
公开(公告)日：1988-08-30
申请号：JP4185187
申请日：1987-02-25
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUTSUMI TOSHIAKI , KOTANI HIDEO , OKAMOTO TATSURO
IPC分类号： H01L23/52 , H01L21/3205 , H01L21/768 , H01L23/522
摘要： PURPOSE:To shorten a delaying time by reducing a wiring area of only the intersection of upper and lower layer interconnections for forming a capacitor in multilayer interconnection. CONSTITUTION:Interlayer insulating films 2a, 2b are formed on lower layer interconnection 3, and upper interconnection 9 is formed thereon. An intersection 8 of the interconnections 3, 9 is formed. The intersection 9 is patterned by using a mask in which at least one interconnection pattern face line of upper and lower layer interconnection patterns 7 is reduced smaller than a peripheral pattern 7 to reduce the capacity of the intersection 8. Thus, the electrode area of a capacitor formed of the interconnections 3, 9 is reduced to decrease the capacity, and the area of the intersection 8 of the interconnections 3, 9 can be reduced to shorten a delaying time.

8. 发明专利

JPS63172463A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS63172463A
公开(公告)日：1988-07-16
申请号：JP361587
申请日：1987-01-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： OKAMOTO TATSURO , KOTANI HIDEO
IPC分类号： H01L29/41 , H01L21/28 , H01L29/43
摘要： PURPOSE:To obtain a contact electrode structure characterized by excellent deposition rate of a conductor film at an upper layer and high reliability, by forming a first conductor film in a contact hole, forming a second conductor film thereon, filling the contact hole, and thereafter forming a third conductor film. CONSTITUTION:An insulating film 3 is formed on an impurity diffused layer 2. A contact hole 10 is provided at a specified place. A first conductor film 4 is formed at the bottom surface part of the contact hole 10. A second conductor film 5 is formed thereon, and the contact hole 10 is filled. A third conductor film 6 comprising aluminum alloy is formed on the insulating film 3 and contacted with the second conductor film 5 at a part of the contact hole 10. The conductor films are formed with any of, e.g., Mo, W, Ti, Ta, Cr, Nb, V and Co or silicide, nitride boride or carbide of any of Mo, W, Ti, Ta, Cr, Nb, V, and Co.

9. 发明专利

JPS6324668A SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS6324668A
公开(公告)日：1988-02-02
申请号：JP16865786
申请日：1986-07-17
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , SHIMIZU MASAHIRO , OSAKI AKIHIKO , OKAMOTO TATSURO
IPC分类号： H01L29/41 , H01L21/28 , H01L21/60 , H01L29/43
摘要： PURPOSE:To decrease the contact resistance while preventing junction breakdown, etc., from occuring by a method wherein a barrier metal is brought into contact with an electrode interconnection comprising Al on a diffused layer to raise the impurity concentration in the diffused layer on the contact part. CONSTITUTION:The shallower the junction depth, the more the possibility of junction breakdown due to alum.spike, therefore, a barrier metal 5 must be laid down below an aluminium interconnection 6 to prevent the junction breakdown from occuring. However, when the metal 5 is brought into contact with a layer 2 in low concentration to form the P type diffused layer 2 especially a shallow diffused layer, the contact resistance is raised markedly. To prevent the resistance from being raised, the impurity concentration is raised selfmatchingly in the contact region only by ionimplanting impurity in the same conductivity type as that of the layer 2 and annealing process after making a contact hole. Through these procedures, the barrier metal 5 can be brought into contact with a diffused layer 4 in high impurity concentration to decrease the contact resistance markedly.

10. 发明专利

JPS6269562A FIELD EFFECT TRANSISTOR DEVICE AND MANUFACTURE THEREOF 失效
公开(公告)号：JPS6269562A
公开(公告)日：1987-03-30
申请号：JP20950485
申请日：1985-09-20
申请人： MITSUBISHI ELECTRIC CORP
发明人： OSAKI AKIHIKO , OKAMOTO TATSURO
IPC分类号： H01L29/78 , H01L29/423
摘要： PURPOSE:To alleviate an electric field in the vicinity of a drain and to lengthen a channel, by forming a gate electrode in a minute groove through a gate insulating film, and providing a concentration gradient oriented toward the inside of a substrate in a diffused layer. CONSTITUTION:A minute trench 6 is formed in a channel part. The surface of a substrate facing the side wall and the bottom part of the trench 6 is utilized as the channel. Thus the channel is made long with respect to the width of a gate electrode. A diffused layer, which has a gentle concentration gradient toward the inside of the substrate, is provided. Thus, an electric field in the vicinity of a drain 5 is alleviated, and a hot electron effect can be decreased.

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