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1. 发明专利

JP2004311611A Mis transistor and its manufacturing method 审中-公开
标题翻译： MIS晶体管及其制造方法
公开(公告)号：JP2004311611A
公开(公告)日：2004-11-04
申请号：JP2003101197
申请日：2003-04-04
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： NIWA MASAAKI
IPC分类号： H01L29/423 , H01L21/265 , H01L21/336 , H01L29/49 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide an MIS transistor constituted of metal-insulator-semiconductor structure having performance superior in both structure and property, and to provide its manufacturing method.
SOLUTION: The manufacturing method contains a first process for forming a source/drain 14 after dummy gates 11, 12 are formed on a semiconductor substrate 10, a second process for depositing an interlayer insulating film 15 on the substrate 10 and eliminating the dummy gates 11, 12, a third process for forming a side wall insulating film 17 on the side wall of the aperture 16 of the interlayer insulating film 15 in which the dummy gates 11, 12 are eliminated, a forth process for forming a gate insulated film 18 on the substrate 10 which is positioned on an internal side surface of the side wall insulating film 15 and a bottom of the aperture 16, and a fifth process for forming a gate electrode 20 in the aperture 16 where the side wall insulating film 17 and the gate insulated film 18 are formed. By structure wherein the side wall insulating film 17 is formed on the gate electrode 20, the MIS transistor can be realized in which electric field concentration of the side end of the gate insulated film 18 is reduced.
COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种由结构和性质都优异的性能的金属 - 绝缘体 - 半导体结构构成的MIS晶体管，并提供其制造方法。解决方案：制造方法包括在半导体衬底10上形成虚拟栅极11,12之后形成源极/漏极14的第一工艺，在衬底10上沉积层间绝缘膜15的第二工艺，伪栅极11,12，用于在去除了虚拟栅极11,12的层间绝缘膜15的孔16的侧壁上形成侧壁绝缘膜17的第三工艺，用于形成栅极绝缘的第四工艺位于侧壁绝缘膜15的内侧表面和孔16的底部的基板10上的膜18，以及在孔16中形成栅电极20的第五工艺，其中侧壁绝缘膜17 并形成栅极绝缘膜18。通过在栅电极20上形成侧壁绝缘膜17的结构，可以实现栅极绝缘膜18的侧端的电场浓度降低的MIS晶体管。版权所有（C）2005，JPO＆NCIPI

2. 发明专利

JP2002299338A THIN-FILM FORMING METHOD AND SEMICONDUCTOR DEVICE MANUFACTURING METHOD 失效
公开(公告)号：JP2002299338A
公开(公告)日：2002-10-11
申请号：JP2001104678
申请日：2001-04-03
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NIWA MASAAKI
IPC分类号： H01L29/78 , H01L21/316
摘要： PROBLEM TO BE SOLVED: To provide a thin-film forming method which easily forms an insulation film usable for gate insulation films, etc., in a process at low temperatures, not forming in a high-temperature atmosphere. SOLUTION: A silicon substrate 1 is dipped in a sol solution 5 and pulled up to form an oxide film on the surface of the substrate 1. The solution 5 is prepared by dissolving ethyl silicate and ethanol in water. Dipping and pulling up of the silicon substrate 1 in the sol solution 5 may be repeated several times to obtain a desired film thickness. This enables formation of a thin film of an optional composition, on the substrate 1 at low temperatures.

3. 发明专利

JPH10196788A VACUUM PART, AND VACUUM LEAKING AMOUNT REDUCING METHOD 失效
公开(公告)号：JPH10196788A
公开(公告)日：1998-07-31
申请号：JP71997
申请日：1997-01-07
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： IDOTA TAKESHI , NIWA MASAAKI , ONISHI TERUTO , HARADA YOSHIHISA
IPC分类号： F16J15/08 , B01J3/03 , C23C14/24 , F16J12/00
摘要： PROBLEM TO BE SOLVED: To provide a vacuum part which can reduce the vacuum leaking amount for a short time without repairing by opening to the atmosphere, even though the vacuum leaking amount is increased resulting from a mechanical stress, a thermal stress, and the like from the outer side, in a vacuum part having a leading-in terminal and the like used for various sorts of vacuum devices. SOLUTION: The vacuum leaking amount is reduced by installing the first part 1 which has an electrode 4 to lead in a current, and is installed airtight to a vacuum container in the condition that one end 4a of the electrode 4 is led in to the vacuum container; and the second part 2 which has a vacuum chamber 18 and a vacuum exhaust port 23 to exhaust the vacuum chamber 18, and has an electrode 15 whose one end 15a is led in airtight and connected to the other end 4b of the electrode 4; to the vacuum chamber 18 through a matal gasket in order to maintain the airtightness, and vacuum exhausting the vacuum chamber 18.

4. 发明专利

JPH07312419A QUANTIZED FUNCTIONAL ELEMENT AND ITS MANUFACTURE 失效
公开(公告)号：JPH07312419A
公开(公告)日：1995-11-28
申请号：JP11266094
申请日：1994-05-26
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： YUKI KOICHIRO , YASUI JURO , NIWA MASAAKI , HIRAI YOSHIHIKO , MORIMOTO TADASHI , OKADA KENJI , UDAGAWA SHOJI
IPC分类号： H01L29/68 , H01L29/06 , H01L29/88
摘要： PURPOSE:To obtain a resonance tunnel diode of quantum well structure having a large tunnel burrier and perfect crystallinity, by forming a pair of tunnel barriers and electrodes sandwiching the quantum well of silicon thin plate or a silicon fine structure body formed in a substrate, from both sides. CONSTITUTION:A first trench 107 having a diamond-shaped section and a second trench 109 having a V-shaped section are formed in an N-type silicon substrate 101 whose face orientation is (001), by crystal anisotropic etching. A silicon thin plate 110 is formed in the part sandwiched between the first trench 107 and the second trench 109. A first electrode 114 and a second electrode 115 are formed so as to fill the first trench 107 and the second trench 109, respectively. In a double barrier structure 112 in which the resonance tunnel effect is generated, the silicon thin film 110 is turned into a quantum well, and a silicon oxide film 111 is turned into a tunnel barrier. A resonance tunnel diode 10 is constituted by the first electrode 114 and the second electrode 115 which sandwich the double barrier structure.

5. 发明专利

JPH06326299A QUANTUM WELL STRUCTURE AND ITS MANUFACTURE 失效
公开(公告)号：JPH06326299A
公开(公告)日：1994-11-25
申请号：JP11133693
申请日：1993-05-13
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： MORIMOTO TADASHI , HIRAI YOSHIHIKO , YUKI KOICHIRO , NIWA MASAAKI , YASUI JURO , OKADA KENJI , UDAGAWA SHOJI
IPC分类号： H01L29/06 , H01L29/66 , H01L29/68
摘要： PURPOSE:To realize a quantum well with a low voltage applied to an electrode and a low consumption power, by using a very thin silicon layer and a very thin oxide film layer of an SOI substrate. CONSTITUTION:A silicon substrate 1, a silicon oxide film layer 2, and a thin film silicon layer 3 are unified in a body to constitute an SOI(silicon on insulator) structure substrate. The silicon oxide film layer 2 is a thin film layer of about 300nm in thickness. The thin film silicon layer 3 is a thin film layer of about 100nm in thickness. A high concentration impurity diffusion region 4, a back gate electrode 5, a control gate 6, and a control gate 15 are formed, thereby obtaining a quantum well structure. A positive voltage is applied to the back gate electrode, and a negative voltage is applied to a control gate electrode 15. Thereby a quantum well structure of one dimensional electron gas 30 of 100-30nm in width can be formed.

6. 发明专利

JPH05164798A SURFACE POTENTIAL DETECTION METHOD 失效
公开(公告)号：JPH05164798A
公开(公告)日：1993-06-29
申请号：JP33330891
申请日：1991-12-17
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NIWA MASAAKI
IPC分类号： G01R29/12 , G01Q30/04 , G01Q60/14 , H01L21/66
摘要： PURPOSE:To obtain a surface potential detection method which can measure a potential distribution of a sample surface in the order of nm or less with a high resolution and at the same time can detect that of a section part of the sample. CONSTITUTION:A specified bias voltage is applied to a probe electrode 4 and a substrate region 2 of a sample 1 which are placed opposingly on a surface of the sample 1 by a bias circuit 5 and a first scanning is performed so that a tunnel current (It) which flows between them becomes constant, thus enabling a surface roughness of the sample 1 to be measured. Then, a surface roughness of the sample 1 is measured by a second scanning by applying a bias voltage which is equivalent to a band gap to an impurity-implantation region 3 of the sample by a bias circuit 6 and then a difference is obtained by subtracting the surface roughness data which is obtained by the first scanning from that obtained by the second scanning, thus enabling a potential distribution of the sample surface to be detected.

7. 发明专利

JPH05129589A QUANTUM ELEMENT 失效
公开(公告)号：JPH05129589A
公开(公告)日：1993-05-25
申请号：JP29277791
申请日：1991-11-08
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OKADA KENJI , TERUI YASUAKI , YASUI JURO , NIWA MASAAKI , HIRAI YOSHIHIKO , WADA ATSUO , MORIMOTO TADASHI
IPC分类号： H01L29/06 , H01L29/68
摘要： PURPOSE:To obtain a quantum element for holding information of signal electrons by a quantum well. CONSTITUTION:A write/read wiring 1, a quantum dot 3, a storage quantum fine line 4 well are connected through an insulating film 2. Internal potentials of the dot 3 and the fine line 4 well are raised or lowered to store information of signal electrons. Thus, a memory cell for holding information of the signal electrons in the well is obtained.

8. 发明专利

JPH0595106A QUANTUM ELEMENT 失效
公开(公告)号：JPH0595106A
公开(公告)日：1993-04-16
申请号：JP25341791
申请日：1991-10-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HIRAI YOSHIHIKO , TERUI YASUAKI , YASUI JURO , NIWA MASAAKI , MORIMOTO TADASHI , WADA ATSUO , OKADA KENJI
IPC分类号： H01L29/06 , H01L29/66
摘要： PURPOSE:To provide a quantum element of good signal transmission properties. CONSTITUTION:Quantum fine line transistors 11, 31 are connected by a quantum fine line 21 of the same size as the quantum fine line transistor. Thereby, reflection and scattering of electron in a connection wiring part can be restrained and an element of good signal transmission can be realized.

9. 发明专利

JPH043951A SEMICONDUCTOR TESTER 失效
公开(公告)号：JPH043951A
公开(公告)日：1992-01-08
申请号：JP10618390
申请日：1990-04-20
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAMURA KAYOKO , NIWA MASAAKI , YASUHIRA MITSUO , IWASAKI YUTAKA
IPC分类号： H01L21/66 , G01N23/225 , G01N23/227
摘要： PURPOSE:To inspect the surface forms of semiconductor devices as well as to specify their constituents, by letting a focussed-ion beam device have an analyzing function. CONSTITUTION:A primary ion beam 2 generated by an ion source 1 passes a mirror cylinder 3, and reaches a semiconductor device 6 fixed on the sample stage 5 in a sample chamber 4 to scan the device in an area similar to the screen of a picture image display 10. As a result, secondary electrode 7 are emitted from the surface of the semiconductor device 6. These secondary electrons 7 are detected by a detector 8. The detector output is converted into a video signal by a signal processor 9, and it is displayed on the picture image display 10. A location on the screen is specified to determine the material of the corresponding area of the device. A primary electron beam 12 generated by an electrode gun 11 irradiates that area on the semiconductor device 6 fixed on the sample stage 5 in a sample chamber 4, and as the result characteristic X-rays 14 are emitted from the surface of the semiconductor device 6. These characteristic X-rays 14 are detected by a detector 15, and its output is converted by a signal processor 16 and is displayed on a picture image display 17.

10. 发明专利

JPH02203205A THREE-DIMENSIONAL ACTUATOR AND SCANNING TYPE TUNNEL MICROSCOPE DEVICE 失效
公开(公告)号：JPH02203205A
公开(公告)日：1990-08-13
申请号：JP2417989
申请日：1989-02-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NIWA MASAAKI
IPC分类号： G01B7/34 , G01N23/00 , G01Q10/02 , G01Q30/02 , G01Q60/10 , H01J37/28
摘要： PURPOSE:To improve the dynamic range of measurement resolution greatly by grasping the position of a probe, which uses the three-dimensional actuator structured by mounting an optical fiber on a piezoelectric driving element, on the surface of a sample in real time. CONSTITUTION:The probe 6 is mounted by a support base 8 on the cylinder type piezoelectric driving three-dimensional actuator which has piezoelectric elements 1 and 4, 2 and 5, and 3 for an X direction, a Y direction, and a Z direction. An optical fiber cable 7 is also mounted on this base 8 and its tip is directed to the tip end of the probe 6. The cable 7 is formed by bundling ten thousands of glass fibers and serves as an optical guide and a lens is fitted atop; and an image of the surface area of the sample 9 at the tip end part of the probe 6 is formed on an optical system 10 and the state of the measurement area can be grasped on a TV monitor. Thus, the area to be measured is grasped in advance and the scanning area of the probe 6 is secured to follow the procedure for measurement.

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