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1. 发明专利

JP2004349729A Circuit board and its producing process 审中-公开
公开(公告)号：JP2004349729A
公开(公告)日：2004-12-09
申请号：JP2004264103
申请日：2004-09-10
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SUZUKI TAKESHI , OGAWA TATSUO , BESSHO YOSHIHIRO , TOMEKAWA SATORU , NAKAYA YASUHIRO , ECHIGO FUMIO , UEDA YOJI , MATSUOKA SUSUMU , ANDO DAIZO
IPC分类号： H05K3/40 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a circuit board in which a wiring layer and an insulator layer have a sufficient bonding strength, and high reliability is realized in inner via connection. SOLUTION: The circuit board comprises inner via conductors 102 formed in the thickness direction of an insulator layer 101 in order to connect the upper and lower surfaces of the insulator layer 101 electrically, and lands 103 arranged on the upper and lower surfaces of the insulator layer 101 while being connected electrically with the inner via conductors 102. The insulator layer 101 includes a surface 105 having a high compositional ratio of organic resin, and a core 106 having a low compositional ratio of organic resin formed in the order of the surface 105/the core 106/the surface 105. The core 106 is composed of a porous body, the lands 103 arranged on the upper and lower surfaces of the insulator layer 101 are buried in the surface until they touch the core 106 and the inner via conductors 102 has a thickness substantially identical to that of the core part 106. COPYRIGHT: (C)2005,JPO&NCIPI

2. 发明专利

JP2003324180A Mounter for semiconductor device 审中-公开
标题翻译：半导体器件安装
公开(公告)号：JP2003324180A
公开(公告)日：2003-11-14
申请号：JP2003158025
申请日：2003-06-03
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： SHIRAISHI TSUKASA , MITANI TSUTOMU , AMAMI KAZUYOSHI , BESSHO YOSHIHIRO
IPC分类号： H01L25/18 , H01L23/52 , H01L25/04
CPC分类号： H01L2224/45144 , H01L2224/73204 , H01L2924/19107 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device wherein a semiconductor element is mounted on both sides of a multilayer circuit board having three-dimensional wiring using inner via holes, which enables high-speed operation and the reduction of size by using the ordinary stacked-layer structure of the semiconductor elements without employing a chip-on-chip structure.
SOLUTION: General-purpose semiconductor devices are mounted on both sides of the multilayer circuit board having three-dimensional wiring using the inner via holes so as to oppose each other with the multilayer circuit board between. Electrode terminals of individual semiconductor elements are connected via the three-dimensional wiring of the multilayer circuit board.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种半导体器件，其中半导体元件安装在具有使用内部通孔的三维布线的多层电路板的两侧，这使得能够通过使用高速操作和尺寸减小不采用片上芯片结构的半导体元件的普通堆叠层结构。解决方案：通过使用内部通孔将多功能半导体器件安装在具有三维布线的多层电路板的两侧，以便在多层电路板之间彼此相对。各个半导体元件的电极端子经由多层电路板的三维布线连接。版权所有（C）2004，JPO

3. 发明专利

JP2001332654A MODULE PROVIDED WITH BUILT-IN ELECTRIC ELEMENT AND MANUFACTURING METHOD THEREOF 失效
公开(公告)号：JP2001332654A
公开(公告)日：2001-11-30
申请号：JP2001056535
申请日：2001-03-01
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： NAKATANI SEIICHI , BESSHO YOSHIHIRO , SUGAYA YASUHIRO , ONISHI KEIJI
IPC分类号： H01L23/28 , H01L21/56 , H01L21/60 , H01L23/12 , H01L23/29 , H01L23/31 , H03H3/08 , H03H9/25 , H05K3/20 , H05K3/28 , H05K3/32 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a module which is provided with built-in electric elements, such as semiconductor chips and surface acoustic wave elements, and can be thinned while being provided with mechanical strength, and to provide a manufacturing method of the module. SOLUTION: A module provided with built-in electric elements is constituted in a structure that more than two electric elements 203 are mounted on wiring patterns 201 and the elements 203 are sealed with a thermosetting resin composition 204. The upper surfaces of the elements 203 and the upper surface of the composition 204 are simultaneously polished, whereby almost the same surface is formed on the elements 203 and the composition 204. As the upper surfaces of the elements 203 are polished in a state that the elements 203 are sealed with the composition 204, the elements 203 can be thinned without damaging the elements 203. Moreover, a contamination of the elements 203 and the patterns 201 due to an abrasive liquid can be prevented.

4. 发明专利

JP2001118883A CIRCUIT BOARD, ELECTRONIC COMPONENT AND MOUNTING OF ELECTRONIC COMPONENT DEVICE 失效
公开(公告)号：JP2001118883A
公开(公告)日：2001-04-27
申请号：JP29501099
申请日：1999-10-18
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SHIRAISHI TSUKASA , KOJIMA TOSHIYUKI , BESSHO YOSHIHIRO , HATANAKA HIDEO
IPC分类号： H05K3/28 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To keep cleanliness of a circuit board or the electrode terminal parts of an electronic component and to manufacture an electronic component device of high quality and with satisfactory productivity. SOLUTION: A heat-cured resin layer 3 which covers electrode terminals 2 has insulation properties and is in a resin-cured state, is laminatedly formed on the surface of at least one side of the surfaces of a substrate 1, formed with a desired wiring pattern and the electrode terminals 2. At mounting of an electronic component, the layer 3 is utilized as a member for bonding, when the component is mounted in flip-chip manner by a face-down method.

5. 发明专利

JP2000315698A MANUFACTURE OF SEMICONDUCTOR PACKAGE 失效
公开(公告)号：JP2000315698A
公开(公告)日：2000-11-14
申请号：JP12445199
申请日：1999-04-30
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SHIRAISHI TSUKASA , BESSHO YOSHIHIRO , NAKATANI SEIICHI
IPC分类号： H01L23/12 , H01L21/52 , H01L21/56 , H01L23/29 , H01L23/31
摘要： PROBLEM TO BE SOLVED: To improve the mechanical strength of the connecting section between a semiconductor element and a circuit board, by reinforcing the adhesion between the element and board with an insulating resin before injecting a sealing resin composed of an inorganic filler and a liquid thermosetting resin, by injecting the sealing resin between the element and board by utilizing a capillary phenomenon and curing the resin by heating. SOLUTION: After a conductive adhesive 3 is applied to the front end of a gold bump 2 formed on the electrode terminal 5 of a semiconductor element 1, the element 1 is mounted on a circuit board 4 on which an appropriate amount of insulating adhesive 7 containing an inorganic filler is applied to an appropriate position. From the position, the adhesive 7 does not reach the connecting section between the element 1 and board 4 in the mounting area for the element 1 by aligning the bump 2 with an electrode terminal 5 formed on the board 4. The bump 2 is electrically connected to the terminal 5 by curing the resin 3 through heat treatment which is performed at about 120 deg.C for about one hour. Then, after a sealing resin is injected between the element 1 and board 4, a semiconductor package is manufactured by curing the resin 8 by heating the resin to about 150 deg.C. In the step of injecting the sealing resin 8, the semiconductor element 1 connected to the circuit board 4 is placed on a heat generating plate 9 and the surface of the substrate 4 is heated to 60-90 deg.C by means of the plate 9.

6. 发明专利

JP2000311920A ELECTRONIC COMPONENT CONNECTING MATERIAL AND ELECTRONIC APPARATUS USING THE SAME 失效
公开(公告)号：JP2000311920A
公开(公告)日：2000-11-07
申请号：JP11784799
申请日：1999-04-26
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： HASE NOBUNORI , ITAGAKI MINEHIRO , BESSHO YOSHIHIRO
IPC分类号： H01R11/01 , C09J9/02 , H01B1/00 , H01B1/02 , H01B1/22 , H01B5/16 , H01L21/60
摘要： PROBLEM TO BE SOLVED: To obtain an electronic component connecting material, capable of stably holding electric connections even in a high temp. during heating of electronic apparatus in operation. SOLUTION: Electrodes 5 of an electronic component 4 are connected to electrodes 7 of a circuit board 6 through conductors 2 contained in an electronic component connecting material. The conductors 2 are made of grains of a thermoelastic martensite transformed alloy having an austenitic transformation end temp. lower than a max. temp. in the rated operating temp. conditions of the electronic component 4. Thus the conductors 2 have a high spring back quantity to make it difficult for poor conduction to occur at high temps.

7. 发明专利

JP2000208906A CONNECTING STRUCTURE AND MOUNTING STRUCTURE 失效
公开(公告)号：JP2000208906A
公开(公告)日：2000-07-28
申请号：JP263499
申请日：1999-01-08
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： TAKEZAWA HIROTERU , ITAGAKI MINEHIRO , BESSHO YOSHIHIRO
IPC分类号： H05K3/32 , H05K1/18
摘要： PROBLEM TO BE SOLVED: To improve mounting reliability by forming a structure for adhering a conductive adhesive from a surface of an electrode to a surface of an electrode molding around the electrode. SOLUTION: The connecting structure electrically connects an electrode 5 on a surface 4a of a board 4 of an electrode molding to a conductive adhesive 6. Further, the adhesive 6 is adhered from the electrode 5 to a board 4a of its periphery. An adhering area between the surface 4a of the board around the adhesive 6 and the adhesive 6 is larger than a surface area of the electrode 5. Further, an overall peripheral edge of the adhesive 6 is adhered to the board 4 at an outside of the electrode 5. With the constitution, the connecting structure improves its adhesive strength between the adhesive 6 and the electrode 5.

8. 发明专利

JP2000183272A ELECTRICAL CIRCUIT, SEMICONDUCTOR PACKAGE, AND PACKAGING BODY 失效
公开(公告)号：JP2000183272A
公开(公告)日：2000-06-30
申请号：JP28485799
申请日：1999-10-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： OGURA TETSUYOSHI , FUKUMOTO YUKIHIRO , IWAKI HIDEKI , TAGUCHI YUTAKA , BESSHO YOSHIHIRO
IPC分类号： H01L25/00
摘要： PROBLEM TO BE SOLVED: To provide an electrical circuit, a semiconductor package, and a packaging body that are compact, inexpensive, and can reduce power supply noise and electromagnetic wave radiation. SOLUTION: In a semiconductor package 1 with a semiconductor element 2 that has a power supply terminal, a grounding terminal, and an output terminal, an inductance 4, and a capacitance 3, one terminal from among the opposing terminals of the capacitance 3 is connected to the power supply terminal of a semiconductor element 2, the other terminal is connected to the grounding terminal of the semiconductor element 2, the grounding terminal of the semiconductor element 2 is connected to a grounding terminal 6 of the semiconductor package 1, the power supply terminal of the semiconductor element 2 is connected to a power supply terminal 7 of the semiconductor package 1 via the inductance 4, and the output terminal of the semiconductor element 2 is connected to an output terminal 105 of the semiconductor package.

9. 发明专利

JP2000174062A SEMICONDUCTOR DEVICE METHOD STRUCTURE AND CIRCUIT BOARD THEREFOR 失效
公开(公告)号：JP2000174062A
公开(公告)日：2000-06-23
申请号：JP34306398
申请日：1998-12-02
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： KUMANO YUTAKA , SHIRAISHI TSUKASA , BESSHO YOSHIHIRO , HAYASHI YOSHITAKE
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a mounting structure of a semiconductor device which never causes the connection failure in manufacturing and has a high reliability. SOLUTION: Sharp bumps 20 are provided as connection aids having sharp top ends at either connection electrodes 5 on a mounting surface 4a or terminal electrodes 21 on a semiconductor device 1. The bumps 20 are made of a harder conductive material than those at the other electrodes and compression-bonded to the other electrodes 5 or 21 enough to bite into the other electrodes, thus making the electric conduction between the connection electrode 5 and the terminal electrode 21.

10. 发明专利

JP2000003933A SEMICONDUCTOR DEVICE AND ITS MANUFACTURE 失效
公开(公告)号：JP2000003933A
公开(公告)日：2000-01-07
申请号：JP16790898
申请日：1998-06-16
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SHIRAISHI TSUKASA , BESSHO YOSHIHIRO , ONO MASAHIRO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To manufacture a semiconductor device with good quality at economical cost without losing necessary functions, by pressing the tip end of a projecting electrode onto a flat plate, and then by softening the projecting electrode by heat and/or ultrasonic sounds to deform it to a uniform height. SOLUTION: A projecting electrode 6 is formed on the electrode 5 of a semiconductor device 1 and is pressed on a flat plate at the tip thereof, and then is softened and deformed by heat and/or ultrasonic sounds to a uniform height. Then, the semiconductor device 1 is arranged facedown on a circuit substrate 7 such that a terminal electrode 8 is put into electrical contact with the projecting electrode 6 via conducting adhesive 9. This can reduce damage caused on an element forming a circuit right under the projecting electrode 6. Therefore, it is possible to manufacture a semiconductor device made by flip chip packaging with good quality at economical cost without losing necessary functions.

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