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1. 发明专利

JP2010118635A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2010118635A
公开(公告)日：2010-05-27
申请号：JP2009055958
申请日：2009-03-10
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO
IPC分类号： H05K3/46 , H01L23/32 , H05K1/02
CPC分类号： B23K1/0016 , B23K3/0623 , B23K20/103 , B23K26/389 , B23K2201/40 , B23K2201/42 , B23K2203/42 , B23K2203/50 , H01L21/4857 , H01L21/6835 , H01L23/49816 , H01L23/49822 , H01L24/81 , H01L2221/68345 , H01L2224/05568 , H01L2224/05573 , H01L2224/16 , H01L2224/16225 , H01L2224/81801 , H01L2924/00014 , H01L2924/01019 , H01L2924/01046 , H01L2924/01078 , H01L2924/01079 , H01L2924/15311 , H05K1/0271 , H05K3/025 , H05K3/4682 , H05K2201/09781 , H05K2201/10674 , H05K2201/2009 , Y10T29/49149 , H01L2224/05599
摘要： PROBLEM TO BE SOLVED: To provide a novel multilayer printed wiring board in which a conductor on the outermost resin layer is positioned properly, and to provide a novel multilayer printed wiring board in which working efficiency is enhanced when forming solder bumps on the pads for mounting a semiconductor element. SOLUTION: In the multilayer printed wiring board (40), a plurality of pads (85) for connection with a semiconductor chip are formed on one surface, and on its opposite surface, external connection terminals (84) for connection with another substrate are formed, the pads for connection with the semiconductor chip are formed in the central region of one surface, a stiffener (42) is formed in the peripheral region surrounding the pads for connection with the semiconductor chip, the pads (85) for connection with the semiconductor chip and the stiffener (42) are formed of the same material and are set to be the same height, and the actual area of the stiffener is determined according to the total area of the plurality of pads for connection with a semiconductor chip. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种新颖的多层印刷线路板，其中最外层树脂层上的导体正确定位，并提供一种新颖的多层印刷线路板，其中当在其上形成焊料凸块时，其工作效率提高用于安装半导体元件的焊盘。解决方案：在多层印刷线路板（40）中，在一个表面上形成多个与半导体芯片连接的焊盘（85），在其相对表面上形成用于与另一个连接的外部连接端子（84）形成衬底，用于与半导体芯片连接的焊盘形成在一个表面的中心区域中，在围绕焊盘的外围区域中形成加强件（42），用于与半导体芯片连接，用于连接的焊盘（85）半导体芯片和加强件（42）由相同的材料形成并且被设置为相同的高度，并且根据用于与半导体芯片连接的多个焊盘的总面积来确定加强件的实际面积。版权所有（C）2010，JPO＆INPIT

2. 发明专利

JP2012195614A Laminate manufacturing method 有权
标题翻译：层压制造方法
公开(公告)号：JP2012195614A
公开(公告)日：2012-10-11
申请号：JP2012154064
申请日：2012-07-09
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO , KITAJIMA KAZUHISA
IPC分类号： H05K3/46
CPC分类号： H05K3/4682 , H05K1/113 , H05K3/0058 , H05K3/025 , H05K3/06 , H05K3/108 , H05K2201/096 , H05K2203/0152 , H05K2203/0156 , H05K2203/0228 , H05K2203/1536 , Y10T29/49126 , Y10T29/49128 , Y10T29/49155 , Y10T29/49165 , Y10T29/49167
摘要： PROBLEM TO BE SOLVED: To provide a thin printed wiring board which includes a pad for mounting a semiconductor element formed on one surface side of a laminate and can stably mount electronic components for a long time.SOLUTION: A printed wiring board manufacturing method comprises: a process of fixing a metal foil to a support member by ultrasonic; a process of forming a resin insulation layer on the metal foil; a process of forming an opening for a via conductor in the resin insulation layer; a process of forming a conductor circuit on the resin insulation layer; a process of forming a via conductor in the opening; and a process of separating the support member and the metal foil. According to a laminate manufacturing method of the present invention, a thin printed wiring board excellent in connection reliability can be manufactured at high yield.
摘要翻译：要解决的问题：提供一种薄印刷布线板，其包括用于安装形成在层压体的一个表面侧上的半导体元件的焊盘，并且可以长时间稳定地安装电子部件。解决方案：印刷线路板制造方法包括：通过超声波将金属箔固定到支撑构件的工艺; 在所述金属箔上形成树脂绝缘层的工序; 在所述树脂绝缘层中形成通孔导体的开口的工序; 在树脂绝缘层上形成导体电路的工艺; 在开口中形成通孔导体的工序; 以及分离支撑构件和金属箔的过程。根据本发明的层压体制造方法，可以高产率地制造连接可靠性优异的薄印刷布线板。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2012238805A Printed wiring board and method of manufacturing the same 有权
标题翻译：印刷线路板及其制造方法
公开(公告)号：JP2012238805A
公开(公告)日：2012-12-06
申请号：JP2011108414
申请日：2011-05-13
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO
IPC分类号： H05K3/46 , H01L23/12
CPC分类号： H01L2224/04105 , H01L2224/12105 , H01L2224/32225 , H01L2224/48227 , H01L2224/73267 , H01L2225/1035 , H01L2225/1058 , H01L2924/15311 , H01L2924/18162
摘要： PROBLEM TO BE SOLVED: To solve the problem that a thin printed wiring board integrated with a semiconductor device has low reliability.SOLUTION: An external terminal 42 has a large thickness. A difference Z in height between a subsurface U of the external terminal 42 contained in a first resin insulating layer 50 and an upper surface of an electrode 92 of a semiconductor element is small. Since the external terminal 42 is embedded in the first resin insulating layer 50 integrated with a semiconductor device 90, the first resin insulating layer 50 integrated with the semiconductor device is reinforced by the external terminal 42.
摘要翻译：要解决的问题：为了解决与半导体器件集成的薄印刷线路板的可靠性低的问题。
解决方案：外部端子42具有较大的厚度。包含在第一树脂绝缘层50中的外部端子42的下表面U与半导体元件的电极92的上表面之间的高度差Z小。由于外部端子42嵌入在与半导体器件90一体化的第一树脂绝缘层50中，与半导体器件集成的第一树脂绝缘层50被外部端子42加强。版权所有（C）2013， JPO＆INPIT

4. 发明专利

JP2012039139A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2012039139A
公开(公告)日：2012-02-23
申请号：JP2011222696
申请日：2011-10-07
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO
IPC分类号： H05K3/46
CPC分类号： H05K1/115 , H05K3/421 , H05K3/4644 , H05K2201/0352 , H05K2201/0394 , H05K2201/09527 , H05K2201/09563 , H05K2201/096 , H05K2203/0554 , Y10T29/49124 , Y10T29/49155 , Y10T29/49162
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board capable of ensuring excellent connection capability even if a semiconductor element is connected to the board at multiple connection points.SOLUTION: A multilayer printed wiring board 20 comprises: a first resin layer 26-1; first via holes 33-1 formed in the first resin layer; a second resin layer 26-2 disposed on the top surface of the first resin layer; second via holes 33-2 formed in the second resin layer; a core layer 22 disposed on the surface of the first resin layer opposite to the surface on which the second resin layer is disposed; and via holes 42 formed in the core layer. The opening direction of the via holes 33-1 and 33-2 formed in the resin layers 26-1 and 26-2 is reversed to the opening direction of the via holes 42 formed in the core layer 22.
摘要翻译：要解决的问题：即使半导体元件在多个连接点处连接到板，也能够提供能够确保优异的连接能力的多层印刷线路板。解决方案：多层印刷线路板20包括：第一树脂层26-1; 形成在第一树脂层中的第一通孔33-1; 设置在第一树脂层的顶表面上的第二树脂层26-2; 形成在第二树脂层中的第二通孔33-2; 设置在与设置有第二树脂层的表面相对的第一树脂层的表面上的芯层22; 以及形成在芯层中的通孔42。形成在树脂层26-1,26-2中的通路孔33-1,33-2的开口方向与芯层22中形成的通孔42的开口方向相反。权利要求（ C）2012，JPO＆INPIT

5. 发明专利

JP2012238804A Printed wiring board 有权
标题翻译：印刷线路板
公开(公告)号：JP2012238804A
公开(公告)日：2012-12-06
申请号：JP2011108413
申请日：2011-05-13
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO
IPC分类号： H05K3/46 , H01L23/12
CPC分类号： H01L2224/12105 , H01L2224/48091 , H01L2224/48227 , H01L2225/1035 , H01L2924/15311 , H01L2924/18162 , H01L2924/00014
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board which incorporates an electronic component, is thin, and has high connection reliability.SOLUTION: An IC chip 90 is incorporated in a first resin insulating layer 50, and a second resin insulating layer 60 is formed on the first resin insulating layer 50. A second conductor layer 58 thicker than a third conductor layer 68 is disposed at an interface between the first resin insulating layer 50 and the second resin insulating layer 60. The second conductor layer 58 is sandwiched between a first surface of the first resin insulating layer 50 and a second surface of the second resin insulating layer 60. Therefore, warpage is reduced, thereby allowing connection reliability to be enhanced.
摘要翻译：要解决的问题：提供一种结合了电子部件的印刷电路板，薄且具有高连接可靠性。解决方案：IC芯片90被结合在第一树脂绝缘层50中，并且第二树脂绝缘层60形成在第一树脂绝缘层50上。设置比第三导体层68厚的第二导体层58 在第一树脂绝缘层50和第二树脂绝缘层60之间的界面处。第二导体层58夹在第一树脂绝缘层50的第一表面和第二树脂绝缘层60的第二表面之间。因此，翘曲减小，从而可以提高连接可靠性。版权所有（C）2013，JPO＆INPIT

6. 发明专利

JP2010245528A Substrate with metal film, and method for manufacturing the same 审中-公开
标题翻译：带金属膜的基板及其制造方法
公开(公告)号：JP2010245528A
公开(公告)日：2010-10-28
申请号：JP2010079315
申请日：2010-03-30
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO , ISHIDA ATSUSHI , TOMINAGA RYOJIRO
IPC分类号： H05K3/42 , H05K3/18 , H05K3/38
CPC分类号： H05K3/0032 , C25D5/02 , C25D7/12 , C25D7/123 , H05K3/387 , H05K3/422 , H05K3/4602 , H05K2201/09536 , H05K2201/09581 , H05K2201/09827 , H05K2203/095 , H05K2203/1572 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To provide a substrate with a metal thin film and a method for manufacturing the same, providing good adhesion of a metal film with a substrate even at a through-hole. SOLUTION: The method for manufacturing a substrate with a metal film includes preparation of an insulating substrate 11 having a first surface and a second surface opposite to the first surface, formation of the through-hole 12 having a tapered inner wall in the insulating substrate 11 from the first surface toward the second surface of the insulating substrate 11, formation of a composition containing a polymerization initiator and a polymerizable compound on the inner wall of the through-hole 12, irradiation of energy on the composition such that a polymer is formed on the inner wall of the through hole 12, imparting a plating catalyst on the polymer, and formation of a plated film on the inner wall of the through-hole 12. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供具有金属薄膜的基板及其制造方法，甚至在通孔处也提供金属膜与基板的良好的粘附性。解决方案：用金属膜制造衬底的方法包括制备具有第一表面和与第一表面相对的第二表面的绝缘衬底11，形成具有锥形内壁的通孔12 绝缘基板11从绝缘基板11的第一面到第二面，在通孔12的内壁上形成含有聚合引发剂和聚合性化合物的组合物，对组合物照射能量，使得聚合物形成在通孔12的内壁上，在聚合物上赋予镀催化剂，并在通孔12的内壁上形成镀膜。（C）2011，JPO＆INPIT

7. 发明专利

JP2010245517A Substrate with metal film, and method for manufacturing the same 审中-公开
标题翻译：带金属膜的基板及其制造方法
公开(公告)号：JP2010245517A
公开(公告)日：2010-10-28
申请号：JP2010058279
申请日：2010-03-15
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO , ISHIDA ATSUSHI , TOMINAGA RYOJIRO
IPC分类号： H05K3/42 , H05K3/18 , H05K3/46
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/387 , H05K3/422 , H05K3/4682 , H05K2201/0195 , H05K2201/0209 , H05K2201/0239 , H05K2201/09581 , H05K2201/09827 , H05K2203/1168
摘要： PROBLEM TO BE SOLVED: To achieve good adhesiveness of a metal film and insulation layer even in a via hole. SOLUTION: The method for manufacturing a substrate with a metal film includes preparation of a first insulation layer 31, formation of a first conductive circuit 21 on the first surface of the first insulation layer 31, formation of a second insulation layer 32 on the first surface of the first insulation layer 31 and on the first conductive circuit 21, formation of a through-hole (a via hole 41) tapered from the first surface toward the first conductive circuit 21 in the second insulation layer 32, formation of a composition containing a polymerization initiator and a polymerizable compound on an inner wall of the through hole, formation of a graft polymer 411 on the inner wall of the through-hole by irradiating energy on the composition, application of a plating catalyst 412 on the graft polymer 411, and formation of an electroless-plated film 413 on the inner wall of the through hole. The first surface of the first insulation layer 31 faces to the second surface of the second insulation layer 32. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：即使在通孔中也能实现金属膜和绝缘层的良好的粘附性。解决方案：用金属膜制造衬底的方法包括制备第一绝缘层31，在第一绝缘层31的第一表面上形成第一导电电路21，在第一绝缘层31上形成第二绝缘层32 第一绝缘层31的第一表面和第一导电电路21上形成在第二绝缘层32中从第一表面向第一导电电路21渐缩的通孔（通孔41），形成在通孔的内壁上含有聚合引发剂和可聚合化合物的组合物，通过在组合物上照射能量在通孔的内壁上形成接枝聚合物411，在接枝聚合物上施加电镀催化剂412 411，在通孔的内壁上形成无电镀膜413。第一绝缘层31的第一表面面向第二绝缘层32的第二表面。版权所有（C）2011，JPO＆INPIT

8. 发明专利

JP2001121053A ROLL COATER FOR COATING AND PRODUCTION METHOD OF PRINTED CIRCUIT BOARD USING THE SAME 失效
公开(公告)号：JP2001121053A
公开(公告)日：2001-05-08
申请号：JP30380799
申请日：1999-10-26
申请人： IBIDEN CO LTD , TOYODA AUTOMATIC LOOM WORKS
发明人： SUZUKI AYUMI , NIKI NORIO , AOKI MAKOTO , KITAJIMA KAZUHISA , KAGOHASHI SUSUMU , KAJIYAMA YUKARI , TANAKA HIROSHI
IPC分类号： H05K3/28 , B05C1/02 , B05C1/08 , H05K3/00 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a roll coater for coating capable of forming an interlaminar resin insulating layer and a solder-resist layer with even thickness and producing a printed circuit board excellent in the connection and reliability by preventing formation failure of openings for via holes and openings for solder bumps and diameter and shape defects attributed to unevenness of the coating film thickness. SOLUTION: The roll coater 20 for coating is a coater to be used when forming an interlaminater resin insulating layer and/or a solder-resist layer in a printed circuit board comprising a substrate and conductor circuits and interlaminater resin insulating layers successively formed on the substrate and a solder-resist layer formed on the uppermost layer is formed and the substrate of the roll 21 constituting the roll coater 20 for coating are so grooved as to have a large number of grooves in a rotation direction and the grooves 22a, 22b in the roll end parts 21a are formed shallower than those in other parts.

9. 发明专利

JPH10284835A MANUFACTURE OF PRINTED WIRING BOARD 失效
公开(公告)号：JPH10284835A
公开(公告)日：1998-10-23
申请号：JP8268297
申请日：1997-04-01
申请人： IBIDEN CO LTD
发明人： NIKI NORIO , ASAI MOTOO , KAWAMURA YOICHIRO
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To prevent the positional deviations of a mask pattern and a resist pattern by forming a photosensitive resin layer on a substrate carrying a formed conductor circuit and providing an opening for forming a via hole by exposing and developing the resin layer through a glass substrate carrying a plotted mask pattern, and then, forming the conductor circuit and via hole on and into the resin layer. SOLUTION: An opening for forming a via hole is provided by exposing and developing a photosensitive layer 6 which becomes an interlayer resin insulating layer through a glass substrate 13. Since the used photomask is made of glass having a small, coefficient of linear expansion, the size of the photomask hardly changes even when the humidity and temperature change. Therefore, the mask pattern and a resist pattern hardly cause positional deviations and, accordingly, the positions of a via hole, the solder pattern, and a solder resist pattern are hardly deviated.

10. 发明专利

JP2003234578A METHOD OF MANUFACTURING PRINTED WIRING BOARD 审中-公开
公开(公告)号：JP2003234578A
公开(公告)日：2003-08-22
申请号：JP2003010627
申请日：2003-01-20
申请人： IBIDEN CO LTD
发明人： NIKI NORIO , ASAI MOTOO , KAWAMURA YOICHIRO
IPC分类号： G03F1/60 , G03F7/20 , H05K3/00 , H05K3/18 , H05K3/28 , H05K3/46 , G03F1/14
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a printed wiring board which is capable of suppressing a change in size of a mask material for exposure, by using a glass substrate formed with a mask pattern as the mask material for exposing, and thereby can prevent positional deviation of via holes, a plating resist pattern, and a solder resist pattern. SOLUTION: A photosensitive resin layer 6 is formed on a wiring board PC. Then, the photosensitive resin layer 6 is exposed to light via the glass substrate 13 drawn with the mask pattern 14, and then is developed to form openings for forming the via holes. Thereafter, a conductor circuit and the via holes are formed on the photosensitive resin layer. The resist pattern is also formed by forming the photosensitive resin layer 6 on the wiring board PC and exposing the photosensitive resin layer 6 via the glass substrate 13 drawn with the mask pattern 14 and then developing the exposed photosensitive resin layer 6. COPYRIGHT: (C)2003,JPO

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