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1. 发明专利

JP2013070035A Multilayer printed wiring board 审中-公开
标题翻译：多层印刷接线板
公开(公告)号：JP2013070035A
公开(公告)日：2013-04-18
申请号：JP2012173150
申请日：2012-08-03
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： MORITA HARUHIKO , TOMINAGA RYOJIRO , ISHIDA ATSUSHI , WATANABE SATORU
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer printed wiring board which inhibits warpage while having inductors.SOLUTION: Inductors L1, L2 are formed in a core substrate 30 by a first conductor pattern and a first via conductor. First insulation layers 30M, 30A, 30B, 30C, 30D, 30E, 30F that form the core substrate 30 include an inorganic fiber reinforcement material. In other words, the inorganic fiber reinforcement material for improving rigidity is provided at the layers where the inductors L1, L2 are formed. Thus, the inorganic fiber reinforcement material allows thermal shrinkage of the insulation layers to be easily inhibited.
摘要翻译：要解决的问题：提供一种在具有电感器的同时抑制翘曲的多层印刷线路板。解决方案：电感器L1，L2通过第一导体图案和第一通孔导体形成在芯基板30中。形成芯基板30的第一绝缘层30M，30A，30B，30C，30D，30E，30F包括无机纤维增强材料。换句话说，用于提高刚性的无机纤维增强材料设置在形成电感器L1，L2的层上。因此，无机纤维增强材料能够容易地抑制绝缘层的热收缩。版权所有（C）2013，JPO＆INPIT

2. 发明专利

JP2012129526A Printed wiring board, and method of manufacturing the same 审中-公开
标题翻译：印刷线路板及其制造方法
公开(公告)号：JP2012129526A
公开(公告)日：2012-07-05
申请号：JP2011270251
申请日：2011-12-09
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NISHIOKA HIROYUKI , TOMINAGA RYOJIRO , IMAI TATSUYA
IPC分类号： H05K3/34 , H01L23/12 , H05K3/28
CPC分类号： H05K3/4007 , H05K3/3452 , H05K3/3484 , H05K2201/099 , H05K2203/0594
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board in which connection reliability of a solder bump and a pad is high.SOLUTION: The printed wiring board comprises: an interlayer resin insulation layer; pads formed on the interlayer resin insulation layer and on which an electronic component is mounted; a solder resist layer formed on the interlayer resin insulation layer and the pads and having openings above the pads; and a coating layer formed on te pads exposed from the openings. The solder resist layer has a protrusion protruding inward of the opening from the bottom thereof, and the protrusion has a flat surface at the tip thereof.
摘要翻译：要解决的问题：提供一种其中焊料凸块和焊盘的连接可靠性高的印刷线路板。解决方案：印刷电路板包括：层间树脂绝缘层; 衬垫，其形成在层间树脂绝缘层上并且安装有电子部件; 形成在所述层间树脂绝缘层和所述焊盘上并且在所述焊盘上方具有开口的阻焊层; 以及形成在从开口露出的te垫上的涂层。阻焊层具有从其底部向开口的内侧突出的突起，突起在其顶端具有平坦的表面。版权所有（C）2012，JPO＆INPIT

3. 发明专利

JP2013080823A Printed wiring board and manufacturing method of the same 审中-公开
标题翻译：印刷线路板及其制造方法
公开(公告)号：JP2013080823A
公开(公告)日：2013-05-02
申请号：JP2011220063
申请日：2011-10-04
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： SAKAI KENJI , TOMINAGA RYOJIRO , UMEHARA KEIICHI
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a printed wiring board capable of sufficiently securing adhesiveness between an isolating layer and a conductor pattern, while suppressing an occurrence of a warpage.SOLUTION: First insulating layers 40 formed by impregnating resin into a reinforcement material 47 are provided on both surfaces of a core substrate 30 provided with a reinforcement material 29, and after the core substrate is reinforced with the insulating layers 40, second insulating layers 50, 60, and 70 containing no reinforcement material are laminated. A thickness of a second conductor pattern 48 on the first insulating layer 40 is thicker than a thickness of a third conductor pattern 58 (68 or 78) on the second insulating layer 50 (60 or 70).
摘要翻译：要解决的问题：提供能够充分确保隔离层和导体图案之间的粘附性的印刷布线板，同时抑制翘曲的发生。解决方案：在设置有加强材料29的芯基板30的两个表面上设置通过将树脂浸渍到增强材料47中而形成的第一绝缘层40，并且在芯基板被绝缘层40加强之后，第二绝缘层层压不含增强材料的层50,60和70。第一绝缘层40上的第二导体图案48的厚度比第二绝缘层50（60或70）上的第三导体图案58（68或78）的厚度厚。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2012151161A Manufacturing method of circuit board 有权
标题翻译：电路板制造方法
公开(公告)号：JP2012151161A
公开(公告)日：2012-08-09
申请号：JP2011006703
申请日：2011-01-17
申请人： Ibiden Co Ltd , Ushio Inc , イビデン株式会社 , ウシオ電機株式会社
发明人： MAEZONO YOSHINARI , YAMAZAKI YU , MORIMOTO YUKIHIRO , IWATA YOSHIYUKI , SAKAMOTO HAJIME , TOMINAGA RYOJIRO , NAKATANI TAKEHISA
IPC分类号： H05K3/38 , H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a circuit board capable of forming a metal exposure part to facilitate electric conduction while ensuring high adhesion between a metal part and a resin part by removing a cured film formed on the metal part.SOLUTION: A manufacturing method of a circuit board in which a cured film is formed by curing a silane coupling agent on a surface of at least a part of a metal part of a conductive part comprises: an ultraviolet light irradiation step of irradiating a part of the cured film with ultraviolet light; and an irradiated part removal step of removing the part irradiated with the ultraviolet light.
摘要翻译：要解决的问题：提供一种能够形成金属曝光部分以便于导电的电路板的制造方法，同时通过去除形成在金属部件上的固化膜来确保金属部件和树脂部件之间的高粘合性。解决方案：通过在导电部件的至少一部分的表面上固化硅烷偶联剂形成固化膜的电路板的制造方法包括：照射紫外线照射步骤一部分紫外线固化膜; 以及去除被紫外线照射的部位的照射部去除工序。版权所有（C）2012，JPO＆INPIT

5. 发明专利

JP2013197548A Wiring board and manufacturing method of the same 审中-公开
标题翻译：接线板及其制造方法
公开(公告)号：JP2013197548A
公开(公告)日：2013-09-30
申请号：JP2012066399
申请日：2012-03-22
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： ISHIDA ATSUSHI , KAWAI SATORU , TOMINAGA RYOJIRO , GOTO NOBUMASA , MORITA HARUHIKO
IPC分类号： H05K3/46 , H05K3/42
摘要： PROBLEM TO BE SOLVED: To inhibit the movements of voids formed in a through-hole conductor.SOLUTION: A planar conductor 11c is formed on a first surface F1 of a substrate 10, and a planar conductor 12c is formed on a second surface F2 of the substrate 10. Further, the substrate 10 has a through hole 10h, and a through-hole conductor 10c connecting the planar conductor 11c with the planar conductor 12c is provided in the through hole 10h. The interior of the through-hole conductor 10c includes a void V1. An insulation layer 20 is formed on the first surface F1 of the substrate 10 and the planar conductor 11c. A conductor pattern 21c is formed on the insulation layer 20. Multiple openings 20h exposing parts of the planar conductor 11c are provided at the insulation layer 20, and a via conductor 20c connecting the planar conductor 11c with the conductor pattern 21c is formed in each opening 20h.
摘要翻译：要解决的问题：抑制在通孔导体中形成的空隙的运动。解决方案：平面导体11c形成在基板10的第一表面F1上，并且平面导体12c形成在第二表面F2上基板10.此外，基板10具有通孔10h，并且在通孔10h中设置有将平面导体11c与平面导体12c连接的通孔导体10c。通孔导体10c的内部包括空隙V1。在衬底10的第一表面F1和平面导体11c上形成绝缘层20。在绝缘层20上形成导体图案21c。在绝缘层20上设置有露出部分平面导体11c的多个开口20h，并且在每个开口中形成连接平面导体11c与导体图案21c的通孔导体20c 20h。

6. 发明专利

JP2014045071A Printed wiring board and manufacturing method of the same 审中-公开
标题翻译：印刷线路板及其制造方法
公开(公告)号：JP2014045071A
公开(公告)日：2014-03-13
申请号：JP2012186493
申请日：2012-08-27
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： KATO HISASHI , TOMINAGA RYOJIRO , NOBUTOKI TETSUYA
IPC分类号： H05K3/46
CPC分类号： H05K1/0284 , H01L2924/0002 , H05K1/0271 , H05K3/4602 , H05K3/4644 , H05K3/4688 , H05K2201/0195 , H05K2201/029 , H05K2201/09136 , H05K2201/096 , Y10T156/10 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To inhibit warpage and enable mounting of a semiconductor element with high yield.SOLUTION: A printed wiring board comprises a core substrate 30 which has a region with a resin amount larger on a first surface side than on a second surface side by employing a center line C in a thickness direction of the core substrate 30 as a border when a sum V1 of a volume of a first conductor layer in a first build-up layer 55F is larger than a sum V2 of a volume of a second conductor layer in a second build-up layer 55S.
摘要翻译：要解决的问题：抑制翘曲并且能够以高产率安装半导体元件。解决方案：印刷电路板包括芯基板30，芯基板30具有在第一表面侧比在第二表面侧上具有更大的树脂量的区域通过在第一堆积层55F中的第一导体层的体积的总和V1大于第二堆积层55F的总和V2时，通过在芯基板30的厚度方向上使用中心线C作为边界导体层在第二堆积层55S中。

7. 发明专利

JP2010245528A Substrate with metal film, and method for manufacturing the same 审中-公开
标题翻译：带金属膜的基板及其制造方法
公开(公告)号：JP2010245528A
公开(公告)日：2010-10-28
申请号：JP2010079315
申请日：2010-03-30
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO , ISHIDA ATSUSHI , TOMINAGA RYOJIRO
IPC分类号： H05K3/42 , H05K3/18 , H05K3/38
CPC分类号： H05K3/0032 , C25D5/02 , C25D7/12 , C25D7/123 , H05K3/387 , H05K3/422 , H05K3/4602 , H05K2201/09536 , H05K2201/09581 , H05K2201/09827 , H05K2203/095 , H05K2203/1572 , Y10T29/49117 , Y10T29/49155 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To provide a substrate with a metal thin film and a method for manufacturing the same, providing good adhesion of a metal film with a substrate even at a through-hole. SOLUTION: The method for manufacturing a substrate with a metal film includes preparation of an insulating substrate 11 having a first surface and a second surface opposite to the first surface, formation of the through-hole 12 having a tapered inner wall in the insulating substrate 11 from the first surface toward the second surface of the insulating substrate 11, formation of a composition containing a polymerization initiator and a polymerizable compound on the inner wall of the through-hole 12, irradiation of energy on the composition such that a polymer is formed on the inner wall of the through hole 12, imparting a plating catalyst on the polymer, and formation of a plated film on the inner wall of the through-hole 12. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了提供具有金属薄膜的基板及其制造方法，甚至在通孔处也提供金属膜与基板的良好的粘附性。解决方案：用金属膜制造衬底的方法包括制备具有第一表面和与第一表面相对的第二表面的绝缘衬底11，形成具有锥形内壁的通孔12 绝缘基板11从绝缘基板11的第一面到第二面，在通孔12的内壁上形成含有聚合引发剂和聚合性化合物的组合物，对组合物照射能量，使得聚合物形成在通孔12的内壁上，在聚合物上赋予镀催化剂，并在通孔12的内壁上形成镀膜。（C）2011，JPO＆INPIT

8. 发明专利

JP2010245517A Substrate with metal film, and method for manufacturing the same 审中-公开
标题翻译：带金属膜的基板及其制造方法
公开(公告)号：JP2010245517A
公开(公告)日：2010-10-28
申请号：JP2010058279
申请日：2010-03-15
申请人： Ibiden Co Ltd , イビデン株式会社
发明人： NIKI NORIO , ISHIDA ATSUSHI , TOMINAGA RYOJIRO
IPC分类号： H05K3/42 , H05K3/18 , H05K3/46
CPC分类号： H05K3/4661 , H05K3/0035 , H05K3/387 , H05K3/422 , H05K3/4682 , H05K2201/0195 , H05K2201/0209 , H05K2201/0239 , H05K2201/09581 , H05K2201/09827 , H05K2203/1168
摘要： PROBLEM TO BE SOLVED: To achieve good adhesiveness of a metal film and insulation layer even in a via hole. SOLUTION: The method for manufacturing a substrate with a metal film includes preparation of a first insulation layer 31, formation of a first conductive circuit 21 on the first surface of the first insulation layer 31, formation of a second insulation layer 32 on the first surface of the first insulation layer 31 and on the first conductive circuit 21, formation of a through-hole (a via hole 41) tapered from the first surface toward the first conductive circuit 21 in the second insulation layer 32, formation of a composition containing a polymerization initiator and a polymerizable compound on an inner wall of the through hole, formation of a graft polymer 411 on the inner wall of the through-hole by irradiating energy on the composition, application of a plating catalyst 412 on the graft polymer 411, and formation of an electroless-plated film 413 on the inner wall of the through hole. The first surface of the first insulation layer 31 faces to the second surface of the second insulation layer 32. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：即使在通孔中也能实现金属膜和绝缘层的良好的粘附性。解决方案：用金属膜制造衬底的方法包括制备第一绝缘层31，在第一绝缘层31的第一表面上形成第一导电电路21，在第一绝缘层31上形成第二绝缘层32 第一绝缘层31的第一表面和第一导电电路21上形成在第二绝缘层32中从第一表面向第一导电电路21渐缩的通孔（通孔41），形成在通孔的内壁上含有聚合引发剂和可聚合化合物的组合物，通过在组合物上照射能量在通孔的内壁上形成接枝聚合物411，在接枝聚合物上施加电镀催化剂412 411，在通孔的内壁上形成无电镀膜413。第一绝缘层31的第一表面面向第二绝缘层32的第二表面。版权所有（C）2011，JPO＆INPIT

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