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    • 3. 发明专利
    • Magnetic ram
    • 磁性RAM
    • JP2003347518A
    • 2003-12-05
    • JP2002376938
    • 2002-12-26
    • Hynix Semiconductor Inc株式会社ハイニックスセミコンダクター
    • JANG IN WOOPARK YOUNG JINLEE KYE NAMKIM CHANG SHUK
    • H01L27/105G11C11/15H01L21/8246H01L27/22H01L29/94H01L31/119H01L43/08
    • H01L27/228B82Y10/00
    • PROBLEM TO BE SOLVED: To provide a magnetic RAM achieving high integration of elements.
      SOLUTION: The magnetic RAM is so constituted as to comprise a pair of first word lines 53 formed above a semiconductor substrate 51; impurity junction regions 55-1, 55-2 formed in the semiconductor substrate 51; a ground line 61 connected to the impurity junction region 55-1; a pair of connecting layers 67 connected to the impurity junction regions 55-2, respectively; a pair of MTJ cells 69 provided in contact, respectively, with the pair of connecting layers 67; a pair of bit lines 74 provided in contact, respectively, with the pair of MTJ cells 69; a metal wiring contact plug 75 provided with some distance from the ground line 61; a second word line 65 provided in contact with the lower end of the metal wiring contact plug 75; and a metal wiring 77 formed in the direction crossing the bit line 73 squarely.
      COPYRIGHT: (C)2004,JPO
    • 要解决的问题:提供实现元件的高集成度的磁性RAM。 解决方案:磁性RAM被构造成包括形成在半导体衬底51上方的一对第一字线53; 在半导体衬底51中形成的杂质结区55-1,55-2; 连接到杂质结区55-1的接地线61; 分别连接到杂质结区55-2的一对连接层67; 分别与一对连接层67接触地设置的一对MTJ单元69; 分别与一对MTJ单元69接触地设置的一对位线74; 设置有距地线61一定距离的金属配线接触插塞75; 设置成与金属布线接触插塞75的下端相接触的第二字线65; 以及在与位线73正交的方向上形成的金属布线77。 版权所有(C)2004,JPO
    • 6. 发明专利
    • Forming method of magnetic ram
    • 磁性RAM的形成方法
    • JP2004214600A
    • 2004-07-29
    • JP2003188138
    • 2003-06-30
    • Hynix Semiconductor Inc株式会社ハイニックスセミコンダクター
    • LEE KYE NAMJANG IN WOO
    • H01L27/105G11C11/15H01L21/3213H01L21/8246H01L43/08H01L43/12
    • H01L43/12H01L21/32139
    • PROBLEM TO BE SOLVED: To improve characteristics and reliability of an element by simplifying a process by pattering an MTJ cell and a connection layer simultaneously and by preventing generation of metallic polymer or the like by carrying out an etching process by using an insulating film spacer and a hard mask as a mask instead of a photosensitive film pattern. SOLUTION: The method comprises a step for exposing a tunneling barrier layer by etching the hard mask layer and a magnetic free layer in photo-etching process using an MTJ cell mask, a step for forming an insulating film spacer in a side wall of the hard mask layer and the magnetic free layer by anisotropically etching an insulating film and a step for forming the MTJ cell and the connection layer by etching the tunneling barrier layer, the magnetic pinned layer and a metallic layer for a connection layer by using the insulating film spacer and the hard mask layer as a mask. COPYRIGHT: (C)2004,JPO&NCIPI
    • 要解决的问题:为了通过简化通过使MTJ单元和连接层同时进行的处理,并且通过使用绝缘体进行蚀刻处理来防止金属聚合物等的产生来提高元件的特性和可靠性 膜间隔物和硬掩模作为掩模而不是感光膜图案。 解决方案:该方法包括通过使用MTJ电池掩模在光蚀刻工艺中蚀刻硬掩模层和无磁性层来暴露隧道势垒层的步骤,在侧壁中形成绝缘膜间隔物的步骤 通过各向异性蚀刻绝缘膜的硬掩模层和无磁性层,以及通过使用所述连接层蚀刻隧道势垒层,磁性被钉扎层和连接层金属层来形成MTJ电池和连接层的步骤 绝缘膜间隔物和硬掩模层作为掩模。 版权所有(C)2004,JPO&NCIPI
    • 10. 发明专利
    • Method for manufacturing magnetic ram
    • 制造磁性RAM的方法
    • JP2003347519A
    • 2003-12-05
    • JP2002377522
    • 2002-12-26
    • Hynix Semiconductor Inc株式会社ハイニックスセミコンダクター
    • LEE KYE NAMPARK YOUNG JINKIM CHANG SHUKJANG IN WOOKEI KI
    • H01L27/105G11C11/15H01L21/033H01L21/8246H01L43/08H01L43/12
    • H01L43/12H01L21/0331Y10S438/95
    • PROBLEM TO BE SOLVED: To provide a method for manufacturing a magnetic RAM with device characteristics and reliability improved by securing an MTJ cell region without damage to the lead layer below the MTJ layer.
      SOLUTION: The method for manufacturing a magnetic RAM includes a step of forming a lower lead layer 43 on the upper surface of a first interlayer insulating film 41, formed on a semiconductor substrate (not illustrated) having a cell region 300 and a peripheral circuit region 400, a step of forming a second interlayer insulating film 45 on the lower lead layer 43, a step of etching for the exposure of the lower lead layer 43 in the cell region 300, a step of forming an MTJ layer 49 on the exposed lower lead layer 43 and on the second interlayer insulating film 45 in the peripheral circuit region 400, so thick as to allow the exposure of part of the side walls of the second interlayer insulating film 45, a process of lifting off the second interlayer insulating 45 in the peripheral circuit region 400 and the MTJ layer 49 on the second interlayer insulating film 45, and a step of forming an upper lead layer bit line 59 to be connected to the MTJ layer 49.
      COPYRIGHT: (C)2004,JPO
    • 要解决的问题:提供一种通过固定MTJ单元区域而不损坏MTJ层下方的引线层来制造具有器件特性和可靠性的磁性RAM的方法。 解决方案:制造磁性RAM的方法包括在形成在具有单元区域300的半导体衬底(未示出)上的第一层间绝缘膜41的上表面上形成下引线层43的步骤, 外围电路区域400,在下引线层43上形成第二层间绝缘膜45的步骤,在单元区域300中对下引线层43进行蚀刻的步骤,形成MTJ层49的步骤 露出的下引线层43和周边电路区域400中的第二层间绝缘膜45上,使第二层间绝缘膜45的一部分侧壁露出的厚度变厚, 在第二层间绝缘膜45上的外围电路区域400和MTJ层49中绝缘45,以及形成要连接到MTJ层49的上引线层位线59的步骤。(C) 2004年,JPO