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1. 发明专利

JP2003347519A Method for manufacturing magnetic ram 审中-公开
标题翻译：制造磁性RAM的方法
公开(公告)号：JP2003347519A
公开(公告)日：2003-12-05
申请号：JP2002377522
申请日：2002-12-26
申请人： Hynix Semiconductor Inc , 株式会社ハイニックスセミコンダクター
发明人： LEE KYE NAM , PARK YOUNG JIN , KIM CHANG SHUK , JANG IN WOO , KEI KI
IPC分类号： H01L27/105 , G11C11/15 , H01L21/033 , H01L21/8246 , H01L43/08 , H01L43/12
CPC分类号： H01L43/12 , H01L21/0331 , Y10S438/95
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a magnetic RAM with device characteristics and reliability improved by securing an MTJ cell region without damage to the lead layer below the MTJ layer.
SOLUTION: The method for manufacturing a magnetic RAM includes a step of forming a lower lead layer 43 on the upper surface of a first interlayer insulating film 41, formed on a semiconductor substrate (not illustrated) having a cell region 300 and a peripheral circuit region 400, a step of forming a second interlayer insulating film 45 on the lower lead layer 43, a step of etching for the exposure of the lower lead layer 43 in the cell region 300, a step of forming an MTJ layer 49 on the exposed lower lead layer 43 and on the second interlayer insulating film 45 in the peripheral circuit region 400, so thick as to allow the exposure of part of the side walls of the second interlayer insulating film 45, a process of lifting off the second interlayer insulating 45 in the peripheral circuit region 400 and the MTJ layer 49 on the second interlayer insulating film 45, and a step of forming an upper lead layer bit line 59 to be connected to the MTJ layer 49.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种通过固定MTJ单元区域而不损坏MTJ层下方的引线层来制造具有器件特性和可靠性的磁性RAM的方法。解决方案：制造磁性RAM的方法包括在形成在具有单元区域300的半导体衬底（未示出）上的第一层间绝缘膜41的上表面上形成下引线层43的步骤，外围电路区域400，在下引线层43上形成第二层间绝缘膜45的步骤，在单元区域300中对下引线层43进行蚀刻的步骤，形成MTJ层49的步骤露出的下引线层43和周边电路区域400中的第二层间绝缘膜45上，使第二层间绝缘膜45的一部分侧壁露出的厚度变厚，在第二层间绝缘膜45上的外围电路区域400和MTJ层49中绝缘45，以及形成要连接到MTJ层49的上引线层位线59的步骤。（C） 2004年，JPO

2. 发明专利

JP2003338610A Magnetic ram 审中-公开
标题翻译：磁性RAM
公开(公告)号：JP2003338610A
公开(公告)日：2003-11-28
申请号：JP2003006845
申请日：2003-01-15
申请人： Hynix Semiconductor Inc , 株式会社ハイニックスセミコンダクター
发明人： JANG IN WOO , PARK YOUNG JIN , LEE KYE NAM , KIM CHANG SHUK , KEI KI
IPC分类号： G11C11/15 , G11C11/16 , H01L21/8246 , H01L27/105 , H01L27/22 , H01L43/08
CPC分类号： H01L27/228 , B82Y10/00 , G11C11/16
摘要： PROBLEM TO BE SOLVED: To provide an MRAM in which an element can be easily made highly integrated and whose manufacturing process can be simplified.
SOLUTION: The MRAM is provided with a substrate 61 where source/drain regions 62 and 63 and a gate electrode 6 being a word line are formed, contacts 67 and 69 formed on upper faces of the regions 62 and 63, a common line 79 which is electrically connected to the contact 67 through a plug 75, a metal line 81 which is electrically connected to the contact 69 through a plug 77, a connection film 89 which is electrically connected to a metal line 81 through a plug 87 and is formed so that it is overlapped with a region above the common line 79, an MTJ element 99 formed on the upper face of the connection film 89 in the region above the common line 79, and a bit line 103 formed on the upper face of the element. In the case of data reading, a voltage of a ground level is applied to the common line 79. In the case of data writing, a constant quantity of current is supplied to it.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种MRAM，其中元件可以容易地制成高度集成并且其制造过程可以被简化。解决方案：MRAM设置有形成源极/漏极区域62和63以及作为字线的栅电极6的衬底61，形成在区域62和63的上表面上的触点67和69，共同的线79，其通过插头75电连接到触点67;金属线81，其通过插头77电连接到触点69;连接膜89，其通过插头87与金属线81电连接;以及形成为与公共线79上方的区域重叠，形成在公共线79上方的连接膜89的上表面上的MTJ元件99和形成在公共线79的上表面上的位线103 元素。在数据读取的情况下，对公共线79施加接地电平的电压。在数据写入的情况下，向其提供恒定电流量。版权所有（C）2004，JPO

3. 发明专利

JP2003197879A WRITING METHOD FOR MAGNETIC RAM USING BIPOLAR JUNCTION TRANSISTOR 审中-公开
公开(公告)号：JP2003197879A
公开(公告)日：2003-07-11
申请号：JP2002271355
申请日：2002-09-18
申请人： HYNIX SEMICONDUCTOR INC
发明人： SANG-SOK KIM , KANG HEE BOK , KEI KI , JANG IN WOO
IPC分类号： G11C11/15 , G11C11/16 , H01L21/8246 , H01L27/105 , H01L43/08
摘要： PROBLEM TO BE SOLVED: To provide a writing method for a magnetic RAM using a bipolar junction transistor. SOLUTION: The writing method is for use with the magnetic RAM using the bipolar junction transistor including: a semiconductor substrate serving as a base of the bipolar junction transistor; an emitter and a collector of the bipolar junction transistor formed in an active region of the semiconductor substrate; an MTJ cell positioned in the active region between the emitter and the collector, separately from the emitter and the collector by a predetermined distance; a word line formed on the MTJ cell; a bit line connected to the collector; and a reference voltage line connected to the emitter. The writing method writes data by applying current from the emitter to the collector, and changing a magnetization direction and a magnetization angle of a free ferromagnetic layer of the MTJ cell by a magnetic field generated due to the current. Current consumption is therefore reducible and then it is thus possible to improve a property and reliability of the semiconductor device. COPYRIGHT: (C)2003,JPO

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