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    • 1. 发明专利
    • Noise evaluation device
    • 噪声评估装置
    • JP2010101760A
    • 2010-05-06
    • JP2008273720
    • 2008-10-24
    • Hitachi Ltd株式会社日立製作所
    • NANBA AKIHIROSUGA TAKUHARA ATSUSHINOMA TATSUJI
    • G01R29/08
    • G01R31/002
    • PROBLEM TO BE SOLVED: To provide a noise evaluation device for measuring electric noise flowing from a device module operated by supplying electric energy. SOLUTION: The noise evaluation device includes: a module operated by supplying electric energy; and a noise detection part that has a contact terminal for electrically connecting grounds giving a potential reference and detects electric noise flowing to the grounds through the contact terminal, measures a distribution of noise flowing from the module by arranging the contact terminal and the noise detection part in an array. COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:提供一种噪声评估装置,用于测量从通过提供电能操作的装置模块流动的电噪声。 解决方案:噪声评估装置包括:通过提供电能来操作的模块; 以及噪声检测部,其具有用于电连接引起潜在参考的接地的接触端子并且检测通过接触端子流到接地的电噪声,通过布置接触端子和噪声检测部分来测量从模块流出的噪声的分布 在数组中。 版权所有(C)2010,JPO&INPIT
    • 6. 发明专利
    • Circuit board
    • 电路板
    • JP2012134330A
    • 2012-07-12
    • JP2010285286
    • 2010-12-22
    • Hitachi Ltd株式会社日立製作所
    • KOMIYA YASUMAROOSAKA HIDEKIHARA ATSUSHI
    • H05K1/02
    • PROBLEM TO BE SOLVED: To solve problems of increase in substrate area and cost caused by a technique of arranging a wire connected with an input pin of IC and subject to an influence of noise separately from a connector serving as an invading port and preparing a high-frequency filter circuit or a noise suppression element, and a problem of increase in cost caused by a technique of forming a high-frequency noise cut circuit including a capacitor and a resistance in a semiconductor integrated circuit element.SOLUTION: A circuit board comprises a connector, a plurality of ICs, a ground layer, a ground pin electrically connected with the ground layer, signal wiring connecting the plurality of ICs and arranged in an arcuate line centering around the connector or the ground pin.
    • 要解决的问题:为了解决由与IC的输入引脚连接的电线布置并且与作为侵入端口的连接器分开地受到噪声影响的技术引起的基板面积增加和成本的问题,以及 制备高频滤波器电路或噪声抑制元件,以及在半导体集成电路元件中形成包括电容器和电阻的高频噪声切断电路的技术引起的成本增加的问题。 解决方案:电路板包括连接器,多个IC,接地层,与接地层电连接的接地引脚,连接多个IC并且以围绕连接器或中心的弓形线布置的信号线 接地引脚。 版权所有(C)2012,JPO&INPIT
    • 7. 发明专利
    • Design method and design support system for semiconductor device or printed wiring board
    • 半导体器件或印刷电路板的设计方法和设计支持系统
    • JP2010009179A
    • 2010-01-14
    • JP2008165628
    • 2008-06-25
    • Elpida Memory IncHitachi Ltdエルピーダメモリ株式会社株式会社日立製作所
    • NAKAMURA SATOSHIHARA ATSUSHIKATAGIRI MITSUAKIHIROSE YUKITOSHIITAYA SATORUIWAKURA KEN
    • G06F17/50H05K3/00
    • G06F17/5036G06F2217/78H05K1/181H05K3/0005
    • PROBLEM TO BE SOLVED: To provide a design method and a design support system for a semiconductor device or a printed wiring board, using a semiconductor device model properly expressing parasitic elements that occur when mounting a semiconductor chip or a semiconductor package on a printed wiring board or the like.
      SOLUTION: The design method for a semiconductor device with the power source wiring, ground wiring and signal wiring of a semiconductor package and a printed circuit board as an adjustment-object system in a state that the semiconductor device is mounted on the printed wiring board or for a printed wiring board, includes: a step of extracting a correction circuit model 113 for correcting a parasitic element that occurs between the semiconductor device and the printed wiring board; a step of creating a semiconductor model 116 into which the correction circuit model 113 has been inserted; a step of calculating an adjustment-object value based on an adjustment-object system impedance model and the semiconductor device model 116; and a step of determining a design guide for the adjustment-object system by comparing the adjustment-object value with a constraint value.
      COPYRIGHT: (C)2010,JPO&INPIT
    • 要解决的问题:为了提供一种用于半导体器件或印刷线路板的设计方法和设计支持系统,使用适当地表示在将半导体芯片或半导体封装安装在基板上时发生的寄生元件的半导体器件模型 印刷电路板等。 解决方案:在半导体器件安装在印刷的状态下的半导体器件的设计方法,其具有作为调整对象系统的半导体封装的电源布线,接地布线和信号布线以及印刷电路板 布线板或印刷布线板的步骤包括:提取用于校正在半导体器件和印刷线路板之间发生的寄生元件的校正电路模型113的步骤; 创建已经插入校正电路模型113的半导体模型116的步骤; 基于调整对象系统阻抗模型和半导体器件模型116计算调整对象值的步骤; 以及通过将调整对象值与约束值进行比较来确定调整对象系统的设计指南的步骤。 版权所有(C)2010,JPO&INPIT
    • 9. 发明专利
    • Service system and wireless device communicable with service system
    • 服务系统和无线设备可与服务系统通信
    • JP2007133912A
    • 2007-05-31
    • JP2007034240
    • 2007-02-15
    • Hitachi Ltd株式会社日立製作所
    • UMEMURA MASAYAINAGAKI YUKIHIDETAKITA ISAOHARA ATSUSHI
    • G07B1/00G07B11/00G07B15/00G07G1/12H04W4/04H04W28/08
    • PROBLEM TO BE SOLVED: To provide a service system capable of providing a smoother service by reducing the frequency of occurrence of problems, such as congestion, service interruption and delay, resulting from high traffic. SOLUTION: The service system comprises a dispatcher as well as a service providing device. The dispatcher serves as a slave for a portable terminal to accept requests for service provision, and also serves as a master to accept requests for service provision using the portable terminal as its own slave, while informing the service providing device of an acquired unique identification number. The service providing device calls in the portable terminal, as its own slave, to a network and provides the service based on the informed unique identification number while taking service congestion into consideration. COPYRIGHT: (C)2007,JPO&INPIT
    • 要解决的问题:提供一种能够通过降低高流量所导致的诸如拥塞,服务中断和延迟等问题的发生频率来提供更平滑服务的服务系统。 解决方案:服务系统包括调度员以及服务提供设备。 调度员用作便携式终端接受服务提供请求的从设备,并且还用作主机以接受使用便携式终端作为其自己的从设备的服务提供请求,同时向服务提供设备通知所获取的唯一标识号 。 服务提供设备将便携式终端作为其自己的从设备呼叫到网络,并且在考虑服务拥塞的同时基于所知道的唯一标识号码提供服务。 版权所有(C)2007,JPO&INPIT