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1. 发明专利

JP2003031628A Method of manufacturing semiconductor device and method of probing semiconductor device 有权
标题翻译：制造半导体器件的方法和探针半导体器件的方法
公开(公告)号：JP2003031628A
公开(公告)日：2003-01-31
申请号：JP2002123389
申请日：2002-04-25
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KASUKABE SUSUMU , MORI TERUTAKA , ARIGA AKIHIKO , SHIGI HIDETAKA , WATABE TAKAYOSHI , KONO RYUJI
IPC分类号： G01R31/26 , G01R1/073 , G01R31/28 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a semiconductor device which enables to manufacture a high-quality semiconductor device by inspecting electrical characteristics of a semiconductor device by transmission of high speed electrical signals, that is, high frequency electrical signals, at a low load stably without damaging the semiconductor device.
SOLUTION: A probing apparatus comprises contact terminals 47 with pointed ends, interconnection 48 for extraction, ground layer 49, holder member 43, contact pressure application means 42, and compliance mechanisms 43c, 41a, and 41. A group of the contact terminals connected to a tester via the interconnection for extraction and a group of electrodes arranged in the semiconductor device are relatively aligned with each other and are brought into contact at contact pressure ranging from 3 to 50 mN per pin to be electrically connected. Electrical signals are transmitted and received between the tester and the electrodes to inspect electrical characteristics of the semiconductor device, and thereafter the semiconductor device is manufactured.
COPYRIGHT: (C)2003,JPO
摘要翻译：要解决的问题：提供一种制造半导体器件的方法，该半导体器件能够通过在高温电信号的传输中检测半导体器件的电特性（即，高频电信号）来制造高质量的半导体器件低负载稳定而不损坏半导体器件。解决方案：探测装置包括具有尖端的接触端子47，用于提取的互连48，接地层49，保持器构件43，接触压力施加装置42以及柔性机构43c，41a和41.一组接触端子连接到经由用于提取的互连的测试器和布置在半导体器件中的一组电极彼此相对对准，并且在每个引脚3至50mN的接触压力下接触以进行电连接。电信号在测试器和电极之间传输和接收，以检查半导体器件的电气特性，然后制造半导体器件。

2. 发明专利

JPH11274251A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPH11274251A
公开(公告)日：1999-10-08
申请号：JP6978698
申请日：1998-03-19
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KONO RYUJI , KITANO MAKOTO , MIURA HIDEO , OTA HIROYUKI , ENDO KIJU , HARADA TAKESHI , KANAMARU MASATOSHI , AKASHI TERUHISA , HOSOGANE ATSUSHI , ARIGA AKIHIKO , BAN NAOTO
IPC分类号： H01L21/66 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/26 , G01R31/28
CPC分类号： G01R1/07314 , G01R1/06744 , G01R3/00 , G01R31/2863
摘要： PROBLEM TO BE SOLVED: To enable collective inspection of a large region of an electrode pad of a wafer in an electric characteristic inspection process, by pressing a protrusion of an inspection structure body which is electrically connected with a pad on the opposite surface against a desired position of an object to be inspected, in a probing process and a burn-in inspection process.
SOLUTION: A first plate member 1 has a protrusion 11 group on a surface facing an object 2 to be inspected. On the tips of the protrusion 11 group, a wiring pattern 12 for obtaining electric continuity between the object 2 to be inspected and the outside is formed. The wiring pattern 12 is electrically connected with the rear of a surface of the first plate member 1 on which the protrusion 11 group is formed, through a penetrating hole 13. On the rear of the first plate member 1, an insulating film 3 is formed excepting a pad 121 part formed in the end portion of the wiring pattern 12. As a result, electric continuous paths of a pad to be inspected of the object 2 which exists in a projection surface of the first plate member 1 are all present in the projection surface of the first plate member 1. As a result, collective inspection of a large region of the electrode pad of a wafer in an electric characteristic inspection process is enabled.
COPYRIGHT: (C)1999,JPO
摘要翻译：要解决的问题：为了能够在电特性检查过程中对晶片的电极焊盘的大区域进行集体检查，通过将与相对表面上的焊盘电连接的检查结构体的突起压靠在期望的在检测过程和老化检查过程中要检查的物体的位置。解决方案：第一板构件1在面向待检查物体2的表面上具有突起11组。在突起11组的尖端上，形成用于获得被检查物体2与外部之间的电连续性的布线图案12。布线图案12通过贯通孔13与形成有突起11组的第一板构件1的表面的后部电连接。在第一板构件1的后部形成有绝缘膜3 除了形成在布线图案12的端部中的垫121部分之外。结果，存在于第一板构件1的突出表面中的被检体2的待检查的垫的电连续路径全部存在于从而能够在电特性检查处理中对晶片的电极焊盘的大区域进行集体检查。

3. 发明专利

JP2002071718A SEMICONDUCTOR INSPECTING INSTRUMENT AND PRODUCTION METHOD OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JP2002071718A
公开(公告)日：2002-03-12
申请号：JP2000254876
申请日：2000-08-25
申请人： HITACHI LTD
发明人： BAN NAOTO , ARIGA AKIHIKO , TAKAMURA YASUO , MOTOYAMA YASUHIRO
IPC分类号： G01R31/26 , G01R1/073 , G01R31/28 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To incorporate a circuit for inspection contained in a semiconductor chip to be inspected into a contactor of a probe card. SOLUTION: A contactor 7 is constituted of an Si board having a probe 15, an LSI chip 17 having a semiconductor inspection circuit and an Si tray 18 to match the joint position with the LSI chip 17 with a tapered mechanism 22. The Si board 16 is connected electrically and mechanically to the LSI chip 17 with a bump electrode 20, thereby enabling giving or taking of an electrical signal between the contactor 7 and the outside thereof.

4. 发明专利

JPH11111650A MANUFACTURE OF SEMICONDUCTOR DEVICE, AND JIG USED THEREOF AND SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPH11111650A
公开(公告)日：1999-04-23
申请号：JP19259298
申请日：1998-07-08
申请人： HITACHI LTD
发明人： WADA YUJI , MAEHARA TAKAYUKI , WADA EIJI , ARIGA AKIHIKO , NAKANO HITOSHI
IPC分类号： H01L21/66 , H01L21/301 , H01L21/50 , H01L21/677 , H01L21/68
摘要： PROBLEM TO BE SOLVED: To facilitate dealing at carrying of a semiconductor chip in a manufac turing process of a semiconductor device by cutting out a chip block collectively having at least a plurality of semiconductor chips as one unit, and carrying the chip block by accommodating it in one jig. SOLUTION: A plurality of semiconductor chips 2 are formed on a main surface of a semiconductor wafer. In this step, starting from the state of a polished wafer, the respective processes such as film formation, photolithography, etching and impurity introduction have been appropriately repeated, a DRAM element is formed on the main surface, a wiring is formed on it, and the processes for protective film formation is completed. Continuuingly, a semiconductor chip 2 is cut out from the semiconductor wafer. That is, cutting-out is performed in units of chip block in a batch having at least a plurality of the semiconductor chips 2. For example, one chip block CB has four semiconductor chips 2. This chip block CB is accommodated in a carrier (jig) and carried to a inspecting equipment.

5. 发明专利

JPS6448441A CONVEYOR 失效
公开(公告)号：JPS6448441A
公开(公告)日：1989-02-22
申请号：JP20401087
申请日：1987-08-19
申请人： HITACHI LTD
发明人： ARIGA AKIHIKO
IPC分类号： B25J15/06 , H01L21/677 , H01L21/68
摘要： PURPOSE:To convey a part easy to be deformed positively without deformation by providing a detecting means detecting the change of the quantity of air sucked into a suction head from the nose of a suction tube and instantaneously stopping the suction head when the flow rate of air is reduced. CONSTITUTION:Suction tubes 6, one parts of which are projected to the outside, are pierced into a suction surface in a suction head 1 supported in a relative displaceable manner to a main body 3 while elastic members 7 energizing the suction tubes 6 to the outside of the suction surface are set up to the suction tubes 6, and a detecting means 8 detecting the change of the quantity of air sucked into the suction head 1 from the noses of the suction tubes 6 is mounted at a specified position. When the noses of the suction tubes 6 are abutted against a part to be conveyed, the suction tubes 6 are moved into the suction head 1 against the energizing force of the elastic members 7, and the variation of the flow rate of air flowing into the suction head 1 is detected by a detecting means 8, and the suction head 1 is stopped instantaneously. Accordingly, suction work is conducted without applying strong push force to the part to be conveyed, thus positively conveying the part easy to be deformed without deformation.

6. 发明专利

JP2000171483A MANUFACTURE OF SEMICONDUCTOR INSPECTION DEVICE 失效
公开(公告)号：JP2000171483A
公开(公告)日：2000-06-23
申请号：JP34644498
申请日：1998-12-07
申请人： HITACHI LTD
发明人： HOSOGANE ATSUSHI , KANAMARU MASATOSHI , KONO RYUJI , ENDO KIJU , ARIGA AKIHIKO , BAN NAOTO , AOKI HIDEYUKI
IPC分类号： G01R1/073 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To collectively inspect the electrode pads having a large area of a wafer to be inspected by forming such a beam or diaphragm structure that probes are changed by pressing forces in a substrate on which the probes are formed and pressing or fixing the wafer in which the electrode pads are formed. SOLUTION: A plurality of probes 13 is formed in an inspection wafer 11 by forming a coating film on the surface of a silicon substrate and, after the film is patterned by photolithography, a plurality of probes 13 by etching. Then, after the coating film is removed, diaphragms 12 are formed at every probe 13 in the same process. In the same process, in addition, through holes 14 are formed correspondingly to the probes 13 and wiring 16 is formed from the probes 13 to secondary-side electrode pads 17 through the through holes 14. The electrode pads 17 are connected to POGO pins 25 and the wafer 11 fixed to a pressing mechanism supporting substrate 23 is pressed against a wafer 21 to be inspected on a wafer fixing stage 22. Therefore, the probes 13 can evenly inspect the primary-side electrode pads 23 of the wafer 21 for electric characteristics, because the probes 13 come into contact with the electrodes pads 23, resulting in the deformation of the diaphragms 12, and a fixed load is applied between the probes 13 and electrode pads 23.

7. 发明专利

JPH10163282A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH10163282A
公开(公告)日：1998-06-19
申请号：JP31907096
申请日：1996-11-29
申请人： HITACHI LTD
发明人： ISHINO MASAKAZU , KASUKABE SUSUMU , ARIGA AKIHIKO
IPC分类号： H01L21/66 , H01L21/3205 , H01L21/822 , H01L23/52 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To realize electrode arrangement wherein dimension change of a probe and a package can be extremely reduced, and prevent breakage of a circuit element when the probe is brought into contact with the electrodes, by constituting new wiring from electrodes of a semiconductor integrated circuit to the uppermost surface of a chip, and forming this electrode arrangement. SOLUTION: A process for obtaining re-arranged electrodes by forming a new wiring layer on the surface of a semiconductor integrated circuit is performed. A laminated film 309 composed of titanium and palladium is formed on the surface of the semiconductor integrated circuit by sputtering. In the laminated film 309, materials are not restricted as far as the materials are suitable for a thin film wiring such as a single layer film of aluminum and laminated thin film of Cr/Cu. Photoresist coating, exposure and development are performed, and resist 310 is left in a shape necessary for an etching mask. A laminated film in unnecessary parts is eliminated by etching, and a state that the resist 310 is exfoliated is obtained. Thereby new electrode arrangement can be obtained on a protective film of the conventional semiconductor chip.

8. 发明专利

JPH10163281A SEMICONDUCTOR ELEMENT AND ITS MANUFACTURE 失效
公开(公告)号：JPH10163281A
公开(公告)日：1998-06-19
申请号：JP25015997
申请日：1997-09-16
申请人： HITACHI LTD
发明人： KASUKABE SUSUMU , ARIGA AKIHIKO , MORI TERUTAKA
IPC分类号： G01R31/26 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To simplify inspection and largely reduce a manufacturing cost, by pressing a contact terminal in the state that the positional relation between semiconductor elements subjected to dicing is maintained, making electrical contact, and performing inspection by operation characteristics test, to a semiconductor element, with a tester. SOLUTION: Inspection is performed by using a semiconductor wafer subjected to dicing, as it is. An inspection equipment is constituted as a wafer prober in the manufacturing of a semiconductor element, and provided with specimen retaining system 140, probe system 100, driving control system 150 and a tester 170. An electrode 3a formed on a semiconductor element 3 which is isolated by dicing a semiconductor wafer 4 is positioned just under a connection terminal 103 of the probe system 100. Tips of a plurality of contact terminals 103 are brought into contact, at a specified pressure, with a plurality of the electrodes 3a in an aimed semiconductor element. In this state, delivery of operation power, operation test signal, etc., is performed between the semiconductor element 3 of a semiconductor wafer 4 and the tester 170, and quality or the like of operation characteristics of the semiconductor element 3 is judged.

9. 发明专利

JPH1092884A TESTING APPARATUS 失效
公开(公告)号：JPH1092884A
公开(公告)日：1998-04-10
申请号：JP24062596
申请日：1996-09-11
申请人： HITACHI LTD
发明人： KUMAZAWA TETSUO , KONO RYUJI , KITANO MAKOTO , ARIGA AKIHIKO
IPC分类号： G01R1/06 , G01R31/28 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To accurately, quickly and easily perform alignment by providing observing means for directly viewing objects under test above transparent members which form upper parts of contact terminals. SOLUTION: The apparatus comprises contact terminals 1 to contact an Si wafer under test, cantilever support 9 mounted on a pedestal 18 at one end, and probe cassette 100 having transparent members removably mounted on the support 9. It has a control processor 21 for transferring electric signals to and from the wafer 17 being contacted to the terminals 1, video cameral 16 disposed above the cassette 100, and inching table 24 which carries the wafer 17 and moves it, relative to the support 9 to contact the terminals 1 to the wafer 17. This permits the object under test to be directly viewed through the transparent members from above a thin film probe, thus facilitating the alignment accurately and quickly.

10. 发明专利

JPS63257240A INSPECTION USING PROBE 失效
公开(公告)号：JPS63257240A
公开(公告)日：1988-10-25
申请号：JP9084087
申请日：1987-04-15
申请人： HITACHI LTD
发明人： ARIGA AKIHIKO
IPC分类号： H01L21/66 , G01R31/26
摘要： PURPOSE:To prevent a probe and an object to be inspected from being damaged, by a method wherein, when the object to be inspected is brought close to the probe, an approaching speed is delayed as soon as it approaches the probe. CONSTITUTION:While a wafer stage 1 is raised at a high speed of, e.g., about 28 mm/s, a semiconductor wafer 2 is brought close to probes 4. Just before the semiconductor wafer 2 comes into contact with the probes 4, the ascending speed of the wafer stage 1 is changed to a slow speed of, e.g., 5 mm/s; the semiconductor wafer 2 is brought closer to the probes 4 at this speed. When the wafer stage 1 has reached a prescribed position, it is stopped automatically; in this state, the probes 4 come into contact with Al pads installed on a semiconductor chip inside the semiconductor wafer 2; a prescribed inspection operation by using the probes is executed automatically.

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