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1. 发明专利

JP2004355013A Video display unit 审中-公开
公开(公告)号：JP2004355013A
公开(公告)日：2004-12-16
申请号：JP2004216688
申请日：2004-07-26
申请人： Hitachi Advanced Digital Inc , Hitachi Ltd , 株式会社日立アドバンストデジタル , 株式会社日立製作所
发明人： NAGATA TATSUO , MATONO TAKAAKI , SAKAI TAKESHI , HASEGAWA AKIRA , SUDO KOICHI
IPC分类号： G09G3/36 , G09G3/20 , G09G5/00 , G09G5/18 , G09G5/36 , G09G5/391 , H04N5/66 , H04N7/01
摘要： PROBLEM TO BE SOLVED: To properly and sharply display an image that a video signal of an arbitrary transmission system represents on a display of an arbitrary screen system.
SOLUTION: A PLL (phase locked loop) 3 and a controller 7 of a video signal processor 9 identify the transmission system of a video signal B sent from a terminal 1 with an identification signal C received at a terminal 4. The PLL 3 divides the reference frequency for phase comparison with the video signal B by using a frequency division ratio suitable to the identified transmission system of the video signal B. An optimum sampling frequency is therefore supplied to an A/D converter 2. The controller 7 determines a vertical enlargement rate of a vertical enlarging circuit 5 and a horizontal enlargement rate of a horizontal enlarging circuit 6 according to the sceeen system of the display 8 and the identified transmission system of the video signal B. Consequently, the a vertical enlarging circuit 5 and horizontal enlarging circuit 6 applies vertical enlargement processing and horizontal enlargement processing for canceling the difference in aspect ratio between the display 8 and video signal B to the video signal B.
COPYRIGHT: (C)2005,JPO&NCIPI

2. 发明专利

JP2007156501A Video signal processor 审中-公开
标题翻译：视频信号处理器
公开(公告)号：JP2007156501A
公开(公告)日：2007-06-21
申请号：JP2007010958
申请日：2007-01-22
申请人： Hitachi Advanced Digital Inc , Hitachi Ltd , 株式会社日立アドバンストデジタル , 株式会社日立製作所
发明人： NAGATA TATSUO , MATONO TAKAAKI , SAKAI TAKESHI , HASEGAWA AKIRA , SUDO KOICHI
IPC分类号： G09G5/00 , G09G3/20 , G09G5/36 , H04N5/66
摘要： PROBLEM TO BE SOLVED: To properly and clearly display an image expressed by a video signal of an optional transmission type on a display of an optional screen type. SOLUTION: A PLL 3 and a controller 7 in the video signal processor 9 identify the transmission type of a video signal B input from a terminal 1 in accordance with an identification signal C received by a terminal 4. The PLL 3 divides the frequency of a reference frequency to be compared with the phase of the video signal B by using a frequency division ratio suited to the identified transmission type of the video signal B. Thereby, an optimum sampling frequency is applied to an A/D converter 2. The controller 7 determines the vertical enlargement ratio of a vertical enlargement circuit 5 and the horizontal enlargement ratio of a horizontal enlargement circuit 6 from the screen type of the display 8 and the identified transmission type of the video signal B. Consequently, the vertical enlargement circuit 5 and the horizontal enlargement circuit 6 apply to the video signal B vertical enlargement processing and horizontal enlargement processing for offsetting a difference of aspect ratios between the display 8 and the video signal B, respectively. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：在可选屏幕类型的显示器上正确且清楚地显示由可选传输类型的视频信号表示的图像。解决方案：视频信号处理器9中的PLL 3和控制器7根据由终端4接收的识别信号C来识别从终端1输入的视频信号B的传输类型.PLC3将通过使用适合于所识别的视频信号B的传输类型的分频比来与视频信号B的相位比较的参考频率的频率。由此，最佳采样频率被施加到A / D转换器2。控制器7根据显示器8的屏幕类型和识别的视频信号B的传输类型来确定垂直放大电路5的垂直放大率和水平放大电路6的水平放大比。因此，垂直放大电路 5和水平放大电路6适用于视频信号B垂直放大处理和水平放大处理，用于抵消方面的大鼠的差异 ios分别在显示器8和视频信号B之间。版权所有（C）2007，JPO＆INPIT

3. 发明专利

JP2013025473A Image processing device and image processing method 有权
标题翻译：图像处理装置和图像处理方法
公开(公告)号：JP2013025473A
公开(公告)日：2013-02-04
申请号：JP2011158034
申请日：2011-07-19
申请人： Hitachi Advanced Digital Inc , 株式会社日立アドバンストデジタル
发明人： IDOKAWA YOSHINORI , MAEDA TAKESHI , SUDO KOICHI , FUKATA MASAHIRO , MUGIYAMA TORU , YOKOYAMA TAKUSHI , SAKURAI HIROSHI , EGUCHI MITSUO
IPC分类号： G06T5/20 , H04N5/232
摘要： PROBLEM TO BE SOLVED: To perform proper restoration processing according to a deterioration state of each position in a screen, even if image deterioration varies depending on the positions in the screen due to lens characteristics, and significantly reduce computational complexity.SOLUTION: A variance value table stores a variance value of a PSF coefficient in each lattice point in the screen. A PSF coefficient table stores correspondence between the variance value and the PSF coefficient. The values are stored separately by component in a screen horizontal direction and a screen vertical direction. A variance value calculation part refers to the variance value table to determine a variance value in a pixel to be processed. A PSF coefficient calculation part refers to the PSF coefficient table to output a PSF coefficient of the pixel to be processed. A horizontal/vertical convolution processing part performs convolution processing in horizontal and vertical directions using the PSF coefficient in the horizontal and vertical directions to restore the deteriorated image.
摘要翻译：要解决的问题：为了根据屏幕中的每个位置的劣化状态执行适当的恢复处理，即使由于透镜特性，图像劣化根据屏幕中的位置而变化，并且显着降低了计算复杂度。解决方案：方差值表存储屏幕中每个格点中的PSF系数的方差值。 PSF系数表存储方差值与PSF系数之间的对应关系。这些值由屏幕水平方向和屏幕垂直方向上的分量单独存储。方差值计算部分参考方差值表以确定要处理的像素中的方差值。 PSF系数计算部参照PSF系数表输出要处理的像素的PSF系数。水平/垂直卷积处理部分在水平和垂直方向上使用PSF系数在水平和垂直方向上进行卷积处理，以恢复劣化的图像。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2013207752A Image processing apparatus 审中-公开
标题翻译：图像处理设备
公开(公告)号：JP2013207752A
公开(公告)日：2013-10-07
申请号：JP2012077782
申请日：2012-03-29
申请人： Hitachi Automotive Systems Ltd , 日立オートモティブシステムズ株式会社 , Hitachi Advanced Digital Inc , 株式会社日立アドバンストデジタル
发明人： SASADA YOSHIYUKI , MAEDA TAKESHI , SUDO KOICHI
IPC分类号： H04N5/232 , G06T5/20
摘要： PROBLEM TO BE SOLVED: To provide an image processing apparatus which can restore a degraded image with high reliability, even if tilt occurs between the optical axis of a lens and the central axis of an image sensor and thereby the focus varies in the plane of the image sensor.SOLUTION: The image processing apparatus restores an image captured by means of an image pickup apparatus, having a lens and an image sensor fixed in alignment with the optical axis of the lens, by performing PSF (point spread function) multiplication of the image. The image processing apparatus includes a PSF memory 44 storing the PSF corresponding to each in-plane area of the image sensor, and a restoration unit 20 for restoring an image captured by performing PSF multiplication thereof, corresponding to each in-plane area of the image sensor.
摘要翻译：要解决的问题：即使在透镜的光轴和图像传感器的中心轴之间发生倾斜，从而焦点在平面内变化，因此提供可以高可靠性恢复劣化图像的图像处理装置图像传感器。解决方案：图像处理装置通过执行与透镜的光轴对准固定的透镜和图像传感器的图像拾取装置捕获的图像，通过执行透镜的PSF（点扩展函数）乘法图片。图像处理装置包括：存储对应于图像传感器的每个面内区域的PSF的PSF存储器44;以及恢复单元20，用于恢复对应于图像的每个面内区域执行PSF相乘所捕获的图像传感器。

5. 发明专利

JP2000078433A Pll circuit, ad conversion circuit using the same and video signal processor 审中-公开
标题翻译： PLL电路，使用其的AD转换电路和视频信号处理器
公开(公告)号：JP2000078433A
公开(公告)日：2000-03-14
申请号：JP24285998
申请日：1998-08-28
申请人： Hitachi Ltd , Hitachi Video & Inf Syst Inc , 株式会社日立画像情報システム , 株式会社日立製作所
发明人： KIMURA KATSUNOBU , MATONO TAKAAKI , SAKAI TAKESHI , SUGIYAMA MASAHITO , ISHIKURA KAZUO , SUDO KOICHI
IPC分类号： H04N5/06 , G09G5/00 , G09G5/18 , H03L7/081 , H03M1/00
摘要： PROBLEM TO BE SOLVED: To obtain a highly accurate PLL capable of variably adjusting the phase relation between a dot clock signal and an analog video signal without providing an expensive IC by outputting the dot clock signal by varying frequency according to a DC value of a loop filter output to output a voltage difference signal by filtering it and converting it into a DC signal.
SOLUTION: Frequency information of vertical and horizontal synchronizing signals of various video standards are stored in a microcomputer 120, the standard is judged and held by collating the frequency information of the video standard and the frequency information of the vertical and horizontal synchronizing signal to be inputted. And information on frequency division from the microcomputer 120 is stored in a frequency divider pulse generation circuit 110. On the other hand, the dot clock signal generated by a voltage control oscillator 119 is supplied to a clock input terminal of a counter like a counter of the frequency divider pulse generating circuit 110, the frequency is divided 1/n by the counter and an H pulse signal formed by dividing the frequency by 1/n is outputted from the frequency divider pulse generating circuit 110.
COPYRIGHT: (C)2000,JPO
摘要翻译：要解决的问题：为了获得能够通过根据循环的DC值通过改变频率输出点时钟信号而不提供昂贵的IC来可变化地调整点时钟信号和模拟视频信号之间的相位关系的高精度PLL 滤波器输出，通过对其进行滤波并将其转换为直流信号来输出电压差信号。解决方案：将各种视频标准的垂直和水平同步信号的频率信息存储在微型计算机120中，通过将视频标准的频率信息和要输入的垂直和水平同步信号的频率信息进行比较来判断和保持标准。并且来自微型计算机120的分频信息存储在分频脉冲发生电路110中。另一方面，由压控振荡器119产生的点时钟信号被提供给计数器的时钟输入端，像计数器的计数器分频器脉冲发生电路110，频率被计数器分频为1 / n，并且由分频器脉冲产生电路110输出由频率除以1 / n形成的H脉冲信号。

6. 发明专利

JPH09163255A METHOD FOR DETECTING TELEVISION SYSTEM IDENTIFYING SIGNAL AND DEVICE THEREFOR 失效
公开(公告)号：JPH09163255A
公开(公告)日：1997-06-20
申请号：JP32308095
申请日：1995-12-12
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： HASEGAWA AKIRA , MATONO TAKAAKI , SAKAI TAKESHI , SUDO KOICHI , KITATSUME SATOSHI
IPC分类号： H04N5/44 , H04N7/015 , H04N7/08 , H04N7/081
摘要： PROBLEM TO BE SOLVED: To detect an identifying signal by means of following a deviation when the deviation is generated in a horizontal phase where the identifying signal is superimposed and in a detection scanning line by changing the horizontal detection starting position of the identifying signal and the scanning line. SOLUTION: When the TV system identifying signal is superimposed on the prescribed position, a control microcomputer 301 respectively sets the detection scanning line capable of detecting the signal in a horizontal synchronizing signal counter 201 and sets the horizontal detection starting position in a delay circuit 202 as an initial setting value. When the identifying signal is not detected from a TV signal which is inputted from a TV signal input terminal 104 to an identifying signal detecting circuit 203, the control microcomputer 301 controls the delay circuit 202 and changes the horizontal detection starting position. When the identifying signal is not detected by this, the horizontal synchronizing signal counter 201 is controlled and the detection scanning line is changed. Thus, the delay circuit 202 is controlled so that the identifying signal is detected.

7. 发明专利

JP2000022992A NOISE REDUCING SIGNAL PROCESSOR 失效
公开(公告)号：JP2000022992A
公开(公告)日：2000-01-21
申请号：JP18712798
申请日：1998-07-02
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： KIMURA KATSUNOBU , MATONO TAKAAKI , TAKADA HARUKI , NAGATA TATSUO , SUGIYAMA MASAHITO , TSURU YASUTAKA , SUDO KOICHI
IPC分类号： G06T5/00 , G06T5/20 , H04N5/21
摘要： PROBLEM TO BE SOLVED: To provide a noise reducing device which performs precise noise reduction free of addition of a new distortion signal and residue of unerased noise as to a video signal including noise of various voltage levels. SOLUTION: This processor is provided with a median filter 40, a difference arithmetic means 50 decides the large/small relation between an input signal A and a median filter output signal B by calculating difference data between both the signals, a minimum value detecting means 70 which limits the signal level of the difference data, and a means 35 which varies the value of the difference data used for the input video signal according to the difference data outputted by the minimum value detecting means 70 and the large/small relation.

8. 发明专利

JPH1146352A IMAGE DISPLAY DEVICE 失效
公开(公告)号：JPH1146352A
公开(公告)日：1999-02-16
申请号：JP19947597
申请日：1997-07-25
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： SAKAI TAKESHI , MATONO TAKAAKI , NAGATA TATSUO , SUDO KOICHI
IPC分类号： H04N11/20 , H04N7/01
摘要： PROBLEM TO BE SOLVED: To effectively use a display screen by converting the video signals of an interlaced system into video signals of a non-interlaced system, after enlarging the former video signals in matching with an arbitrary enlargement ratio. SOLUTION: An interpolation coefficient generation means 5 generates Mo, which constructs an interpolation coefficient for odd numbered fields from Mo=(n-1)W+S1 -[(n-1)W+S1 ] when W is a set enlargement ratio with (n) showing a sequential scanning line number of a non-interlaced system, where W=1-1/w and [] indicates Gaussian symbols which omit the decimal fractions, and S1 showing the 1st offset value respectively. An image conversion means 2 calculates No of an interpolation coefficient with No=1-Mo, Me=Mo+ S2 -[Mo+S2 ] and Ne=1-Me (where S2 : the 2nd offset value) and also calculates the interpolation coefficients Me and Ne for the even-nunbered fields. Then the means 2 multiplies the video signals of two input scanning lines by an interpolation coefficient which is equivalent to a weighting coefficient to add these signals and produces the video signals of a single sequential scanning line.

9. 发明专利

JPH10161632A IMAGE DISPLAY DEVICE 失效
公开(公告)号：JPH10161632A
公开(公告)日：1998-06-19
申请号：JP31748896
申请日：1996-11-28
申请人： HITACHI LTD , HITACHI VIDEO IND INF SYST INC
发明人： MATONO TAKAAKI , NAGATA TATSUO , SAKAI TAKESHI , SUDO KOICHI
IPC分类号： H04N5/66 , G09G5/36 , H04N5/46 , H04N9/64
摘要： PROBLEM TO BE SOLVED: To display an image of high quality by converting the picture elements in accordance with a specific mode corresponding to an input image information signal. SOLUTION: A picture element converting circuit 104 performs the conversion of picture element in such manner that a picture element same as an adjacent picture element is inserted as it is. A picture element converting circuit 105 performs the conversion of picture element in such manner that an average value of the adjacent picture elements is inserted. The PC(personal computer) signal and EDTV signal respectively input from the terminals 101, 102, are selected and output by a signal switching circuit 103 corresponding to a PC/TV switching signal input from a terminal 107. An input signal identifying circuit 106 identifies an input signal on the basis of the horizontal synchronizing frequency and vertical synchronizing frequency of the input signal. The picture element converting circuits 104, 105 perform the conversion (enlargement) of the picture element in accordance with the conversion mode respectively determined corresponding to the number of picture elements of a display unit 109, on the basis of the result of the identification of the input signal identifying circuit 106.

10. 发明专利

JPH03245678A HORIZONTAL DEFLECTION CIRCUIT 失效
公开(公告)号：JPH03245678A
公开(公告)日：1991-11-01
申请号：JP4103790
申请日：1990-02-23
申请人： HITACHI LTD , HITACHI VIDEO ENG
发明人： SUDO KOICHI , MATSUZAKI MASANORI
IPC分类号： H04N3/16 , H04N3/23
摘要： PURPOSE:To attain the changeover with low loss and without any rush current by providing a means clamping a minimum value of a terminal voltage of a switch element to 0V and controlling the switch element so that the ON/OFF transition of the switch element is implemented synchronously with the timing of reaching 0V. CONSTITUTION:In the presence of a diode 9 and a resistor 10, a minimum voltage applied to a switch element 8 is clamped to nearly 0V when the switch element 8 is turned on. When the switch element 8 is turned on at a time in the middle of the blanking period when the voltage applied to the switch element 8 reaches nearly 0V, flowing of a rush current to the switch element 8 is prevented.

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