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1. 发明专利

JPH07297644A FREQUENCY CONVERSION CIRCUIT 失效
公开(公告)号：JPH07297644A
公开(公告)日：1995-11-10
申请号：JP8875194
申请日：1994-04-26
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： KURIHARA TAKASHI , ARAI IZUMI , KURABAYASHI NAOKI , YAMAMOTO MOROHISA , FURUHATA MAKOTO
IPC分类号： H04N9/83 , H03C1/54
摘要： PURPOSE:To extremely reduce the leakage frequency component without preventing the construction of a semiconductor integrated circuit and its cost reduction. CONSTITUTION:When the input frequency f1 is converted into f2+ or -f1 by the conversion frequency f2, an input signal is divided into a positive phase one and a negative phase one/and transmitted by the use of two-transmission circuits. These two transmission outputs are alternately switched and connected to an output terminal synchronously with the frequency f2. At the same time, the connection is alternately switched synchronously with the frequency f2 between two bias circuits which sets the output bias levels of two transmission circuits respectively and these transmission circuits. Therefore the voltage set by the same bias circuit always emerges at each output terminal regardless of the conversion signal. Then the influence due to the variability caused between both bias circuits can be eliminated.

2. 发明专利

JPH04123593A VIDEO SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPH04123593A
公开(公告)日：1992-04-23
申请号：JP24241490
申请日：1990-09-14
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： KUNIMORI YOSHIHIKO , OTSUKA SUSUMU , YAMAMOTO MOROHISA
IPC分类号： H04N9/87 , H04N9/64
摘要： PURPOSE:To prevent color drooping at a vertical edge by providing a switch circuit switching an input chroma signal and a signal resulting from processing the input chroma signal by a comb-line filter and using an output signal of an OR circuit so as to apply changeover control of the switch circuit. CONSTITUTION:A C non-correlation detection signal 1 is inputted to an OR circuit 180 to obtain OR with a Y non-correlation detection signal H'. When the detection of a vertical edge is not detected by the Y non-correlation detection signal H', An (n+2)th and (n+5)th line of an output signal J of the OR circuit 180 go to a Hi level as the vertical edge. Then only when an OR control signal J is at a Hi level, the switch 40 is switched via a switch 60 of a post- stage so that an input chroma signal C from an input terminal 200 is outputted to an output terminal 220. As a result, color drooping in the chroma signal outputted from the output terminal 220 is prevented. Thus, since either the C correlation signal or the Y correlation is in use, the color drooping is surely prevented.

3. 发明专利

JPH0491594A SIGNAL PROCESSING CIRCUIT FOR VTR AND FREQUENCY SUBTRACTION CIRCUIT 失效
公开(公告)号：JPH0491594A
公开(公告)日：1992-03-25
申请号：JP20881790
申请日：1990-08-06
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YAMAMOTO MOROHISA , FURUHATA MAKOTO
IPC分类号： H04N9/84 , G11B20/02 , H03L7/06
摘要： PURPOSE:To prevent the occurrence of a higher harmonic by forming a frequency signal having a horizontal synchronizing frequency of 535/2X by means of a frequency division circuit and four-phase signals having phase lags of 90 deg. against each other from the frequency signal. CONSTITUTION:A carrier signal fC having a frequency of 535 fH/2 is formed by dividing the frequency of the output signal of a VCO to 1/2 by means of a frequency division circuit. By using a through latch circuit having an ECL constitution as the frequency division circuit, four-phase signals having phase lags of 90 deg. against each other are formed simultaneously with the frequency dividing operations. Of the four kinds of carrier signals (535 fH/2 4.21 MHz), to which the frequency dividing and phase shifting operations are performed in such way, one signal is selected and inputted to a frequency conversion circuit by means of a switch circuit, the switching operation of which is controlled by means of a head switching signal and horizontal synchronizing signal.

4. 发明专利

JPH01243708A SIGNAL SUPPRESSING CIRCUIT 失效
公开(公告)号：JPH01243708A
公开(公告)日：1989-09-28
申请号：JP6954488
申请日：1988-03-25
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YAMAMOTO MOROHISA
IPC分类号： H04N9/83 , H03C1/54
摘要： PURPOSE:To automatically suppress a leaking carrier by providing a means to negative-feedback-control the balancing condition of a balance modulating circuit in a direction in which the level of the leaking carrier included in the output signal of the balance modulating circuit may be a minimum. CONSTITUTION:A signal suppressing circuit is composed of a carrier detecting means 20 to detect the level of the leaking carrier appearing at output terminals 7 and 8 of a balance modulating circuit 10 and a control means 30 to negative- feedback-control the balancing condition of the circuit 10 in a direction in which the detected level of the means 20 is decreased. The leaking carrier appearing at the terminals 7 and 8 of the circuit 10 is inputted to a synchronization detecting circuit 21, it is biased by a reference voltage VR, and then, it is inputted to a switching circuit part 22. The carriers are inputted from synchronization input terminals 5 and 6, they switch the circuit part 22, and output the signal according to the leaking carrier to the control part 30. The control circuit 30 amplifies the difference between the level of the direct current component of the inputted signal and the direct current reference level, and by adding the amplified output to the output side of a front end amplifying circuit 11 of the circuit 10 the balancing condition of the circuit 10 is controlled.

5. 发明专利

JPS62194789A PHASE DETECTION CIRCUIT 失效
公开(公告)号：JPS62194789A
公开(公告)日：1987-08-27
申请号：JP3517486
申请日：1986-02-21
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： YAMAMOTO MOROHISA
IPC分类号： H04N9/45 , H03D3/22
摘要： PURPOSE:To decrease the power supply voltage required to drive transistors (TRs) by connecting 4 TRs between a couple of power supplies so as to constitute a phase detection circuit. CONSTITUTION:A sub carrier signal fSC is fed to each base of TRs Q31, Q32 and Q33, Q34 connected as differential pairs. TRs Q41-Q44 and resistors R41-R44 are loads in common to each differential pair. The TRs Q31-Q34 apply switching operation in response to the signal fSC and a combined output current flows to the load circuit. Since four TRs are connected between a pair of power supplies VCC and GND, the voltage required to drive the four TRs is 3.2V in the worst case. Thus, even if the voltage VCC is nearly 5V, the detection output with a sufficient amplitude is obtained.

6. 发明专利

JPS61237511A INTERFACE CIRCUIT 失效
公开(公告)号：JPS61237511A
公开(公告)日：1986-10-22
申请号：JP7836785
申请日：1985-04-15
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： TAKAGISHI HIROAKI , YAMAMOTO MOROHISA
IPC分类号： H03K19/091 , H03K5/08
摘要： PURPOSE:To attain sure circuit operation by using two transistors (TRs) operated with a specific voltage level as a reference level so as to obtain an output signal subject to waveform shaping thereby using an existing semiconductor integrated circuit for multi-purpose. CONSTITUTION:A TR Q1 turned on when an input signal goes to a high level while using a power supply as the reference voltage and a TR Q2 turned on when the input signal goes to a low level while using a common level as the reference voltage are provided. Thus, the existing semiconductor integrated circuit is driven accurately by obtaining the output signal subject to waveform shaping from an output terminal formed by using each collector of the TRs Q1, Q2 connected in common while using each reference voltage as the threshold level.

7. 发明专利

JPS57173291A RECORDING AND REPRODUCING DEVICE FOR TV SIGNAL OF PAL SYSTEM 失效
公开(公告)号：JPS57173291A
公开(公告)日：1982-10-25
申请号：JP5856481
申请日：1981-04-20
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA HIMIO , KUDOU MITSURU , FURUHATA MAKOTO , YAMAMOTO MOROHISA
IPC分类号： H04N9/84 , H04N9/83
摘要： PURPOSE:To obtain an accurate fH/8 offset by generating a signal of (fSC+ 40fH+fH/8) by using a signal of (40fH+fH/8) and a signal of fSC during recoding and reproduction of a PAL system signal. CONSTITUTION:A chromaticity signal is inputted from a switch 3, a horizontal synchronizing signal from a terminal 13, and a head switch pulse from a terminal 27. A frequency dividing circuit 34 divides the frequency of the horizontal synchronizing signal by 321, and a VCO35 oscillates at 321fH. A frequency dividing circuit 36 divides the output frequency of the VCO35 by two to supply a signal of 160fH+fH/2 to a frequency dividing circuit 16, which outputs an accurate 40fH+fH/8 signal. A VXO22 compares the phase of a burst signal from a switch 21 with that of a PD23 to oscillate at fSC. Consequently, the output of the VXO22 and that of a four-phase shifting circuit 18 are multiplied mutually by a multiplying circuit 19 to obtain an accurate offset of fSC+40fH+fH/8 from a BPF20.

8. 发明专利

JPS57173289A DISCRIMINATING CIRCUIT FOR SECAM SIGNAL 失效
公开(公告)号：JPS57173289A
公开(公告)日：1982-10-25
申请号：JP5856681
申请日：1981-04-20
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： NAKAGAWA HIMIO , YAMAMOTO AKIHIRO , FURUHATA MAKOTO , YAMAMOTO MOROHISA
IPC分类号： H04N9/00 , H04N9/47 , H04N11/18 , H04N9/40
摘要： PURPOSE:To eliminate the need for precise adjustment and to stabilize operation by multiplying a continuous wave oscillating in vicinity of one frequency of the burst signal, by an input color signal, and reducing and converting a burst signal. CONSTITUTION:A color signal inputted from an input terminal 1 is supplied to a burst gate circuit 4, where only a burst signal is separated by burst gate pulses inputted from an input terminal 2. This burst signal is multiplied at a multiplying circuit 9 by a continuous wave which is inputted from an input terminal 11 and has, e.g. a 4336MHz single frequency. Through this multiplication, the R-Y signal component of an SECAM signal is band-converted into an about 30kHz signal, and the B-Y signal component into an about 180kHz signal. Those outputs are separated by a frequency selecting circuit 10 into the B-Y and R-Y signals, which are passed through a detecting circuit 6, a frequency selecting circuit 7 having the center at fH/2 (about 7.8kHz), and a rectifying circuit 8, so that a discrimination output appears at a terminal 3.

9. 发明专利

JPS61152111A PRE-EMPHASIS CIRCUIT 失效
公开(公告)号：JPS61152111A
公开(公告)日：1986-07-10
申请号：JP27310384
申请日：1984-12-26
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： MASUBUCHI SHINICHI , YAMAMOTO MOROHISA , MORI TAKAYUKI
IPC分类号： H04B1/62 , G11B5/027 , G11B20/06 , H03G7/00
摘要： PURPOSE:To make a circuit suitable to an integrated circuit formation with simple circuit constitution by operating in following a limiter action characteristic, and comparing the output signal of the 1st amplifier circuit which is provided with a required frequency characteristic with its input signal so as to obtain a subtraction output. CONSTITUTION:In the amplifier circuit 1, transistors TRs Q1 and Q2 are connected to a differential pair, and the AC component of the input signal Vin is amplified. When the signal Vin is amplified and the output signal V0 can be obtained from some terminal of the emitter resistance R8 of a transistor TRQ5, an limiter action is carried out in the condition where a current i1 for flowing resistances R12 and R6 comes to i1(R12+R6)>0.7V. Accordingly when the output signal V0 is amplitude-limited when the input signal Vin exceeds the prescribed voltage level. The signal V0 is transmitted to transistors TRs Q6 and Q7 of the amplifier circuit 2 to obtain the subtraction output V2 from the difference of respective base voltages, and the output V2 is amplified by an adder circuit 3. Thus the pre-emphasis corresponding to the input signal Vin can be executed.

10. 发明专利

JPS58166817A VARIABLE GAIN AMPLIFIER 失效
公开(公告)号：JPS58166817A
公开(公告)日：1983-10-03
申请号：JP4888982
申请日：1982-03-29
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YAMAMOTO MOROHISA
IPC分类号： H03G3/10 , H03G1/00
摘要： PURPOSE:To prevent an effect of noises for a variable gain amplifier which is used to an electronic device, by obtaining an output current which flows in response to the polarity of an input signal. CONSTITUTION:A transistor (TR) Q11 is turned on and works when an input signal Vin has positive polarity. Then a current IC1 flows to a TRQ17 at the input side of a current mirror circuit B. Thus the current IC1 flows also to a TRQ18 of the output side. While the base voltage of a TRQ12 is lowered by the signal Vin, and therefore an output current Iout corresponds to the signal Vin. When the signal Vin has negative polarity, the base voltage of the TRQ11 is lowered by the signal Vin. Then the current Iout becomes to correspond to the signal Vin. As a result, the level of DC voltage causes no change and receives no effect of noises to increase its open gain.

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