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1. 发明专利

JPS61152111A PRE-EMPHASIS CIRCUIT 失效
公开(公告)号：JPS61152111A
公开(公告)日：1986-07-10
申请号：JP27310384
申请日：1984-12-26
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： MASUBUCHI SHINICHI , YAMAMOTO MOROHISA , MORI TAKAYUKI
IPC分类号： H04B1/62 , G11B5/027 , G11B20/06 , H03G7/00
摘要： PURPOSE:To make a circuit suitable to an integrated circuit formation with simple circuit constitution by operating in following a limiter action characteristic, and comparing the output signal of the 1st amplifier circuit which is provided with a required frequency characteristic with its input signal so as to obtain a subtraction output. CONSTITUTION:In the amplifier circuit 1, transistors TRs Q1 and Q2 are connected to a differential pair, and the AC component of the input signal Vin is amplified. When the signal Vin is amplified and the output signal V0 can be obtained from some terminal of the emitter resistance R8 of a transistor TRQ5, an limiter action is carried out in the condition where a current i1 for flowing resistances R12 and R6 comes to i1(R12+R6)>0.7V. Accordingly when the output signal V0 is amplitude-limited when the input signal Vin exceeds the prescribed voltage level. The signal V0 is transmitted to transistors TRs Q6 and Q7 of the amplifier circuit 2 to obtain the subtraction output V2 from the difference of respective base voltages, and the output V2 is amplified by an adder circuit 3. Thus the pre-emphasis corresponding to the input signal Vin can be executed.

2. 发明专利

JPS6448592A CR CONSTANT CONTROL CIRCUIT 失效
公开(公告)号：JPS6448592A
公开(公告)日：1989-02-23
申请号：JP20406987
申请日：1987-08-19
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： YAMAMOTO MOROHISA , KURIHARA TAKASHI , MORI TAKAYUKI
IPC分类号： H04N9/83 , H03L7/08 , H03L7/093
摘要： PURPOSE:To control the CR constant in a CR constant circuit to have a desired value by providing comparatively simple circuits such as a reference frequency oscillation circuit, a phase synthesis circuit and a level detection circuit to a CR constant circuit desired to be control. CONSTITUTION:The CR constant circuit comprising a resistor R3 and a variable capacitive element C3 is provided, which receives a reference frequency signal and forms the 1st signal having a different phase by 45 deg. and whose level is set to 2 of the reference frequency signal. 2nd and 3rd signals according to the voltage generated across the resistor R3 and the element C3 are formed by the phase synthesis circuit from the reference frequency signal and the 1st signal, they are level-detected and a control voltage making the both equal is generated from the difference to control the element C3. Thus, it is possible to supply a desired constant to the CR constant by having only to add comparatively simple circuits such as a reference frequency oscillation circuit, phase synthesis circuit and a level detection circuit.

3. 发明专利

JPS6221307A FREQUENCY-VOLTAGE CONVERSION CIRCUIT 失效
公开(公告)号：JPS6221307A
公开(公告)日：1987-01-29
申请号：JP16025685
申请日：1985-07-22
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： YAMASHIYA KATSUYOSHI , MORI TAKAYUKI , YAMAMOTO MOROHISA
IPC分类号： H03D3/00
摘要： PURPOSE:To simplify the circuit constitution by applying two pulse output signals obtained by charge/discharge of a capacitor to an adder circuit so as to obtain a consecutive output signal. CONSTITUTION:Output voltages VCQ3, VCQ4 of a pulse generator 2 are fed to bases of transistors (TR) Q13, Q14 constituting the adder circuit 4. Emitters of the TRs Q13, Q14 connect to a common load resistor R6, the TR Q13 is turned on when an output signal V0 being a consecutive signal obtained by the resistor R6 and a constant current circuit 6 is at a high level and an output voltage VA with inverted phase is obtained by a voltage drop across a resistor R7. The output voltage VA is fed to a low-pass filter 11, the final output signal Vout becomes an analog signal whose level is changed corresponding to the density of an input signal Vin and a demodulated output signal is obtained. Thus, the circuit constitution is simplified.

4. 发明专利

JPS60109973A SYNCHRONIZING SIGNAL SEPARATING CIRCUIT 失效
公开(公告)号：JPS60109973A
公开(公告)日：1985-06-15
申请号：JP21631483
申请日：1983-11-18
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： YAMAMOTO MOROHISA , MURAYAMA AKIHIKO , MORI TAKAYUKI , ARAI IZUMI , FURUHATA MAKOTO
IPC分类号： H04N5/10
摘要： PURPOSE:To decrease externally mounted components and to decrease the production cost by obtaining digitally a horizontal/vertical synchronizing pulse from a composite synchronizing signal in a television receiver or the like. CONSTITUTION:A signal VM in synchronizing with the leading of the horizontal synchronizing signal and having a time width within a period of the horizontal synchronizing signal is obtained from the signal included in the composite synchronizing signal VA. This signal VM is compared with a reference voltage Vref so as to obtain a pulse signal Vc corresponding to the cross position with the reference voltage Vref. The horizontal synchronizing pulse VH and the vertical synchronizing pulse VV are separated digitally by using the signal Vc and the composite synchronizing signal VM.

5. 发明专利

JPS6290085A INTEGRATED CIRCUIT FOR PROCESSING VIDEO SIGNAL 失效
公开(公告)号：JPS6290085A
公开(公告)日：1987-04-24
申请号：JP22871585
申请日：1985-10-16
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： OKADA YOSHINORI , MITSUHAYASHI SHIYUNSUKE , YAMAMOTO MOROHISA , MORI TAKAYUKI
IPC分类号： H04N5/16
摘要： PURPOSE:To eliminate waveform distortion in a video signal synchronizing part by inputting a signal obtained by clamping the sync chip voltage of an input video signal into some reference voltage to the 1st differential amplifier, further inputting it to the 2nd differential amplifier after it is DC-shifted and adding it to the outputs of both differential amplifiers. CONSTITUTION:The 1st amplifier sets resistances 29 and 30 and constant current sources 31 and 32 in order to amplify the input video signal without distortion, and turns out to be an amplifier with a wide dynamic range. Accordingly the 1st amplifier can obtain a waveform signal the same as an input waveform 23 in terms of its output current signal, as a waveform (c) shows. Since both inputs have waveforms as shown by waveforms 28 and 33 in the waveform (b) in the amplifier 19 whose dynamic range is narrow, the output current of the amplifier 19 can be switched between a sync chip level and a pedestal level, and turns out to be a waveform as a waveform (e) shows. The output current signals of both amplifiers are mixed by the resistance 30 to become a waveform as a waveform (e) shows, thereby obtaining an excellent video signal (f) without sync reduction.

6. 发明专利

JPS6223690A SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS6223690A
公开(公告)日：1987-01-31
申请号：JP16194285
申请日：1985-07-24
申请人： HITACHI MICROCUMPUTER ENG , HITACHI LTD
发明人： YAMASHIYA KATSUYOSHI , MORI TAKAYUKI , YAMAMOTO MOROHISA
IPC分类号： H04N5/93 , H04N5/04
摘要： PURPOSE:To form a signal processing circuit applying expansion of synchronizing signal integrally with other circuit in an IC by allowing an input circuit to amplify a video signal by a common amplifier, amplifying a horizontal synchronizing signal by other amplifier and synthesizing both the signals. CONSTITUTION:An amplifier 21 comprising transistors (TRs) Q1, Q2 amplifies a horizontal synchronizing signal VS. An amplifier 22 comprising TRs Q3, Q4 amplifies a video signal VV. When an input signal Vin is applied, since a base voltage of the TR Q4 is brought into a higher level than the base voltage of the other TRs Q1-Q3, the voltage over the pedestal level, in other words, the video signal VV is amplified by the amplifier 22. Then the voltage below the pedestal level, in other words, the horizontal synchronizing signal VS is amplified by the amplifier 21. In bringing the gain of the amplifier 21 to a high gain, an output signal Vout expanding the horizontal synchronizing signal VS is obtained.

7. 发明专利

JPS58164004A INTEGRATED SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS58164004A
公开(公告)日：1983-09-28
申请号：JP4455282
申请日：1982-03-23
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： OKADA YOSHINORI , NAKAGAWA HIMIO , FURUHATA MAKOTO , MORI TAKAYUKI
IPC分类号： G11B20/02 , G11B20/24
摘要： PURPOSE:To eliminate bad influence exerted on an input signal of a load circuit, by connecting the load circuit whose freqnecy charactersitics are different, to each transistor output of a differential amplifier, and also providing a transistor (TR) between the collector and a load of a TR of a signal input side. CONSTITUTION:At the time of picture recording, a color video signal from an input terminal 57 is supplied to an AGC circuit 19, and is impressed to an LPF 21 from an IC external terminal 20 through a TR 58 from the collector of a TR 2. The collector of the TR 58 is grounded like AC by the base-collector floating capacity, influence of the LPF 21 is absorbed by the TR 58, and does not appear in the base side of the TR 2, therefore, influence of the LPF 21 is not exerted on a monitor output of a transistor 3. At the time of reproduction, a demodulating circuit 27 operates and the AGC circuit 19 does not operated, but a signal leaks by the base-collector floating capacity of the TR 2, but it flows into the ground terminal by the base-emitter floating capacity of the TR 58, and does not appear in the external terminal 20.

8. 发明专利

JPS58111587A AUTOMATIC GAIN CONTROLLING CIRCUIT 失效
公开(公告)号：JPS58111587A
公开(公告)日：1983-07-02
申请号：JP20939481
申请日：1981-12-25
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： OKADA YOSHINORI , NAKAGAWA HIMIO , FURUHATA MAKOTO , MORI TAKAYUKI
IPC分类号： H04N5/53 , H04N5/52 , H04N5/91
摘要： PURPOSE:To attain excellent AGC performance independently of waveform distortion of a video signal, by controlling a discharge circuit with a peak detection output of a synchronizing signal and outputting a key pulse for automatic gain control based on the output of a discharge circuit. CONSTITUTION:A synchronizing signal is obtained via a variable gain circuit 5 and a synchronizing signal separation circuit 6 and applied to a peak detection circuit 1. The circuit 1 and a minute constant current discharge circuit 2 sample a peak potential of the synchronizing signal and a discharge drop is produced at the non-sampling period. The output is compared with a reference potential at comparators 11 and 13, logical product is taken at an AND circuit 14 to obtain a pulse not including the front edge of the back porch of the video signal. The pulse is applied to a detected signal generating circuit 8 as the key pulse.

9. 发明专利

JPS58111104A VIDEO SIGNAL PROCESSING CIRCUIT 失效
公开(公告)号：JPS58111104A
公开(公告)日：1983-07-02
申请号：JP20939681
申请日：1981-12-25
申请人： HITACHI LTD , HITACHI MICROCUMPUTER ENG
发明人： OKADA YOSHINORI , NAKAGAWA HIMIO , FURUHATA MAKOTO , MORI TAKAYUKI
IPC分类号： G11B20/02
摘要： PURPOSE:To obtain constantly recording luminance signals and monitoring video signals having constant amplitude without the generation of wave form distortion due to mismatching by externally connecting a matching resistor for LPF. CONSTITUTION:A constant gain amplifier 16' is a base connection type amplifier consisting of a transistor (TR)36, a resistor 37, a constant current source 38 and a reference voltage source 39. An inputted video signal is supplied to a pin 31 as a monitoring video signal through a resistor 6 connected to the collector of a TR2 and a constant gain amplifier 25. On the other hand, a load impedance consisting of external resistors 27, 28 and a chrominance signal removing low-pass filter 29 is connected to the collector of a TR3 and a luminance signal sent from a pin 34 is applied to a pin 35 as a recording luminance signal through the amplifier 16'.

10. 发明专利

JPH11261976A RECEIVER CAPABLE OF DISPLAYING PROGRAM INFORMATION 失效
公开(公告)号：JPH11261976A
公开(公告)日：1999-09-24
申请号：JP6246298
申请日：1998-03-13
申请人： HITACHI LTD , HITACHI VIDEO & INF SYST
发明人： FURUI MAKI , MORI TAKAYUKI , TAKESUE JUNICHI , NAKAGAKI NOBUFUMI , HARATANI ATSUSHI
IPC分类号： H04N7/025 , H04H20/00 , H04H60/37 , H04H60/72 , H04N5/445 , H04N7/03 , H04N7/035 , H04H1/00
摘要： PROBLEM TO BE SOLVED: To easily and accurately recognize the broadcasting condition of a desired program by extracting a character code related to a specified character code from program information and displaying a character corresponding to the character code in the prescribed area of a program chart. SOLUTION: A data extraction part 109 extracts program information from data information outputted from a signal separation part 102, decodes it and outputs it to a data storage part 110. The data storage part 110 stores the program information, and a display data preparation part 111 prepares and outputs an image data of the program chart based on outputted program guide information. At this time, the display data preparation part 111 refers to the dictionary of the character code stored in a memory 114 and converts the character code included in the program information to a display data of the character corresponding to it. Then, the image date of the program chart outputted from the display data preparation part 111 are inputted to an image synthesis part 106. Images outputted from the image synthesis part 106 are displayed on a display part.

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