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1. 发明专利

JPH0629856A OVERSAMPLING MODE AD CONVERTER 失效
公开(公告)号：JPH0629856A
公开(公告)日：1994-02-04
申请号：JP18091392
申请日：1992-07-08
申请人： HITACHI LTD
发明人： OTSUKA MASANORI , KIKUCHI TAKAFUMI , HOTTA MASAO , HATANO YUJI
IPC分类号： H03M3/02
摘要： PURPOSE:To obtain the highest conversion accuracy only when it is necessary and to save extra electric power on the other occasions by constituting a clock frequency to be supplied to be changed according to required minimum A/D conversion accuracy. CONSTITUTION:A processor for control 106 performs a judgment based on control information 107 and it lowers a sampling frequency clock 110 when it judges that the reduction of conversion accuracy is possible. The processor controlls each block of a subtracter 101, an analog integrator 102, a comparator 103, a digital integrator 105 and an internal DA converter 104, using a control signal 109 and lowers conversion accuracy. Therefore, the highest conversion accuracy can be obtained only when it is necessary and extra electric power can be saved on the other occasions.

2. 发明专利

JP2003078415A Ad converter 有权
标题翻译： AD转换器
公开(公告)号：JP2003078415A
公开(公告)日：2003-03-14
申请号：JP2001261111
申请日：2001-08-30
申请人： Hitachi Ltd , Hitachi Ulsi Systems Co Ltd , 株式会社日立製作所 , 株式会社日立超エル・エス・アイ・システムズ
发明人： OTSUKA MASANORI , YAMAKIDO KAZUO , YAMAMOTO ETSUJI , SANO SHINYA
IPC分类号： H03M1/36
CPC分类号： H03M1/363
摘要： PROBLEM TO BE SOLVED: To provide an AD converter which does not need a buffer for an input signal or relieves a requirement specification such as an input signal range and an output impedance to a buffer. SOLUTION: A plurality of voltage comparators compare voltage of each connection point of a resistance ladder configured by serially connecting a plurality of resistive elements with a reference voltage, a high potential side of the resistance ladder is provided with a sweep-out type constant current circuit and a low potential side is provided with an attraction type constant current circuit respectively, and an input terminal is provided at an optional place other than both ends of the resistance ladder to supply an analog input voltage.
摘要翻译：要解决的问题：提供不需要用于输入信号的缓冲器的AD转换器，或者缓解对缓冲器的输入信号范围和输出阻抗的要求规范。解决方案：多个电压比较器比较通过串联连接多个电阻元件与参考电压构成的电阻梯的每个连接点的电压，电阻梯的高电位侧设置有扫除型恒流电路并且低电位侧分别设置有吸引型恒流电路，并且输入端子设置在电阻梯的两端以外的可选位置以提供模拟输入电压。

3. 发明专利

JPH0982959A METHOD AND SYSTEM OF DESIGNING CURRENT CELL CIRCUIT AND CURRENT CELL CIRCUIT AND DIGITAL/DIGITAL CONVERTER AND ANALOG/DIGITAL CONVERTER 失效
公开(公告)号：JPH0982959A
公开(公告)日：1997-03-28
申请号：JP23951595
申请日：1995-09-19
申请人： HITACHI LTD
发明人： OTSUKA MASANORI , ICHIKI SHUZO
IPC分类号： H01L21/822 , G06F17/50 , H01L21/82 , H01L27/04 , H01L29/78 , H03K19/173
摘要： PROBLEM TO BE SOLVED: To improve accuracy by a method wherein an error is distributed temporarily while keeping the target accuracy of the whole in an error factor, the determination of the value of gate width W and the value of gate length L is repeated so as to reduce distributed values and a function using the distributed values as parameters is obtained when threshold voltage, gate width W and gate length L are dispersed. SOLUTION: Each requirement constant is prepared at a step S314, and an error distribution KVth is determined at a step S302. The maximum value of an aspect ratio is obtained at a step S303. On the other hand, an error distribution Kβ is acquired at a step S304, an error KL to ΔL is distributed temporarily at a step S305, W and L are obtained and KL is updated, and the graphs of W and L using KL as a parameter are prepared at a step S308. W and L are inscribed in consideration of Ar-max at a step S309 from outputs from the steps S303 and S308, a minimum gate area W×L is acquired and KVth is updated. The operation is repeated, the graph of an area using the error distribution as the parameter is prepared, and the gate area W×L is minimized.

4. 发明专利

JPH0730596A DIGITAL RADIO COMMUNICATION EQUIPMENT AND ITS OFFSET CORRECTION METHOD 失效
公开(公告)号：JPH0730596A
公开(公告)日：1995-01-31
申请号：JP16765793
申请日：1993-07-07
申请人： HITACHI LTD
发明人： OTSUKA MASANORI , KOKUBO MASARU , HOTTA MASAO
IPC分类号： H03H11/12 , H03M1/10 , H04L27/20
摘要： PURPOSE:To attain automatic offset correction with high accuracy repeating the operation of correcting a differential offset in the negative direction when the offset detected by a voltage comparator is positive and in the positive direction when the offset detected by the voltage comparator is negative in the non-transmission so as to reduce the differential offset. CONSTITUTION:A differential offset is detected in the non-transmission state in the usual operation mode, generated correction data are added to input transmission data and the sum is inputted to a D/A converter 206, in which the data are converted into analog data, which are inputted to an orthogonal modulator 213. In the correction data generating mode, a sum of 1-all 0 signal and correction data is inputted as an input of the converter 206 so that a noninverting output and an inverting output are identical to each other and the output in the buffer 208 is detected by a voltage comparator 209. When the offset is positive, correction data are reduced by one step and when negative conversely, the correction data are increased by one step. The operation above is repeated till the offset reaches a detection limit of the comparator to generate correction data.

5. 发明专利

JPH0669853A MOBILE RADIO COMMUNICATION TERMINAL AND CORDLESS TELEPHONE 失效
公开(公告)号：JPH0669853A
公开(公告)日：1994-03-11
申请号：JP21891792
申请日：1992-08-18
申请人： HITACHI LTD
发明人： KIKUCHI TAKAFUMI , HATANO YUJI , SEKI KOICHI , OTSUKA MASANORI , HOTTA MASAO
IPC分类号： H04B7/26
摘要： PURPOSE:To operate the mobile radio communication terminal or cordless telephone equipment in an operation mode selected by a user when a power supply voltage is lowered at the hand set. CONSTITUTION:This mobile radio communication terminal is provided with a voltage monitor circuit 13 at a power source part 12 and an operation mode setting device 14 corresponding to a high frequency signal processing part 3 and a base band signal processing part 4. When a power save operation mode is set and voltage drop is detected by the power source monitor means 13, the power consumption of the signal processing parts 3 and 4 is reduced, and time for using a battery is extended. Further, it is informed of the user by being displayed at an input/output/display part 10. Thus, the method of use can be previously set corresponding to the will of the user at the time of consuming the battery, and the communication terminal can be suitably used corresponding to environments.

6. 发明专利

JPH1041396A LAYOUT METHOD FOR SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1041396A
公开(公告)日：1998-02-13
申请号：JP19729296
申请日：1996-07-26
申请人： HITACHI LTD
发明人： SENBA SEIJI , YOKOMIZO KOICHI , ICHIKI SHUZO , KITAGAWA AKIHIRO , OTSUKA MASANORI , TSUKADA TOSHIRO
IPC分类号： H01L21/822 , G06F17/50 , H01L21/82 , H01L27/04
摘要： PROBLEM TO BE SOLVED: To minimize the correcting points of a mask layout after the optical shrink, if it must be corrected to expand individual devices by forming spare regions of specified area round the devices. SOLUTION: A spare region 9 of an area 1 to 3 times the area of a corresponding device 7 is provided round the device 7 which gives importance on the matching accuracy in the mask layout at the time of a new design. A spare region 9 of e.g. the same area as that of the device 7 is formed at the left of the device 7 to be a voltage divider resistor which gives importance on the matching accuracy. This results in that the correcting point required for expansion correction of the device which gives importance on the matching accuracy after the optical shrink never has effect on other devices. The increase of the chip area for the spare region is suppressed to min. required for the efficient update of the functional IC library.

7. 发明专利

JPH07193442A OPERATIONAL AMPLIFIER AND D/A CONVERTER AND VOLTAGE COMPARATOR USING IT 失效
公开(公告)号：JPH07193442A
公开(公告)日：1995-07-28
申请号：JP33086493
申请日：1993-12-27
申请人： HITACHI LTD
发明人： OTSUKA MASANORI , NAKAMURA KATSUSHI
IPC分类号： H03K5/08 , H03F1/34 , H03F3/34 , H03F3/45
摘要： PURPOSE:To make the offset correction of an operational amplifier easy and highly accurate by a small circuit scale and to make applied D/A converter and voltage comparator small with high performance. CONSTITUTION:In an operational amplifier having a differential amplifier circuit 11 and an input stage composed of a transistor load, and further having a differential amplifier circuit 12 for correction as a trimmer circuit for the adjustment of offset, a source resistor insertion type (source degeneration) is adopted for the differential amplifier circuit 12 for correction for improving the accuracy and facilitation of a correction. By enabling the control of the value of this resistor 13 from the outside and selecting the resistance value corresponding to an offset value, controllability is varied. For instance, the correction is performed for small offset easily and with high accuracy and the correction is performed for large offset without requiring large control voltage.

8. 发明专利

JPH06303137A D/A CONVERTER, OFFSET ADJUSTMENT CIRCUIT AND PORTABLE COMMUNICATION TERMINAL EQUIPMENT USING THEM 失效
公开(公告)号：JPH06303137A
公开(公告)日：1994-10-28
申请号：JP28551493
申请日：1993-10-21
申请人： HITACHI LTD
发明人： YAMAKIDO KAZUO , OKAZAKI TAKAO , TANBA HIROKO , ISHIHARA HAYATO , KOBAYASHI YOICHIRO , NISHIKAWA NORIMITSU , OTSUKA MASANORI
IPC分类号： H03M1/10 , H03M1/68 , H03M1/74 , H04B1/40
摘要： PURPOSE:To realize the D/A converter of current drive type with high accuracy in which a required layout area power consumption are reduced and to obtain a circuit which is able to adjust an output offset of an electronic circuit having plural analog signal outputs relatively with high accuracy. CONSTITUTION:Plural unit D/A converters UDA1, UDA2 using a same reference current and receiving a digital signal in a predetermined bit being plural divisions of an input digital signal respectively convert the digital signal into an analog current and the analog current is converted into a current corresponding to the weight of a corresponding input digital signal and the resulting currents are synthesized. Then a fixed digital signal corresponding to a reference Dc signal in a signal subjected to offset cancellation is received by the D/A converter. After the offset of plural noninverting and inverting analog output signals obtained by branching the output of the D/A converter are respectively detected, an offset adjustment negative feedback signal to set a DC offset of each analog output to be a desired value is obtained.

9. 发明专利

JPH0613959A METHOD FOR ELECTRIC FIELD STRENGTH DETECTION PROCEDURE CONTROL FOR MOBILE RADIO COMMUNICATION 失效
公开(公告)号：JPH0613959A
公开(公告)日：1994-01-21
申请号：JP16586792
申请日：1992-06-24
申请人： HITACHI LTD
发明人： OTSUKA MASANORI , HATANO YUJI , KIKUCHI TAKAFUMI , MURAKAMI YASUYUKI , HOTTA MASAO
IPC分类号： H04B7/26
摘要： PURPOSE:To reduce the power consumption by decelerating a speed of a trigger clock for setting interval of electric field strength measurement and omitting the measurement of the electric field strength when the electric field strength is remarkably high or its change is small. CONSTITUTION:When the electric field strength absolute value measurement mode is selected by the designation of a control processor 214, the processor 214 discriminates whether or not the electric field strength is at a threshold level or over to calculate a change in the electric field strength or to stop the calculation thereby deciding whether or not the speed of the trigger clock is decreased. When the electric field strength is not so much high, the electric field strength change calculation mode is selected, circuit comprising a register 210 and a subtracter 211 calculates a difference between a current signal and a signal of one preceding sample and the fluctuation in the electric field strength is obtained and it is inputted to the processor 214. When a change in the electric field strength is small, the trigger clock is decelerated. Thus, the frequency of the detection of the electric field strength in a base station for the mobile radio terminal equipment and the measurement of the electric field strength of an adjacent station is reduced.

10. 发明专利

JPH066426A DIGITAL TELEPHONY EQUIPMENT 失效
公开(公告)号：JPH066426A
公开(公告)日：1994-01-14
申请号：JP16454292
申请日：1992-06-23
申请人： HITACHI LTD
发明人： HATANO YUJI , OTSUKA MASANORI , KIKUCHI TAKAFUMI , MURAKAMI YASUYUKI , HOTTA MASAO
IPC分类号： H04M1/00 , H04M1/253
摘要： PURPOSE:To keep speaking even when the sound quality of voice encoding is adverse by feeding a synthetic voice decoding a parameter encoding a speaker voice back to the auditory sensation of a speaker as a sidetone. CONSTITUTION:A source voice input 301 from a microphone is sampled/ quantized by an A/D converter 302 and inputted to a voice encoder 303. The parameter of encoding is selected so as to minimize total weighting error between a synthetic voice p' (n) and an auditory sensation weightened input voice p (n.) At the same time, the synthetic voice p' (n) receives required band limiting through a post filter 304, afterwards, is superimposed to a voice output 311 decoding the received parameter as a sidetone 305 and becomes an input 313 of a speaker by a D/A converter 312. Since the sound quality of the encoded voice can be always grasped, the speaker makes required efforts such as clearly and slowly sounding or exchanging words so as to transmit required meanings naturally with the low sound quality.

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