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    • 3. 发明专利
    • ALIGNING METHOD, ALIGNER AND ALIGNING SYSTEM
    • JPH0777808A
    • 1995-03-20
    • JP22541093
    • 1993-09-10
    • HITACHI LTD
    • YOSHIMOTO MITSUOMIURA SHINYASUGANO KENICHIMATSUYAMA HARUHIKOYAMAZAKI TETSUYAINOUE TAKASHI
    • G03F7/20
    • PURPOSE:To form a highly accurate thin film pattern on a ceramic substrate by calculating the quantity of correcting an aligning focal point based on 1st and 2nd measured values and aligning after setting an aligning focus on a position including the correction quantity. CONSTITUTION:The system is constituted of a flatness measuring machine 1 for measuring a three-dimensional coordinate from a reference point on an optional point of the ceramic and transferring data to an arithmetic processing and storing device 2, an arithmetic processing and storing device 2 for storing the data transmitted from the flatness measuring machine 1 and an aligner 3, executing a calculation processing and transferring the data to the aligner 3 and the aligner 3. By such a constitution, the flatness of a desired point on the substrate is measured, and the 1st measured value is stored, the flatness on a part of the desired point on the substrate in the aligning position is measured so as to obtain the 2nd measured value, then, the quantity of correcting the aligning focal position is calculated based on the 1st and 2nd measured values, the aligning focus is set on the position including the correction quantity, thereafter, the alignment is executed.
    • 6. 发明专利
    • MULTILAYER-INTERCONNECTION BOARD AND ITS MANUFACTURE
    • JPH03276655A
    • 1991-12-06
    • JP7349190
    • 1990-03-26
    • HITACHI LTD
    • MATSUYAMA HARUHIKOYOSHIMOTO MITSUOTANAKA JUNSHOJI FUSAJIYOKONO ATARUINOUE TAKASHIYAMAZAKI TETSUYATANAKA MINORUSHIGI HIDETAKA
    • H05K3/46H01L21/60H01L23/498
    • PURPOSE:To prevent the taper face at the lower part of a through hole in a polyimide film from being undercut by a method wherein metal interconnection layers whose surface is stabilization-treated and organic insulating films are laminated alternately at least on one face of a ceramic substrate and a thin-film circuit layer provided with terminals, for power supply or/and signal input/output use, which are connected to an LSI is formed on the surface layer of the laminated layers. CONSTITUTION:A thick-film mullite substrate 1 is formed; its surface is sputtered and cleaned. After that, an Al interconnection layer 2 is formed; in succession, Cr films to be used as passivity films are formed continuously to form a laminated film, i.e., a stabilization-treated layer 9. A metal interconnection layer 10a is formed; it is connected to circuits on the mullite substrate 1; then, a polyimide insulating film 3a is formed. Then, a metal interconnection layer 10b formed in the same manner as the metal interconnection layer 10a is formed in a contact through-hole 7; a polyimide insulating film 3b is formed on the metal interconnection layer 10b. In addition, this operation is repeated alternately; metal interconnection layers 10c, 10d and polyimide insulating films 3c, 3d are formed. In succession, an Ni-Cu alloy film is formed continuously on the surface of the polyimide insulating film 3d in which the contact through-hole 7 has been formed; it is patterned; after that, Au is plated chemically; a layer for surface terminals 11 is formed.