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1. 发明专利

JP2009057233A Method for evaluating compound semiconductor substrate, method for producing the same, and the compound semiconductor substrate 审中-公开
标题翻译：用于评价化合物半导体基板的方法，其制造方法和化合物半导体基板
公开(公告)号：JP2009057233A
公开(公告)日：2009-03-19
申请号：JP2007225054
申请日：2007-08-31
申请人： Covalent Materials Corp , National Institute For Materials Science , コバレントマテリアル株式会社 , 独立行政法人物質・材料研究機構
发明人： UCHIMARU TOMONORI , KANAI HIDEYUKI , KOMIYAMA JUN , SUZUKI SHUNICHI , NAKANISHI HIDEO , OSADA MINORU
IPC分类号： C30B29/38 , G01N21/65
摘要： PROBLEM TO BE SOLVED: To provide a method for evaluating a compound semiconductor substrate where, for producing a gallium nitride based compound semiconductor substrate of high quality, a fine crystal defect regarding a gallium nitride film can be easily confirmed at high precision using Raman spectroscopy, to provide a method for producing the same, and to provide the compound semiconductor substrate.
SOLUTION: Regarding the compound semiconductor substrate comprising a gallium nitride film, in the Raman spectroscopy spectra of scattered light obtained when the gallium nitride film is irradiated with monochromatic light with the excitation wavelength of 350 to 800 nm, by the appearance of the main peak in the region with the wave number of 565 to 570 cm
-1 and subpeaks caused by a crystal defect with the wave number of 100 to 700 cm
-1 , the presence of a crystal defect in the gallium nitride film is confirmed.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：为了提供一种用于评价化合物半导体衬底的方法，其中为了制造高质量的氮化镓基化合物半导体衬底，可以高精度地容易地确认关于氮化镓膜的微细晶体缺陷拉曼光谱法，以提供其制造方法，并提供化合物半导体衬底。解决方案：关于包含氮化镓膜的化合物半导体衬底，在氮化镓膜用激发波长为350至800nm的单色光照射时获得的散射光的拉曼光谱中，通过外观波数为565〜570cm -1的区域的主峰，由波数为100〜700cm -1的晶体缺陷引起的亚峰，证实在氮化镓膜中存在晶体缺陷。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2009238812A Inspecting method for compound semiconductor substrate 审中-公开
标题翻译：复合半导体衬底的检查方法
公开(公告)号：JP2009238812A
公开(公告)日：2009-10-15
申请号：JP2008079863
申请日：2008-03-26
申请人： Covalent Materials Corp , National Institute For Materials Science , コバレントマテリアル株式会社 , 独立行政法人物質・材料研究機構
发明人： UCHIMARU TOMONORI , KANAI HIDEYUKI , KOMIYAMA JUN , SUZUKI SHUNICHI , OSADA MINORU
IPC分类号： H01L21/66 , H01S5/00
摘要： PROBLEM TO BE SOLVED: To provide an inspecting method for a compound semiconductor substrate, in which quality is evaluated with high precision during inspection on a compound semiconductor substrate having a multilayer structure.
SOLUTION: The inspecting method for the compound semiconductor substrate 10 having a buffer layer and a GaN layer stacked in order on a semiconductor substrate includes a step (S1) of exposing a cross section in the stacking direction of the buffer layer and GaN layer, a step (S2) of irradiating the exposed cross section with laser light and evaluating stress at three points of the buffer layer and GaN layer in the section, and the interface between the buffer layer and GaN layer, and a step (S3) of plotting stress values of the stress at the three points on a coordinate surface showing stress values on its longitudinal axis and measurement positions on its lateral axis, and determining whether the compound semiconductor substrate 10 is good or not based on positions of the three plotted points on the coordinate surface.
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种化合物半导体衬底的检查方法，其中在具有多层结构的化合物半导体衬底的检查期间以高精度评估质量。解决方案：具有在半导体衬底上依次堆叠的缓冲层和GaN层的化合物半导体衬底10的检查方法包括：在缓冲层的层叠方向上暴露横截面的步骤（S1）和GaN 层，步骤（S2），用激光照射暴露的横截面，并评估该截面中的缓冲层和GaN层的三个点以及缓冲层和GaN层之间的界面的应力，以及步骤（S3）绘制在坐标表面上的三个点上的应力的应力值，显示其纵轴上的应力值及其横轴上的测量位置，并且基于三个绘制点的位置来确定化合物半导体衬底10是否良好在坐标面上。版权所有（C）2010，JPO＆INPIT

3. 发明专利

JP2009065025A Compound semiconductor substrate 审中-公开
标题翻译：化合物半导体基板
公开(公告)号：JP2009065025A
公开(公告)日：2009-03-26
申请号：JP2007232632
申请日：2007-09-07
申请人： Covalent Materials Corp , National Institute For Materials Science , コバレントマテリアル株式会社 , 独立行政法人物質・材料研究機構
发明人： KOMIYAMA JUN , SUZUKI SHUNICHI , NAKANISHI HIDEO , UCHIMARU TOMONORI , KANAI HIDEYUKI , OSADA MINORU
IPC分类号： H01L21/20 , C30B29/38 , H01L21/205 , H01L21/338 , H01L29/778 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor substrate having a GaN active layer which is stress free as a whole by finding a simple method for measuring stress using Raman spectroscopy and controlling the stress in a buffer layer based on it.
SOLUTION: On a base substrate 1 composed of any one of hexagonal SiC with a thickness of 100-1,000 μm, single crystal Si or a cubic SiC layer formed on the single crystal Si, a buffer layer 2, and a GaN active layer 3 with a thickness of 0.5-5 μm are laminated sequentially. The buffer layer 2 is constituted of an Al
y Ga
1-y N single crystal layer (0.2≤y≤0.3)2b-1 with a thickness of 3-250 nm formed on an Al
x Ga
1-x N single crystal layer (0.5 x Ga
1-x N single crystal layer 2a-n with a thickness of 3-250 nm and an Al
z Ga
1-z N single crystal layer (0≤z
摘要翻译：要解决的问题：提供一种具有GaN活性层的化合物半导体衬底，其通过使用拉曼光谱法测量应力的简单方法并基于其控制缓冲层中的应力，从而整体上无应力。解决方案：在由任何一种厚度为100-1,000μm的六方晶系SiC构成的基底基板1上，单晶Si或形成在单晶Si上的立方SiC层，缓冲层2和GaN活性物质依次层叠厚度为0.5〜5μm的层3。缓冲层2由厚度为3-250nm的Al Y Ga 1-y / SB> N单晶层（0.2≤y≤0.3）2b-1构成形成在厚度为3-250nm的Al x Ga 1-x N N单晶层（0.5 x Ga 1-x N单晶层2a-n >0≤z<0.5）2c-n，厚度为3-250nm。版权所有（C）2009，JPO＆INPIT

4. 发明专利

JP2009224722A Compound semiconductor board 审中-公开
标题翻译：化合物半导体板
公开(公告)号：JP2009224722A
公开(公告)日：2009-10-01
申请号：JP2008070249
申请日：2008-03-18
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： ABE YOSHIHISA , KOMIYAMA JUN , SUZUKI SHUNICHI , OISHI KOJI , YOSHIDA AKIRA , NAKANISHI HIDEO
IPC分类号： H01L21/205 , H01L21/203 , H01L21/338 , H01L29/778 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor substrate includes an intermediate layer which has electrical insulating properties and proper thermal conductivity.
SOLUTION: The compound semiconductor substrate includes: an Si single crystal substrate 100 having a crystal plane orientation of {111}; the intermediate layer 110, which is formed on the surface of the Si single-crystal substrate 100, and which is structured by alternatively laminating a plurality of first layers 110a, constituted of AlN and second layers 110b constituted of MgO, in order; and a nitride semiconductor single crystal layer 120, which is formed on the intermediate layer 110 and which is constituted of one among GaN (0001), AlN (0001) and InN (0001).
COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：要解决的问题：提供一种化合物半导体衬底，其包括具有电绝缘性和适当导热性的中间层。解决方案：化合物半导体衬底包括：晶体取向为ä111}的Si单晶衬底100; 形成在Si单晶衬底100的表面上的中间层110依次由层叠由AlN构成的多个第一层110a和由MgO构成的第二层110b构成。和形成在中间层110上并由GaN（0001），AlN（0001）和InN（0001）之一构成的氮化物半导体单晶层120。版权所有（C）2010，JPO＆INPIT

5. 发明专利

JP2008184361A METHOD FOR FORMING 3C-SiC SINGLE CRYSTAL FILM 审中-公开
标题翻译：形成3C-SiC单晶膜的方法
公开(公告)号：JP2008184361A
公开(公告)日：2008-08-14
申请号：JP2007019022
申请日：2007-01-30
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： ABE YOSHIHISA , SUZUKI SHUNICHI , KOMIYAMA JUN , YOSHIDA AKIRA , NAKANISHI HIDEO
IPC分类号： C30B29/36 , C23C16/02 , C23C16/42 , C30B25/18 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method for simply forming a high quality 3C-SiC single crystal film flat and free from an anti-phase domain on an Si single crystal substrate.
SOLUTION: The high quality 3C-SiC single crystal film is obtained by epitaxially growing a 3C-SiC single crystal on an Si single crystal substrate whose off angle from (001) plane direction is ≥0.2° and , after an anneal treatment of the Si single crystal substrate in a 100% hydrogen atmosphere.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种在Si单晶衬底上简单地形成平坦且无反相域的高质量3C-SiC单晶膜的方法。解决方案：通过在（001）面方向的偏角≥0.2°和<1°的Si单晶衬底上外延生长3C-SiC单晶并获得高品质3C-SiC单晶膜，在100％氢气氛中对Si单晶衬底进行退火处理之后，关闭方向为<100>。版权所有（C）2008，JPO＆INPIT

6. 发明专利

JP2007266151A Compound semiconductor device 审中-公开
标题翻译：化合物半导体器件
公开(公告)号：JP2007266151A
公开(公告)日：2007-10-11
申请号：JP2006086844
申请日：2006-03-28
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： KOMIYAMA JUN , ABE YOSHIHISA , SUZUKI SHUNICHI , NAKANISHI HIDEO
IPC分类号： H01L29/12 , H01L21/336 , H01L29/739 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a highly efficient compound semiconductor device with less energy loss. SOLUTION: An n-type low carrier concentration layer 2 with a carrier concentration as ≥10 11 /cm 3 and ≤10 16 /cm 3 , a p-type layer 3 with the carrier concentration as ≥10 11 /cm 3 and ≤10 21 /cm 3 , and an n-type high carrier concentration layer 4 with the carrier concentration ≥10 16 /cm 3 and ≤10 21 /cm 3 , are sequentially laminated on a low resistance substrate 1. The respective layers 2-4 are made to be 3C-SiC single crystal with the fault density of not more than 10 4 /cm 2 concerning a micropipe, a double-positioning domain, an anti-phase domain, a stacking fault, and a twin band. The compound semiconductor device also includes: a gate insulating film 5 which contacts at least the p-type layer 3, a control electrode 6 which contacts the gate insulating film 5 and is electrically separated from the respective layers 2-4, an upper electrode 7 which contacts at least the p-type layer 3 and the n-type high carrier concentration layer 4, and a lower electrode 8 which contacts the low resistance substrate 1. COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供具有较少能量损失的高效化合物半导体器件。
解决方案：载流子浓度为≥10 11 / cm 3 和≤10 16 的n型低载流子浓度层2 载体浓度为≥10 11 / cm 3 和≤10 21
的p型层3， / SP> / cm 3 / SP>，载流子浓度≥10 16 / cm 3的n型高载流子浓度层4和≤ 10 21 / cm 3 顺序层压在低电阻基板1上。各层2-4被制成3C-SiC单晶，其故障密度关于微管，双定位域，反相域，堆垛层错和双频带的不超过10 4 / cm 2 。复合半导体器件还包括：至少与p型层3接触的栅极绝缘膜5，与栅极绝缘膜5接触并与各层2-4电气分离的控制电极6，上部电极7 其至少接触p型层3和n型高载流子浓度层4，以及与低电阻基板1接触的下电极8.版权所有（C）2008，JPO＆INPIT

7. 发明专利

JP2014051400A Method for producing nitride semiconductor free-standing substrate 有权
标题翻译：生产氮化物半导体自由基底材的方法
公开(公告)号：JP2014051400A
公开(公告)日：2014-03-20
申请号：JP2012194963
申请日：2012-09-05
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： ABE YOSHIHISA , KOMIYAMA JUN , OISHI KOJI , YOSHIDA AKIRA , ERIGUCHI KENICHI , SUZUKI SHUNICHI
IPC分类号： C30B29/38 , C23C16/01 , C23C16/02 , C23C16/34 , C30B25/18 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method for obtaining a nitride semiconductor free-standing substrate having few dislocations by a simple process.SOLUTION: A method for producing a nitride semiconductor free-standing substrate comprises the steps of: forming a carbide film 2 having a thickness of 1 nm to 3 nm by carbonizing one principal surface of an Si substrate 1; forming a nitride semiconductor layer 3 having a thickness of 400 μm to 1000 μm on the carbide film 2; and obtaining the nitride semiconductor free-standing substrate by separating the nitride semiconductor layer 3 from an interface of the carbide film 2 and the nitride semiconductor layer 3.
摘要翻译：要解决的问题：提供一种通过简单的工艺获得几何位错的氮化物半导体自立式基板的方法。解决方案：一种用于制造氮化物半导体独立基板的方法包括以下步骤：形成具有通过碳化Si衬底1的一个主表面的厚度为1nm至3nm; 在碳化膜2上形成厚度为400μm〜1000μm的氮化物半导体层3; 以及通过从碳化膜2和氮化物半导体层3的界面分离氮化物半导体层3来获得氮化物半导体独立基板。

8. 发明专利

JP2011103380A Compound semiconductor substrate 有权
标题翻译：化合物半导体基板
公开(公告)号：JP2011103380A
公开(公告)日：2011-05-26
申请号：JP2009257899
申请日：2009-11-11
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： KOMIYAMA JUN , ISOGAI HIROMICHI , TOYODA EIJI , SUZUKI SHUNICHI , KASHIMA KAZUHIKO , SENSAI KOJI , NAKANISHI HIDEO
IPC分类号： H01L21/20 , H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor substrate achieving a high level of reduction of warpage of a substrate and a high level of speed performance of a device. SOLUTION: The compound semiconductor substrate includes a substrate made of Si single crystal, an intermediate layer of nitride semiconductor formed on a main surface of the substrate, and a compound semiconductor layer of the nitride semiconductor formed on the main surface of the intermediate layer, wherein an oxygen concentration of the substrate is 0.2×10 18 to 1.4×10 18 atoms/cm 3 , a resistance value is 1000 Ωcm or higher, and a total film thickness of the intermediate layer and the compound semiconductor layer in a direction perpendicular to the main surface is 450-4500 nm. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种化合物半导体衬底，其实现了基板的翘曲的高水平降低和装置的高水平的速度性能。解决方案：化合物半导体衬底包括由Si单晶制成的衬底，形成在衬底的主表面上的氮化物半导体的中间层和形成在中间层的主表面上的氮化物半导体的化合物半导体层层，其中，所述基板的氧浓度为0.2×10×SP×〜1.4×10×SP原子/ cm 3，SP电阻值为1000 Ωcm以上，中间层和化合物半导体层的与主面垂直的方向的总膜厚为450〜4500nm。版权所有（C）2011，JPO＆INPIT

9. 发明专利

JP2011082494A Compound semiconductor substrate 有权
标题翻译：化合物半导体基板
公开(公告)号：JP2011082494A
公开(公告)日：2011-04-21
申请号：JP2010153634
申请日：2010-07-06
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： KOMIYAMA JUN , ERIGUCHI KENICHI , OISHI KOJI , ABE YOSHIHISA , YOSHIDA AKIRA , SUZUKI SHUNICHI
IPC分类号： H01L29/812 , H01L21/205 , H01L21/338 , H01L29/778
CPC分类号： H01L21/0254 , H01L21/02458 , H01L21/02507
摘要： PROBLEM TO BE SOLVED: To inexpensively provide a compound semiconductor substrate suppressed in occurrence of a crack and warpage, and suitable for a normally-off type high-breakdown-voltage device. SOLUTION: This compound semiconductor substrate includes a structure wherein a multilayer buffer layer 2 in which Al x Ga 1-x N single-crystal layers (0.6≤x≤1.0) 21 containing carbon of 1×10 18 to 1×10 21 atoms/cm 3 and Al y Ga 1-y N single-crystal layers (0.1≤y≤0.5) 22 containing carbon of 1×10 17 to 1×10 21 atoms/cm 3 are alternately and repeatedly stacked in order, and a nitride active layer 3 comprising an electron transit layer 31 having a carbon content concentration ≤5×10 17 atoms/cm 3 and an electron supply layer 32 are sequentially deposited on a Si single-crystal substrate 1, wherein both the carbon content concentration of the Al x Ga 1-x N single-crystal layers 21 and that of the Al y Ga 1-y N single-crystal layers 22 respectively decrease from the substrate 1 side towards an active layer 3 side. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了廉价地提供抑制发生裂纹和翘曲的化合物半导体基板，并且适合于常闭型高耐压装置。解决方案：该化合物半导体衬底包括这样一种结构，其中Al（SB）x Ga 1-x N单晶层（0.6≤x≤ 1.0）21，含有1×10 18 至1×10 21原子/ cm 3的SP 和Al y 含有1×10 17 <1/10 21的碳的单晶层（0.1≤y≤0.5）22 原子/ cm 3 / SP>依次交替重复堆叠，并且包含碳含量浓度为≤5×10 17个原子/ cm 3的电子转移层31的氮化物活性层3， cm 3和/或电子供给层32依次沉积在Si单晶衬底1上，其中，Al x < x N单晶层21和Al Y 1-y / N N单晶层22的单晶层22分别从衬底1侧朝向活性层3侧。版权所有（C）2011，JPO＆INPIT

10. 发明专利

JP2009070872A Compound semiconductor substrate 审中-公开
标题翻译：化合物半导体基板
公开(公告)号：JP2009070872A
公开(公告)日：2009-04-02
申请号：JP2007234972
申请日：2007-09-11
申请人： Covalent Materials Corp , コバレントマテリアル株式会社
发明人： ABE YOSHIHISA , KOMIYAMA JUN , SUZUKI SHUNICHI , OISHI KOJI , YOSHIDA AKIRA , NAKANISHI HIDEO
IPC分类号： H01L21/205 , H01L33/32 , H01L33/34
摘要： PROBLEM TO BE SOLVED: To provide a compound semiconductor substrate capable of increasing the film thickness of a nitride semiconductor single crystal layer while suppressing the occurrence of cracks in the nitride semiconductor single crystal layer, crystal defects or the like. SOLUTION: The compound semiconductor substrate has a first intermediate layer 110 formed on an Si single crystal substrate 100 having a crystal plane orientation of ä111}. In the layer 110, a first metal compound layer 110a formed of one of TiC, TiN, VC and VN, and a second metal compound layer 110b formed of one of compounds different from the compound of the first metal compound layer 110a out of TiC, TiN, VC and VN are laminated on each other. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供能够提高氮化物半导体单晶层的膜厚，同时抑制氮化物半导体单晶层中的裂纹的发生，晶体缺陷等的化合物半导体基板。解决方案：化合物半导体衬底具有在晶体取向为ä111}的Si单晶衬底100上形成的第一中间层110。在层110中，由TiC，TiN，VC和VN中的一种形成的第一金属化合物层110a和由与TiC中的第一金属化合物层110a的化合物不同的化合物之一形成的第二金属化合物层110b， TiN，VC和VN彼此层叠。版权所有（C）2009，JPO＆INPIT

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