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1. 发明专利

JP2012246168A Silicon carbide substrate, silicon carbide wafer, method for manufacturing silicon carbide wafer, and silicon carbide semiconductor device 有权
标题翻译：硅碳化硅基体，碳化硅陶瓷，制造碳化硅陶瓷的方法和碳化硅半导体器件
公开(公告)号：JP2012246168A
公开(公告)日：2012-12-13
申请号：JP2011118419
申请日：2011-05-26
申请人： Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所 , Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： TSUCHIDA SHUICHI , CHO MEGURU , NAKAYAMA KOJI , ASANO KATSUNORI
IPC分类号： C30B29/36 , C23C16/02 , C23C16/42 , C30B25/20 , C30B33/02
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a silicon carbide wafer which prevents complication of a manufacture process, does not restrict a silicon carbide substrate, and is capable of more surely converting a basal plane dislocation to a threading edge dislocation, and also to provide a silicon carbide semiconductor device using the silicon carbide wafer.SOLUTION: The tip part of the basal plane dislocation 20 of the silicon carbide substrate 1 is converted to the threading edge dislocation 30 by heat-treating the silicon carbide substrate 1 at 1,700-2,200°C in an inert gas atmosphere or in a vacuum, and an epitaxial film 2 where the basal plane dislocation 20 is reduced is crystal-grown by carrying out epitaxial growth of silicon carbide on the silicon carbide substrate 1.
摘要翻译：要解决的问题：为了提供一种制造碳化硅晶片的方法，其防止制造工艺的复杂化，不限制碳化硅衬底，并且能够更可靠地将基面位错转换为螺纹刃错位并且还提供使用碳化硅晶片的碳化硅半导体器件。解决方案：通过在惰性气体气氛中在1700-2200℃下热处理碳化硅衬底1将碳化硅衬底1的基面位错20的尖端部分转换成穿线边缘位错30 真空和通过在碳化硅衬底1上进行碳化硅的外延生长而使基面位错20被还原的外延膜2被晶体生长。（C）2013，JPO＆INPIT

2. 发明专利

JP2014045183A Semiconductor structure, semiconductor device, and method for producing semiconductor structure 有权
标题翻译：半导体结构，半导体器件及其半导体结构的制造方法
公开(公告)号：JP2014045183A
公开(公告)日：2014-03-13
申请号：JP2013158582
申请日：2013-07-31
申请人： National Institute Of Advanced Industrial & Technology , 独立行政法人産業技術総合研究所 , Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所 , Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： KOJIMA KAZUSATO , JI SHI-YANG , MIYAZAWA TETSUYA , TSUCHIDA SHUICHI , NAKAYAMA KOJI , ITSUMI TETSURO , ASANO KATSUNORI
IPC分类号： H01L21/205 , H01L21/336 , H01L29/12 , H01L29/739 , H01L29/78
CPC分类号： H01L29/1608 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02529 , H01L21/02576 , H01L21/02579 , H01L21/0259 , H01L21/02609 , H01L21/0262 , H01L21/046 , H01L29/04 , H01L29/045 , H01L29/167 , H01L29/66068 , H01L29/7393 , H01L29/7395
摘要： PROBLEM TO BE SOLVED: To provide: a semiconductor structure excellent in mechanical strength and capable of being reduced in resistance during conduction of electricity; a semiconductor device; and a method for producing the semiconductor structure.SOLUTION: A semiconductor structure of the present invention has at least an α-type crystal structure, contains aluminum at an impurity concentration of 1×10cmor higher, and has a p-type silicon carbide single crystal layer having a thickness of 50 μm or higher. Moreover, a method for producing the semiconductor structure of the present invention includes at least an epitaxial growth step where silicon carbide source and an aluminum source are introduced, and a p-type silicon carbide single crystal layer is epitaxially grown on a substrate layer of silicon carbide single crystals having an α-type crystal structure. The epitaxial growth step is performed under temperature conditions of 1,500°C or above and 1,700°C or below and under pressure conditions of 5×10Pa or more and 25×10Pa or less.
摘要翻译：要解决的问题：提供：机械强度优异并且能够在电传导期间电阻降低的半导体结构; 半导体器件; 以及制造半导体结构的方法。本发明的半导体结构至少具有α型晶体结构，其含有杂质浓度为1×10cm以上的铝，并具有p型碳化硅单晶层的厚度为50μm以上。此外，本发明的半导体结构体的制造方法至少包括引入碳化硅源和铝源的外延生长工序，在硅衬底层上外延生长p型碳化硅单晶层具有α型晶体结构的碳化物单晶。外延生长步骤在1500℃以上且1700℃以下的温度条件下，在5×10Pa以上且25×10Pa以下的压力条件下进行。

3. 发明专利

JP2013107788A Method for manufacturing silicon carbide wafer, silicon carbide wafer, silicon carbide semiconductor element, and power converting device 有权
标题翻译：制造硅碳化硅，碳化硅陶瓷，碳化硅半导体元件和功率转换器件的方法
公开(公告)号：JP2013107788A
公开(公告)日：2013-06-06
申请号：JP2011253283
申请日：2011-11-18
申请人： Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所 , Kansai Electric Power Co Inc:The , 関西電力株式会社
发明人： NAGANO MASAHIRO , TSUCHIDA SHUICHI , NAKAYAMA KOJI , ASANO KATSUNORI
IPC分类号： C30B29/36 , C30B25/20
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a silicon carbide wafer which prevents complication of a manufacture process, does not restrict a silicon carbide substrate, and is capable of more surely converting a basal plane dislocation (BPD) to a threading edge dislocation (TED).SOLUTION: This method includes the first step in which Si ion is injected into one direction of a silicon carbide substrate 1 or the substrate 1 is irradiated with an electron beam, the second step in which the silicon carbide substrate 1 is subjected to annealing, and the third step in which one direction side of the silicon carbide substrate 1 is epitaxially grown to form an epitaxial film 3. The ion to be injected into the silicon carbide substrate is at least one kind selected from a group comprising Si ion, C ion, H ion, He ion, P ion, Al ion B ion and N ion.
摘要翻译：要解决的问题：为了提供一种防止制造工艺的复杂化的碳化硅晶片的制造方法，不限制碳化硅衬底，并且能够更可靠地将基面位错（BPD）转换为穿线边缘错位（TED）。解决方案：该方法包括将Si离子注入到碳化硅衬底1的一个方向或者将衬底1照射电子束的第一步骤，其中碳化硅衬底1经受第二步骤退火，以及第三步骤，其中外延生长碳化硅衬底1的一个方向侧以形成外延膜3.要注入到碳化硅衬底中的离子是选自由以下组成的组中的至少一种：Si离子， C离子，H离子，He离子，P离子，Al离子B离子和N离子。版权所有（C）2013，JPO＆INPIT

4. 发明专利

JP2014187282A Film deposition apparatus and a film forming method 有权
标题翻译：薄膜成型装置和薄膜成型方法
公开(公告)号：JP2014187282A
公开(公告)日：2014-10-02
申请号：JP2013062150
申请日：2013-03-25
申请人： Nuflare Technology Inc , 株式会社ニューフレアテクノロジー , Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所 , Denso Corp , 株式会社デンソー , Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： ITO HIDEKI , TSUCHIDA SHUICHI , KAMATA ISAO , ITO MASAHIKO , NAITO MASAMI , FUJIBAYASHI HIROAKI , ADACHI AYUMI , NISHIKAWA KOICHI
IPC分类号： H01L21/205 , C23C16/42 , C23C16/44 , C23C16/46
CPC分类号： H01L21/68785 , C23C16/4408 , C30B25/10 , C30B25/14 , C30B25/16 , H01L21/67109
摘要： PROBLEM TO BE SOLVED: To provide a film forming apparatus and a film forming method, capable of preventing a corrosive gas from contaminating a space including a lower heater and preventing the lower heater from being corroded by the corrosive gas when a substrate is carried in or carried out, and increasing productivity by making it possible to carry in or carry out the substrate at a high temperature.SOLUTION: When a substrate is carried in or carried out, a space in which film forming process is performed, a space including a lower heater 16, and a space including an upper heater 19 are made to be an atmosphere of an inert gas.
摘要翻译：要解决的问题：提供一种成膜设备和成膜方法，其能够防止腐蚀性气体污染包括下加热器的空间，并且当衬底被携带时防止下加热器被腐蚀性气体腐蚀，或实现并且通过使得可以在高温下携带或执行基板来提高生产率。解决方案：当衬底被携带或执行时，进行成膜处理的空间包括较低的加热器16和包括上加热器19的空间被制成惰性气体的气氛。

5. 发明专利

JP2013216514A Method of manufacturing silicon carbide single crystal 有权
标题翻译：制造单晶碳化硅的方法
公开(公告)号：JP2013216514A
公开(公告)日：2013-10-24
申请号：JP2012086568
申请日：2012-04-05
申请人： Denso Corp , 株式会社デンソー , Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所
发明人： MAKINO HIDEMI , HOSHINO NORIHIRO , KAMATA ISAO , TSUCHIDA SHUICHI
IPC分类号： C30B29/36 , C30B25/08
摘要： PROBLEM TO BE SOLVED: To control a growth surface of an SiC single crystal becoming a concave shape, to reduce a curvature of the recessed shape at least, and to make the growth surface become a projecting shape desirably.SOLUTION: A third heat insulating material 16 is provided to protrude from an inner periphery wall surface of a heating vessel 8 enclosing a pedestal 9. As a result, a temperature of an outer edge of an SiC single crystal 20 can be pulled to a temperature of the third heat insulating material 16, and that a growth surface of the SiC single crystal 20 becomes a recessed shape can be controlled. Therefore, generation of stress in an intracrystalline part of the SiC single crystal 20 can be controlled, and quality can be prevented from being deteriorated by generation of crystal defect (dislocation) or the like.
摘要翻译：要解决的问题：为了控制成为凹形的SiC单晶的生长表面，至少减小凹陷形状的曲率，并使生长表面理想地成为突出形状。解决方案：第三绝热材料 16被设置为从包围基座9的加热容器8的内周壁面突出。结果，可以将SiC单晶20的外缘的温度拉至第三隔热材料16的温度并且可以控制SiC单晶20的生长表面变成凹陷形状。因此，可以控制SiC单晶20的晶体内部的应力的产生，并且通过产生晶体缺陷（位错）等可以防止质量劣化。

6. 发明专利

JP2014169944A Method for inspecting silicon carbide substrate or silicon carbide semiconductor element, and method for manufacturing silicon carbide substrate or silicon carbide semiconductor element 有权
标题翻译：用于检查碳化硅衬底或碳化硅半导体元件的方法，以及用于制造碳化硅衬底或碳化硅半导体元件的方法
公开(公告)号：JP2014169944A
公开(公告)日：2014-09-18
申请号：JP2013042354
申请日：2013-03-04
申请人： Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所
发明人： NAGANO MASAHIRO , TSUCHIDA SHUICHI , KAMATA ISAO
IPC分类号： G01N21/64 , C30B29/36 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a method for inspecting a silicon carbide substrate or a silicon carbide semiconductor element capable of identifying defects in an easy and non-destructive manner, and to provide a method for manufacturing a silicon carbide substrate or a silicon carbide semiconductor element with improved performances.SOLUTION: The inspection method includes: irradiating an object 1 to be inspected, which is a silicon carbide substrate or a silicon carbide semiconductor element, with laser; receiving fluorescent light radiated from the object 1 to be inspected, by the laser; forming an image indicating a light emitting state of the object 1 to be inspected; and identifying a direction of Burgers vector of threading edge dislocations (TED) existing in the object 1 to be inspected on the basis of the image. In addition, by analyzing distortions and stresses generated by the Burgers vector, a manufacturing condition is identified so as to suppress the distortions and stresses. Thus, the silicon carbide substrate or the silicon carbide semiconductor element is manufactured under the manufacturing condition.
摘要翻译：要解决的问题：提供一种用于检查能够以简单且无损的方式识别缺陷的碳化硅衬底或碳化硅半导体元件的方法，并且提供一种制造碳化硅衬底或碳化硅半导体的方法具有改进性能的元件。解决方案：检查方法包括：用激光照射作为碳化硅衬底或碳化硅半导体元件的待检查对象1; 通过激光接收从待检查物体1辐射的荧光; 形成表示待检查物体1的发光状态的图像; 并基于图像识别存在于待检查对象1中的穿线边缘位错（TED）的汉堡向量的方向。此外，通过分析由汉堡矢量产生的变形和应力，确定制造条件以抑制失真和应力。因此，在制造条件下制造碳化硅基板或碳化硅半导体元件。

7. 发明专利

JP2017085047A エピタキシャルウェハの製造方法、エピタキシャルウェハ、半導体装置の製造方法及び半導体装置审中-公开
公开(公告)号：JP2017085047A
公开(公告)日：2017-05-18
申请号：JP2015214758
申请日：2015-10-30
申请人：一般財団法人電力中央研究所 , Central Research Institute Of Electric Power Industry , 国立研究開発法人産業技術総合研究所 , National Institute Of Advanced Industrial Science And Technology , 富士電機株式会社 , Fuji Electric Co Ltd
发明人： TSUCHIDA SHUICHI , MIYAZAWA TETSUYA , YONEZAWA YOSHIYUKI , KATO TOMOHISA , KOJIMA KAZUSATO , TAWARA TAKESHI , OTSUKI AKIHIRO
IPC分类号： H01L21/205 , C23C16/42 , C30B25/16 , C30B25/20 , C30B29/36 , H01L21/329 , H01L29/06 , H01L29/861 , H01L29/868
CPC分类号： H01L21/02529 , C23C16/325 , C23C16/56 , C30B25/16 , C30B25/20 , C30B29/36 , H01L21/02378 , H01L21/02433 , H01L21/02447 , H01L21/02576 , H01L21/02579 , H01L21/02581 , H01L21/0262 , H01L21/046 , H01L29/06 , H01L29/16 , H01L29/861 , H01L29/868
摘要：【課題】エピタキシャル成長層の厚みを抑制しつつ、大電流でバイポーラ動作させても、基板上のエピタキシャル成長層と基板との界面から拡張する帯状積層欠陥の発生を効果的に抑制するエピタキシャルウェハを提供する。【解決手段】エピタキシャルウェハの製造方法は、炭化珪素の基板の上に、導電型を決める主ドーパントを添加すると共に少数キャリアを捕獲する副ドーパントを主ドーパントのドーピング濃度より低いドーピング濃度で添加して、耐圧維持層から基板の方向に流れる少数キャリアの捕獲及び消滅を促進する、耐圧維持層より低抵抗の、炭化珪素を主成分とするバッファ層をエピタキシャル成長するステップ(S1〜S5)と、バッファ層の上に耐圧維持層をエピタキシャル成長するステップと、を含む。【選択図】図1

8. 发明专利

JP2014240336A 炭化珪素単結晶の製造方法有权
标题翻译：生产碳化硅单晶的方法
公开(公告)号：JP2014240336A
公开(公告)日：2014-12-25
申请号：JP2013123800
申请日：2013-06-12
申请人：株式会社デンソー , Denso Corp , 一般財団法人電力中央研究所 , Central Research Institute Of Electric Power Industry
发明人： MAKINO HIDEMI , KOJIMA ATSUSHI , TOKUDA YUICHIRO , TSUCHIDA SHUICHI , KAMATA ISAO , HOSHINO NORIHIRO
IPC分类号： C30B29/36 , C30B25/16
CPC分类号： C30B25/12 , C30B25/16 , C30B29/36
摘要：【課題】高品質なSiC単結晶をさらに高速成長させられるSiC単結晶の製造方法を提供する。【解決手段】所定の回転速度でSiC単結晶20の成長表面を高速回転させつつ、SiC単結晶20の成長速度が増加するか低下するか、凸面成長しているか凹面成長しているかに基づいて、回転速度を制御する。例えば、SiC単結晶20の結晶中心での成長速度が狙い値を中心とした閾範囲の上限値よりも大きければ回転速度を維持もしくは低下させ、閾範囲の下限値よりも小さければ回転速度を上昇させる。このように、SiC単結晶20の成長表面を高速回転させることによって高速成長を可能としつつ、成長速度に応じて回転速度を制御することでSiC単結晶20を凸面成長もしくはフラット成長となるように制御できる。これにより、高品質なSiC単結晶20をさらに高速成長させることが可能となる。【選択図】図1
摘要翻译：要解决的问题：提供一种生产能够以更高生长速度生长高质量SiC单晶的SiC单晶的方法。解决方案：制造SiC单晶的方法包括根据是否控制转速同时以特定的高转速旋转SiC单晶20的生长表面，SiC单晶20的生长速率增加或减少，以及SiC单晶是否经历凸表面生长或凹面生长。更具体地说，当晶体中心处的SiC单晶20的生长速度高于在目标值附近的阈值范围内的上限值时，转速保持或降低。当生长速度低于阈值范围的下限值时，转速增加。 SiC单晶的生长面的高速旋转能够高速生长，根据生长速度的转速的控制能够控制SiC单晶20的凸面生长或平面生长。因此能够以更高的生长速度生长高质量的SiC单晶20。

9. 发明专利

JP2013145873A Deposition apparatus and deposition method 有权
标题翻译：沉积装置和沉积方法
公开(公告)号：JP2013145873A
公开(公告)日：2013-07-25
申请号：JP2012265217
申请日：2012-12-04
申请人： Nuflare Technology Inc , 株式会社ニューフレアテクノロジー , Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所 , Denso Corp , 株式会社デンソー , Toyota Motor Corp , トヨタ自動車株式会社 , Toyota Central R&D Labs Inc , 株式会社豊田中央研究所
发明人： ITO HIDEKI , SUZUKI KUNIHIKO , SATO HIROSUKE , TSUCHIDA SHUICHI , KAMATA ISAO , ITO MASAHIKO , NAITO MASAMI , FUJIBAYASHI HIROAKI , ADACHI AYUMI , NISHIKAWA KOICHI
IPC分类号： H01L21/205 , C23C16/455
CPC分类号： C30B25/165 , C30B25/14
摘要： PROBLEM TO BE SOLVED: To provide a deposition apparatus and a deposition method, which inhibit reaction of a source gas on a shower plate.SOLUTION: A deposition apparatus 100 supplies a plurality of kinds of gases toward a substrate 101 in a chamber 103 by using a shower plate 124. The shower plate 124 includes: a plurality of gas passages 121 which extend in the shower plate along a first surface on the substrate 101 side and which are connected to gas tubes 131 for supplying the plurality of kinds of gases, respectively; and a plurality of gas jetting ports 129 which are pierced so as to communicate the plurality of gas passages 121 and the inside of the chamber 103 on the first surface side. In the deposition apparatus 100, the plurality of kinds of gases which are respectively supplied from the gas tubes 131 to the gas passages 121 of the shower plate 124, and which are supplied from the gas jetting ports 129 to the substrate 101, respectively, without being mixed near and inside the shower plate 124.
摘要翻译：要解决的问题：提供一种抑制源气体在喷淋板上的反应的沉积设备和沉积方法。解决方案：沉积设备100通过使用多个气体朝向室103中的基板101提供多种气体淋浴板124.淋浴板124包括：多个气体通道121，其沿着基板101侧的第一表面在淋浴板中延伸并分别连接到用于供应多种气体的气体管131 ; 以及多个气体喷射口129，其被刺穿以便在第一表面侧上连通多个气体通道121和室103的内部。在沉积装置100中，分别从气体管131向喷淋板124的气体通道121供给并从气体喷射口129分别供给到基板101的多种气体，没有在淋浴板124附近和内部混合。

10. 发明专利

JP2013048247A SiC BIPOLAR TYPE SEMICONDUCTOR ELEMENT 有权
标题翻译： SiC双极型半导体元件
公开(公告)号：JP2013048247A
公开(公告)日：2013-03-07
申请号：JP2012200245
申请日：2012-09-12
申请人： Central Research Institute Of Electric Power Industry , 一般財団法人電力中央研究所
发明人： TSUCHIDA SHUICHI , LIUTAURAS STORASTA
IPC分类号： H01L29/861 , H01L21/205 , H01L21/265 , H01L21/329 , H01L21/331 , H01L21/336 , H01L29/06 , H01L29/12 , H01L29/732 , H01L29/739 , H01L29/74 , H01L29/744 , H01L29/78 , H01L29/868
摘要： PROBLEM TO BE SOLVED: To provide an SiC semiconductor element reduced in carrier trapping centers.SOLUTION: An SiC bipolar type semiconductor element includes: an n type or p type SiC substrate 11; and at least one n type or p type SiC epitaxial layer 12 or at least one n type or p type ion implantation layer 14. The SiC bipolar type semiconductor element further includes: a carbon implantation layer, a silicon implantation layer, a hydrogen implantation layer or a helium implantation layer in at least one region 100 among regions around an SiC substrate surface, around an interface between the SiC substrate and the SiC epitaxial layer, and around an SiC epitaxial layer surface, excluding around a pn junction interface and within a conductivity modulation layer (base layer); and a region within the conductivity modulation layer, the region being reduced in electrically active point defects by bonding carbon interstitial atoms and the point defects while diffusing the carbon interstitial atoms into the conductivity modulation layer by annealing, the carbon interstitial atoms being introduced by carrying out ion implantation of carbon atoms, silicon atoms, hydrogen atoms, or helium atoms.
摘要翻译：要解决的问题：提供减少载流子捕获中心的SiC半导体元件。解决方案：SiC双极型半导体元件包括：n型或p型SiC衬底11; 以及至少一个n型或p型SiC外延层12或至少一种n型或p型离子注入层14.SiO 2双极型半导体元件还包括：碳注入层，硅注入层，氢注入层或在SiC衬底表面周围的区域中的至少一个区域100内的氦注入层，围绕SiC衬底和SiC外延层之间的界面，并且围绕SiC外延层表面，不包括在pn结界面附近和导电性调制层（基层）; 和电导率调制层内的区域，该区域通过键合碳间隙原子和点缺陷而在电活性点缺陷中减少，同时通过退火将碳间隙原子扩散到电导率调制层中，碳间隙原子通过进行离子注入碳原子，硅原子，氢原子或氦原子。版权所有（C）2013，JPO＆INPIT

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