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1. 发明专利

JPH06172972A DUST COLLECTOR FOR VACUUM TREATING DEVICE 失效
公开(公告)号：JPH06172972A
公开(公告)日：1994-06-21
申请号：JP32334992
申请日：1992-12-02
申请人： CANON KK , APPLIED MATERIALS JAPAN , OMI TADAHIRO
发明人： GOTOU AKIHIRO , YAMAGAMI ATSUSHI , OKAMURA NOBUYUKI , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： C23C14/22 , C23C14/00 , C23C16/44
摘要： PURPOSE:To improve performance such as the reliability of a vacuum treating device yield, reproducibility or the like by executing dust collection treating in a vacuum chamber with the intake air, utilizing the pressure difference from the chamber. CONSTITUTION:A gas for dust collection treating is supplied into the vacuum chamber 100 by connecting a nozzle 10 to the vacuum chamber 100 for vacuum treating. Then, a suction opening 12 is connected to the vacuum chamber 100 in which the dust collection treating is executed by sucking air while utilizing the pressure difference. The vacuum chamber 100 is one for plasma treating. The vacuum chamber 100 is also one for producing semiconductor by plasma treating. As a result, dust is removed under non-contact state without opening the vacuum chamber into atmosphere.

2. 发明专利

JPH04198476A PLASMA TREATING DEVICE 失效
公开(公告)号：JPH04198476A
公开(公告)日：1992-07-17
申请号：JP32607590
申请日：1990-11-29
申请人： CANON KK , OMI TADAHIRO , APPLIED MATERIALS JAPAN
发明人： OKAMURA NOBUYUKI , YAMAGAMI ATSUSHI , OMI TADAHIRO , SHIBATA SUNAO , GOTOU HARUHIRO
IPC分类号： C23C14/34 , C23C14/00 , C23C14/35 , C23C14/56 , C23C16/509 , H01J37/34 , H01L21/203
摘要： PURPOSE:To form a vapor deposited film having excellent quality with good productivity by forming a pressure difference in the internal space in the plasma treating device having electrodes for discharge for plasma generation and a deposition preventive plate enclosing the space between the electrodes. CONSTITUTION:An electric discharge is generated between a holder 1 of a target 5 and a holder 2 for a substrate 6 in an opposite direction by DC power sources 10, 11 or high-frequency power source in a vacuum chamber 8. Gas of Ar, etc., is simultaneously introduced from a gas introducing pipe 14 into the vacuum chamber and Ar cations are brought into collision against the target 5 by the plasma generated by the electric discharge to form the vapor deposited film consisting of the target material on a substrate 6 of a negative pole. The deposition preventive plate 3 having a narrow passage 15 is disposed between the two electrodes and a positive charge is previously imparted by a power source 16 thereto. The Ar atoms converted to the positive ions by the plasma generated by electric discharge between the two electrodes 1 and 2 extremely efficiently form the thin film having the excellent quality while the diffusion from the film forming region S1 to the outer region S2 of the deposition preventive plate is prevented by the deposition preventive plate 3.

3. 发明专利

JPH0499176A PLASMA TREATING DEVICE 失效
公开(公告)号：JPH0499176A
公开(公告)日：1992-03-31
申请号：JP20753790
申请日：1990-08-07
申请人： CANON KK , OMI TADAHIRO , APPLIED MATERIALS JAPAN
发明人： YAMAGAMI ATSUSHI , OKAMURA NOBUYUKI , OMI TADAHIRO , SHIBATA SUNAO , GOTOU AKIHIRO
IPC分类号： C23C14/34 , C23C14/35 , C23C14/54 , C23C16/50 , C23C16/509 , C23F4/00 , H01J37/34 , H05H1/02
摘要： PURPOSE:To reduce the intrusion of the contaminant from a vacuum vessel, deposition preventing plate, etc., and to prevent the damage of a substrate by controlling the potential of a third electrode enclosing the space formed by the opposed first and second electrodes for plasma treatment. CONSTITUTION:The third electrode 3 is provided to enclose the space between the first electrode 1 and the second electrode 2. A substrate 6 is set on the electrode 2, a vacuum vessel 8 is evacuated to a specified pressure, and the potential of the electrode 3 is controlled to a specified value. An inert gas is then introduced into the vessel 8 to adjust the pressure to a specified value. An RF potential is applied on the electrode 1, an electric discharge is generated to produce plasma, and a film is formed. The potential of the electrode 3 is appropriately selected in accordance with the effect, etc., to be obtained by the film forming condition used or by using the electrode 3.

4. 发明专利

JPH1126598A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1126598A
公开(公告)日：1999-01-29
申请号：JP17686997
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： H01L29/78 , H01L21/8238 , H01L27/092
摘要： PROBLEM TO BE SOLVED: To eliminate the output offset voltage due to fluctuation in the relative threshold voltage Vth between an NMOS and a PMOS at the time of transmitting a DC voltage. SOLUTION: The semiconductor integrated circuit comprises a first depletion mode N channel MOS transistor 1 where respective gates are connected with the input terminal while respective sources are connected with the output terminal, and a first depletion mode P channel MOS transistor 2. The semiconductor integrated circuit further comprises a second depletion mode N channel MOS transistor 4 of the same W/L as the first depletion mode N channel MOS transistor 1 where the drain is connected with the output terminal while the gate and source are connected together with a low voltage side power supply, and a second depletion mode P channel MOS transistor 3 of the same W/L as the first depletion mode P channel MOS transistor 2 where the drain is connected with the output terminal while the gate and source are connected together with a high voltage side power supply. The 'same W/L' means the value of (channel width)/(channel length) is identical or substantially identical.

5. 发明专利

JPH1127065A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1127065A
公开(公告)日：1999-01-29
申请号：JP17686897
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： G11C27/02 , H03F3/50
摘要： PROBLEM TO BE SOLVED: To provide an analog/multivalued signal processing system which includes a voltage buffer that is free from a DC level shift and can accurately send the DC voltage information. SOLUTION: The gate and source of a 1st insulated gate transistor(TR) 1 of a depression type are used as the input and output terminals 3 and 4 respectively. Then a drain 2 of a 2nd insulated gate TR 2 of a depression type having the same W/L (channel width/length) and the same conductivity type as those of the TR 1 is connected to the source of the TR 1 with the gate and source of the TR 2 connected to a ground potential 6 or a fixed DC potential. In such a constitution, the drain current of the TR 2 serves as the bias current of the TR 1 when 0V is set between the gate and source of the TR 2.

6. 发明专利

JPH1125200A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1125200A
公开(公告)日：1999-01-29
申请号：JP17687097
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： G01D1/12 , G06G7/12 , G06G7/122 , H01L21/8238 , H01L27/092 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor integrated circuit for detecting a maximum or minimum voltage position of signal voltage impressed to respective signal input terminals of plural circuit units by voltage impressed to the other terminal side of a 2nd capacity means. SOLUTION: A semiconductor integrated circuit is provided with plural circuit units each of which is constituted of connecting the gate of a transistor(TR) 8 to a signal input terminal through a 1st capacity means 13, connecting a common node between the gate and the means 13 to one terminal side of a 2nd capacity means 12 and connecting control means 27, 28, 18 for varying voltage impressed to the other terminal side of the 2nd capacity means 12 between the drain of the TR 8 and the other terminal side of the means 12 so as to furthermore increase/decrease a drain current correspondingly to the increment/decrement of the drain current. The sources of respective TRs in plural circuit units are connected to a constant current source in common and a maximum or minimum voltage position of signal voltage impressed to respective signal input terminals is detected by voltage impressed to the other terminal side of the 2nd capacity means 12.

7. 发明专利

JPH1127148A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1127148A
公开(公告)日：1999-01-29
申请号：JP17686597
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： H03M1/40
摘要： PROBLEM TO BE SOLVED: To prevent the increase of a circuit scale and the increase of power consumption from being invited even if a D/A converter is used. SOLUTION: This circuit has signal amplifying means (2 and 10) which switch gain to one time or two times, operation processing means (7 and 9) which perform subtraction processing of a signal to be inputted and reference voltage and output them or output them without performing subtraction processing, a switching means 8 in which one switch terminal is connected to a signal input terminal, the other switch terminal is also connected to output sides of sample-and-hold means (5 and 6) and a common terminal is connected to an input side of the operation processing means, a comparator 3 which compares an output of the signal amplifying means with reference voltage and binarizes it and a switching means 11 which connects an output side of the signal amplifying means and an input side of the sample hold means. Here, the operation processing means switches between performing subtraction processing of a signal to be inputted and reference voltage to output and outputting them without performing subtraction processing based on an output of the comparator 3.

8. 发明专利

JPH1127116A SEMICONDUCTOR INTEGRATED CIRCUIT, VOLTAGE CONTROLLED DELAY LINE, DELAY LOCKED LOOP, SELF-SYNCHRONOUS PIPELINE DIGITAL SYSTEM, VOLTAGE CONTROLLED OSCILLATOR AND PHASE-LOCKED LOOP 失效
公开(公告)号：JPH1127116A
公开(公告)日：1999-01-29
申请号：JP17686797
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： G11C11/4076 , H03H11/26 , H03K3/03 , H03K3/354 , H03K5/00 , H03K5/13 , H03L7/081 , H03L7/099
摘要： PROBLEM TO BE SOLVED: To prevent jitter quantity from increasing even if delay quantity is increased. SOLUTION: A signal input terminal 1 is connected to an input terminal of a sense amplifier through a 1st capacity means 6, a control input terminal 10 is connected to the input terminal of the sense amplifier through a 2nd capacity means 5 and a common connection point of the input terminal of the sense amplifier and the means 5 and 6 is a floating node. The delay quantity of an output is controlled when a signal that is applied to the input terminal of the sense amplifier through the terminal 1 is vertically shifted at least in the neighborhood of decision threshold of the sense amplifier.

9. 发明专利

JPH1125201A SEMICONDUCTOR INTEGRATED CIRCUIT 失效
公开(公告)号：JPH1125201A
公开(公告)日：1999-01-29
申请号：JP17686697
申请日：1997-07-02
申请人： OMI TADAHIRO , CANON KK
发明人： OGAWA KATSUHISA , OMI TADAHIRO , SHIBATA SUNAO
IPC分类号： G06G7/16 , G06G7/163
摘要： PROBLEM TO BE SOLVED: To make it possible to operate a highly accurate analog current product by finding out an weighted mean sum of two input currents at a floating point, generating voltage having a term of the product and exponentially converting the voltage to obtain a product of two current values. SOLUTION: Signal currents Ix, Iy from 1st and 2nd input signal current sources 1, 2 are logarithmically converted into voltage values Vx, Vy by NMOS transistors(TRs) 6 to 9 having sub-threshold operation. The potential level Vf of a floating point becomes a voltage value obtained by the weighted mean sum of capacity coupling by 1st and 2nd capacity means 10, 11. When capacity values Cx, Cy are equally set up, a product Ix.Iy of the input currents Ix, Iy is generated. The potential level Vf of the floating point is the gate-source voltage of an NMOS TR 12, and when a drain current is set up as Iout, the linear product Ix.Iy of the input currents Ix, Iy can be extracted as Iout=Ix.Iy.

10. 发明专利

JP2001326221A DEVICE AND METHOD FOR FORMING THIN FILM 失效
公开(公告)号：JP2001326221A
公开(公告)日：2001-11-22
申请号：JP2001077592
申请日：2001-03-19
申请人： OMI TADAHIRO
发明人： OMI TADAHIRO , SHIBATA SUNAO , UMEDA MASARU
IPC分类号： C23C14/34 , H01L21/203 , H01L21/285 , H01L21/31
摘要： PROBLEM TO BE SOLVED: To provide a device and method for forming a film that can accurately reduce damage caused by the ion collision of a semiconductor substrate, and can precisely quicken the sputter speed of a target. SOLUTION: In this film-forming device, first and second electrodes are oppositely arranged in a chamber where pressure is reduced, the first electrode is connected to a first high-frequency power supply. At the same tune, the second electrode is connected to a second high-frequency power supply, and the material of the target that is mounted onto the second electrode is subjected to the sputtering for depositing onto the substrate that is mounted onto the first electrode. In this case, a first resonance circuit resonating with merely an output frequency from the second high-frequency power supply is connected to the first electrode, and a second resonance circuit resonating with merely the output frequency from the first high-frequency power supply is connected to the second electrode.

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