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61. 发明专利

JP2003339167A Induction heater, and induction heating appliance and rice cooker using the induction heater 有权
标题翻译：感应加热器，感应加热器和电烤炉使用感应加热器
公开(公告)号：JP2003339167A
公开(公告)日：2003-11-28
申请号：JP2002144230
申请日：2002-05-20
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ASADA KAZUHIKO , OMORI HIDEKI , YAMASHITA HIDEKAZU , OGAWA MASANORI , KITAHATA MAKOTO , OSAGATA NOBUYOSHI , TAWARA TETSUYA , NOBORI KAZUHIRO
IPC分类号： H05B6/12 , A47J27/00 , H02M7/48 , H05B6/04
摘要： PROBLEM TO BE SOLVED: To provide an induction heater of low loss, high efficiency and a simple configuration. SOLUTION: A DC power supply 23 and a resonance capacitor 24 are parallel- connected to a series circuit formed of a heating coil 21 and a bidirectional switching element 22, thus performing induction heating at high efficiency. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供低损耗，高效率和简单配置的感应加热器。解决方案：直流电源23和谐振电容器24并联连接到由加热线圈21和双向开关元件22形成的串联电路，从而以高效率进行感应加热。版权所有（C）2004，JPO

62. 发明专利

JP2003339166A Induction heater and induction heating cooking appliance and rice cooker using the induction heater 有权
标题翻译：感应加热器和感应加热烹饪器具和使用感应加热器的米饭烹饪机
公开(公告)号：JP2003339166A
公开(公告)日：2003-11-28
申请号：JP2002144228
申请日：2002-05-20
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： ASADA KAZUHIKO , OMORI HIDEKI , YAMASHITA HIDEKAZU , OGAWA MASANORI , KITAHATA MAKOTO , OSAGATA NOBUYOSHI , TAWARA TETSUYA , NOBORI KAZUHIRO
IPC分类号： H05B6/12 , A47J27/00 , H02M7/48 , H05B6/06
摘要： PROBLEM TO BE SOLVED: To provide an induction heater having low loss, high efficiency and a simple configuration, an induction heating appliance and a rice cooker. SOLUTION: A bidirectional switching element 23 and a drive circuit 24 are parallel-connected to a series circuit formed of a heating coil 21 and a resonance capacitor 22, a choke coil 29 is arranged between the bidirectional switching element 23 and an AC power supply 25, and performing induction heating, without generating loss in being rectified into a DC current. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供具有低损耗，高效率和简单配置的感应加热器，感应加热设备和电饭煲。解决方案：双向开关元件23和驱动电路24并联连接到由加热线圈21和谐振电容器22形成的串联电路，扼流线圈29设置在双向开关元件23和AC之间电源25，并进行感应加热，而不会产生被整流为直流电流的损耗。版权所有（C）2004，JPO

63. 发明专利

JP2003332563A Semiconductor element and method for manufacturing the same 有权
标题翻译：半导体元件及其制造方法
公开(公告)号：JP2003332563A
公开(公告)日：2003-11-21
申请号：JP2002141842
申请日：2002-05-16
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： UCHIDA MASAO , KITAHATA MAKOTO , MIYANAGA RYOKO , TAKAHASHI KUNIMASA , KUSUMOTO OSAMU , YAMASHITA MASAYA
IPC分类号： C23C16/42 , H01L21/205 , H01L29/47 , H01L29/861 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a silicon carbide semiconductor element operable even when displacement or micro-pipe or the like is contained. SOLUTION: At the time of forming an epitaxial layer 12 on a silicon carbide substrate 11, a growth condition is selected so that the upper part of a micro- pipe 18 existing in the silicon carbide substrate 11 can be filled. There is a case that the micro-pipe 18 is not filled in the silicon carbide substrate 11, and that a failure 19 succeeding the micro-pipe 18 is grown in the epitaxial layer 12 in accordance with the shape of the micro-pipe 18 or the selected growth condition. In that case, the failure 19 is buried in the middle of the growth so as not to be grown to the upper face of the epitaxial layer 12. Then, a shot key electrode 14 and an upper electrode 16 are formed on the epitaxial layer 12, and an ohmic electrode 15 and a lower electrode 17 are formed under the silicon carbide substrate 11. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供即使在容纳位移或微管等时也可操作的碳化硅半导体元件。解决方案：在碳化硅衬底11上形成外延层12时，选择生长条件使得可以填充存在于碳化硅衬底11中的微管18的上部。存在微管18未填充在碳化硅衬底11中的情况，并且随着微管18的形状而在外延层12中生长随后的微管18的故障19，或者选择的生长条件。在这种情况下，故障19被埋在生长的中间，以便不生长到外延层12的上表面。然后，在外延层12上形成射击键电极14和上电极16 ，并且在碳化硅衬底11之下形成欧姆电极15和下电极17.版权所有（C）2004，JPO

64. 发明专利

JP2003332238A Method and device for forming semiconductor film 审中-公开
标题翻译：用于形成半导体膜的方法和装置
公开(公告)号：JP2003332238A
公开(公告)日：2003-11-21
申请号：JP2002142423
申请日：2002-05-17
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： TAKAHASHI KUNIMASA , UCHIDA MASAO , KUSUMOTO OSAMU , YAMASHITA MASAYA , KITAHATA MAKOTO
IPC分类号： H01L21/205
摘要： PROBLEM TO BE SOLVED: To provide a method by which an SiC thin film can be formed easily, safely, and highly reproducibly by using a simple device, and to provide a device for forming the SiC thin film. SOLUTION: Two SiC substrates are set up in heating equipment by bonding the substrates to each other and heated to 1,300-2,000°C in an argon atmosphere. Since no dangerous gas is used, the SiC thin film can be formed safely on one of the SiC substrates by using a simple facility. In addition, an SiC semiconductor element can be manufactured inexpensively by using the SiC thin film. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种通过使用简单的装置可以容易地，安全地和高度再现地形成SiC薄膜的方法，并提供一种用于形成SiC薄膜的器件。解决方案：在加热设备中通过将基板彼此粘合并在氩气气氛中加热至1,300-2,000℃来设置两个SiC基板。由于不使用危险气体，所以可以通过简单的设备在SiC衬底之一上安全地形成SiC薄膜。此外，可以通过使用SiC薄膜廉价地制造SiC半导体元件。版权所有（C）2004，JPO

65. 发明专利

JP2003303966A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2003303966A
公开(公告)日：2003-10-24
申请号：JP2002108757
申请日：2002-04-11
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KUSUMOTO OSAMU , KITAHATA MAKOTO , UCHIDA MASAO , TAKAHASHI KUNIMASA , YAMASHITA MASAYA , MIYANAGA RYOKO
IPC分类号： H01L21/28 , H01L21/329 , H01L21/336 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/861 , H01L29/872
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a high breakdown voltage and a low resistance, and its fabricating method. SOLUTION: A part of an Si substrate 1 located in a first region Re1 is removed selectively by sand blasting to set the thickness of a second region Re2 at 400 μm and the thickness of a recess, i.e., the first region Re1, at 200 μm. An n-epitaxial layer 3 is formed on the side of the Si substrate 1 opposite to the recessed side. The n-epitaxial layer 3 is partially implanted with ions to form a p well 4 and a source region 5. A gate insulation film 6, a gate electrode 9, a source electrode 8 and a drain electrode 7 are formed such that the first region Re1 of the Si substrate 1 and the n-epitaxial layer 3 becomes an operating region. Sheet resistance can be decreased in the first region Re1 of the Si substrate 1 because the operating region is thick and a mechanical strength can be held in the second region Re2. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供具有高击穿电压和低电阻的半导体器件及其制造方法。解决方案：通过喷砂选择性地去除位于第一区域Re1中的Si衬底1的一部分，以将第二区域Re2的厚度设定为400μm，并且凹部的厚度即第一区域Re1，在200μm。在Si衬底1的与凹入侧相反的一侧上形成n外延层3。 n外延层3部分地注入离子以形成p阱4和源极区5.栅极绝缘膜6，栅极9，源电极8和漏电极7形成为使得第一区域Re1 的Si衬底1和n外延层3成为工作区域。由于操作区域较厚，并且在第二区域Re2中保持机械强度，因此在Si衬底1的第一区域Re1中可以减小薄层电阻。版权所有（C）2004，JPO

66. 发明专利

JP2003174175A SEMICONDUCTOR DEVICE AND ITS MANUFACTURING METHOD 审中-公开
公开(公告)号：JP2003174175A
公开(公告)日：2003-06-20
申请号：JP2001370953
申请日：2001-12-05
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： UCHIDA MASAO , KITAHATA MAKOTO , MIYANAGA RYOKO , TAKAHASHI KUNIMASA , KUSUMOTO OSAMU , YAMASHITA MASAYA
IPC分类号： H01L29/872 , H01L21/265 , H01L29/47
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device using SiC and its manufacturing method which hardly brings about the breakdown voltage reduction or block breakdown. SOLUTION: The method comprises steps of forming an n-type SiC semiconductor layer 2 with a semiconductor layer central part 3 and a semiconductor layer peripheral part 5 on a semiconductor substrate 1, implanting the upside of the semiconductor layer peripheral part with a p-type impurity to form an impurity-implanted layer 6, forming an Ohmic electrode 7 beneath the substrate 1, forming an Ni - electrode body 8 on the semiconductor layer central part, and forming an Al electrode cover 9 covering the electrode body 8 and extending onto a part of the impurity-implanted layer. COPYRIGHT: (C)2003,JPO

67. 发明专利

JP2003060193A Semiconductor device and manufacturing method therefor 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2003060193A
公开(公告)日：2003-02-28
申请号：JP2002157375
申请日：2002-05-30
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： UCHIDA MASAO , KITAHATA MAKOTO , YOKOGAWA TOSHIYA , KUSUMOTO OSAMU , TAKAHASHI KUNIMASA , MIYANAGA RYOKO , YAMASHITA MASAYA
IPC分类号： H01L29/872 , H01L21/265 , H01L29/47
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device that functions as a Schottky diode, etc., utilizing an SiC layer with little leakage current. SOLUTION: The Schottky diode 10 is provided with a 4H-SiC semiconductor substrate 11, an epitaxially grown 4H-SiC layer 12, and an ion-implanted layer 13. The diode 10 is also provided with a Schottky electrode 14, an ohmic electrode 15, and an insulator layer 16 composed of a thermally oxidized film. Since the Schottky electrode 14 and insulator layer 16 are separated from each other with a clearance 17 in between, no decomposed layer occurs. Consequently, break of elements and leakage currents can be suppressed.
摘要翻译：要解决的问题：提供一种利用少量漏电流的SiC层作为肖特基二极管等的半导体器件。解决方案：肖特基二极管10设置有4H-SiC半导体衬底11，外延生长的4H-SiC层12和离子注入层13.二极管10还设置有肖特基电极14，欧姆电极15 ，以及由热氧化膜构成的绝缘体层16。由于肖特基电极14和绝缘体层16之间具有间隙17而彼此分离，所以不会发生分解层。因此，可以抑制元件的断裂和漏电流。

68. 发明专利

JP2002134561A SEMICONDUCTOR MOUNTING METHOD 失效
公开(公告)号：JP2002134561A
公开(公告)日：2002-05-10
申请号：JP2000327884
申请日：2000-10-27
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： SAKAI YOSHINORI , NOBORI KAZUHIRO , KITAHATA MAKOTO
IPC分类号： H01L21/60
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor mounting method that can align each mounting position of a semiconductor with a circuit board and can confirm the bonding condition after the mounting briefly and easily. SOLUTION: By using a transparent body of silicon carbide as the substrate of a semiconductor 6 in exchange for conventional opaque silicon, positioning confirmation marks 6a, 2a of the semiconductor 6 and the circuit board 2 respectively become visible at a time from one direction. Hereby, since not only the periphery of a bump but also whole bonded area is visible, it is possible to bond or modify by ultraviolet light or laser light.

69. 发明专利

JP2002118268A SEMICONDUCTOR ELEMENT AND WIRING METHOD THEREOF 失效
公开(公告)号：JP2002118268A
公开(公告)日：2002-04-19
申请号：JP2000308756
申请日：2000-10-10
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： UCHIDA MASAO , KITAHATA MAKOTO , TAKAHASHI KUNIMASA , YOKOGAWA TOSHIYA , KUSUMOTO OSAMU , YAMASHITA MASAYA
IPC分类号： H01L29/872 , H01L21/60 , H01L29/47
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor element exhibiting a desired breakdown strength even after wire bonding to a Schottky electrode, and a wiring method of the semiconductor element. SOLUTION: The semiconductor element has such a structure as a plurality of Schottky electrodes 16 are isolated by an insulator 15 on the contact face with a semiconductor 11. Since an upper electrode 17 deposited on the insulator 15 is wire bonded, a desired breakdown strength is attained even after wire bonding.

70. 发明专利

JP2001110746A FORMATION METHOD OF ELECTRODE OF SILICON CARBIDE AND SEMICONDUCTOR ELEMENT 失效
公开(公告)号：JP2001110746A
公开(公告)日：2001-04-20
申请号：JP28953099
申请日：1999-10-12
申请人： MATSUSHITA ELECTRIC IND CO LTD
发明人： UCHIDA MASAO , KITAHATA MAKOTO , TAKAHASHI KUNIMASA , UENOYAMA TAKESHI
IPC分类号： H01L21/28 , H01L29/43
摘要： PROBLEM TO BE SOLVED: To obtain a satisfactory ohmic contact on the rear surface of a substrate by implanting ions into silicon carbide grown on the rear surface or removing the silicon carbide grown on the rear surface. SOLUTION: Ion implanation is performed on the rear-surface silicon carbide 23, which is grown simultaneously on the rear surface of a substrate 21 at the time of growing silicon carbide 22 on the front surface of the substrate 21, and an ohmic electrode 26 is formed on the ion-implanted layer 24.

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