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1. 发明专利

JP2006210818A Semiconductor element and its manufacturing method 审中-公开
标题翻译：半导体元件及其制造方法
公开(公告)号：JP2006210818A
公开(公告)日：2006-08-10
申请号：JP2005023755
申请日：2005-01-31
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAMASHITA MASAYA , KITAHATA MAKOTO , KUSUMOTO OSAMU , TAKAHASHI KUNIMASA , UCHIDA MASAO , MIYANAGA RYOKO , HASHIMOTO KOICHI
IPC分类号： H01L21/318 , H01L21/28 , H01L21/283 , H01L21/336 , H01L21/822 , H01L27/04 , H01L29/12 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor element which has high channel mobility and a method in which such a semiconductor element can be manufactured through a practical process with superior mass-productivity.
SOLUTION: The manufacturing method includes a step of forming an oxide layer 11 on a silicon carbide layer 3 (A), and a step of forming a nitride-containing oxide layer 12 by subjecting the oxide layer 11 to nitrogen processing and thus incorporating nitrogen in the oxide layer 11 (B). The nitrogen processing includes a step of exposing the surface of the nitrogen layer 11 to nitrogen-containing gas prepared, by diluting gas containing at least one of nitrogen oxide gas and ammonium gas with inert gas having smaller molecular weight than argon at a temperature of 1,100 to 1,300°C.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种具有高通道迁移率的半导体元件以及通过实际工艺制造这种半导体元件的方法，其具有优异的批量生产率。解决方案：制造方法包括在碳化硅层3（A）上形成氧化物层11的步骤，以及通过对氧化物层11进行氮处理形成含氮化物的氧化物层12的步骤在氧化物层11（B）中掺入氮。氮处理包括将氮层11的表面暴露于含氮气体的步骤，通过在1100℃的温度下稀释含有比氩气分子量小的惰性气体的氮氧化物气体和铵气体中的至少一种的气体至1300℃。版权所有（C）2006，JPO＆NCIPI

2. 发明专利

JP2006073775A Semiconductor apparatus and module using the same 审中-公开
标题翻译：半导体器件和使用它的模块
公开(公告)号：JP2006073775A
公开(公告)日：2006-03-16
申请号：JP2004255070
申请日：2004-09-02
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KITAHATA MAKOTO , KUSUMOTO OSAMU , UCHIDA MASAO , TAKAHASHI KUNIMASA , YAMASHITA MASAYA , HASHIMOTO KOICHI , MIYANAGA RYOKO
IPC分类号： H01L29/78 , H01L27/04 , H01L29/12 , H01L31/12
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor apparatus which is used for an inverter device or the like and can be reduced in size, and to provide a module using the same. SOLUTION: The semiconductor apparatus is equipped with a switching element 15H which is provided with a first electrode 22, a second electrode 25, a control electrode 23 and a first semiconductor region that is formed of a wide-band gap semiconductor, interposed between the first electrode 22 and the second electrode 25, and turns conductive or non-conductive responding to signals inputted into the control electrode 23; and a photodiode 21 which is composed of a cathode-side electrode 21b electrically connected to the first electrode 22, an anode-side electrode 21a electrically connected to the control electrode 23, and a second semiconductor region formed of a wide-band gap semiconductor. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种用于逆变器装置等并可以减小尺寸的半导体装置，并提供使用该半导体装置的模块。解决方案：半导体装置配备有开关元件15H，开关元件15H设置有第一电极22，第二电极25，控制电极23和由宽带隙半导体形成的第一半导体区域，插入在第一电极22和第二电极25之间，响应于输入到控制电极23的信号而导通或不导通; 以及由与第一电极22电连接的阴极侧电极21b，与控制电极23电连接的阳极侧电极21a和由宽带隙半导体形成的第二半导体区域构成的光电二极管21。版权所有（C）2006，JPO＆NCIPI

3. 发明专利

JP2005347680A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2005347680A
公开(公告)日：2005-12-15
申请号：JP2004168338
申请日：2004-06-07
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： MIYANAGA RYOKO , UCHIDA MASAO , TAKAHASHI KUNIMASA , KITAHATA MAKOTO , KUSUMOTO OSAMU , YAMASHITA MASAYA , HASHIMOTO KOICHI
IPC分类号： H01L21/28 , H01L21/336 , H01L29/12 , H01L29/423 , H01L29/49 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of controlling an appropriate threshold voltage while raising a channel mobility of a MISFET, and a method of manufacturing the semiconductor device.
SOLUTION: In a MISFET 100, a first gate layer 17 contacting with at least a gate insulating layer 16 of a gate electrode 101 includes carbon.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供能够在提高MISFET的沟道迁移率的同时控制适当的阈值电压的半导体器件，以及制造半导体器件的方法。解决方案：在MISFET 100中，与栅极101的至少栅极绝缘层16接触的第一栅极层17包括碳。版权所有（C）2006，JPO＆NCIPI

4. 发明专利

JP2005166930A Sic-misfet and its manufacturing method 审中-公开
标题翻译： SIC-MISFET及其制造方法
公开(公告)号：JP2005166930A
公开(公告)日：2005-06-23
申请号：JP2003403296
申请日：2003-12-02
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KUSUMOTO OSAMU , UCHIDA MASAO , YAMASHITA MASAYA , KITAHATA MAKOTO , TAKAHASHI KUNIMASA , MIYANAGA RYOKO
IPC分类号： H01L21/265 , H01L21/336 , H01L29/12 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide an SiC-MISFET and its manufacturing method in which there is no difference in FET characteristics from a difference in a channel direction with respect to a macro-step, and a current drive capability is high. SOLUTION: SiC exposed on a substrate is oxidized by thermal oxidization to form a gate insulating film 9 composed of a silicon oxide film. In a gas atmosphere composed of a compound of oxygen and nitride, a substrate temperature is set to, for example, 1,100°C, to anneal in one hour. At that time, the substrate is shifted to the inside of a chamber to which a pressure reducing device is attached, and the inside of the chamber is reduced in pressure, while a gas containing group V elements such as an NO gas or the like is made to flow into the chamber, to heat the inside of the chamber up to a high temperature (about 1,100°C) enough to diffuse the group V elements such as nitride or the like into the oxide film. At this time, the oxide film is exposed to the gas containing the group V elements such as nitride or the like under a reduced pressure, whereby the group V elements such as nitride or the like are diffused into the oxide film, to form the gate insulating film 9 containing the more minute group V elements with a large relative dielectric constant. COPYRIGHT: (C)2005,JPO&NCIPI
摘要翻译：要解决的问题：提供一种SiC-MISFET及其制造方法，其中FET特性与通过宏观步长的通道方向的差异没有差异，并且电流驱动能力高。解决方案：通过热氧化将暴露于衬底上的SiC氧化，形成由氧化硅膜构成的栅绝缘膜9。在由氧化物和氮化物组成的气体气氛中，将衬底温度设定为例如1100℃，在1小时内退火。此时，基板被移动到附接有减压装置的室的内部，并且室内部的压力降低，而含有V族元素（例如NO气体等）的气体是使其流入室中，以将室内的内部加热至足以将V族元素（例如氮化物等）扩散到氧化物膜中的高温（约1100℃）。此时，氧化膜在减压下暴露于含有V族元素如氮化物等的气体，由此将诸如氮化物等的V族元素扩散到氧化物膜中，形成栅极绝缘膜9含有较大的相对介电常数的V族元素。版权所有（C）2005，JPO＆NCIPI

5. 发明专利

JP2004304174A Silicon carbide semiconductor device and method of manufacturing the same 有权
公开(公告)号：JP2004304174A
公开(公告)日：2004-10-28
申请号：JP2004074147
申请日：2004-03-16
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KUSUMOTO OSAMU , KITAHATA MAKOTO , TAKAHASHI KUNIMASA , YAMASHITA MASAYA , MIYANAGA RYOKO , UCHIDA MASAO
IPC分类号： H01L21/28 , H01L21/337 , H01L21/338 , H01L29/12 , H01L29/78 , H01L29/80 , H01L29/808 , H01L29/812
摘要： PROBLEM TO BE SOLVED: To enhance the reliability by improving the adhesion between an electrode and an interlayer dielectric in a semiconductor device, using silicon carbide. SOLUTION: The semiconductor device is provided with a silicon carbide substrate 1, an n-type high-resistance layer 2, a well region 3 provided on the surface of the high resistive layer 2, a P+ contact region 4 provided in the well region 3, a source region 5 provided on both side of the P+ contact region 4 in the well region 3, a first source electrode 8 provided on the source region 5 and made of nickel, a second source electrode 9 covering the first source electrode 8 and made of aluminum, a gate insulating film 6 provided on the high resistive layer 2 inserted into the two well regions 3, a gate electrode 10 made of aluminum, and an interlayer dielectric 11 covering the second source electrode 9 and the gate electrode 10 and consisting of silicone oxide film. Since the second source electrode 9 has higher adhesion with respect to the interlayer dielectric 11 than to the first source electrode 8, the interlayer dielectric 11 and source electrode becomes unlikely to peel off. COPYRIGHT: (C)2005,JPO&NCIPI

6. 发明专利

JP2004022878A Semiconductor device and its manufacturing process 审中-公开
公开(公告)号：JP2004022878A
公开(公告)日：2004-01-22
申请号：JP2002177080
申请日：2002-06-18
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： UCHIDA MASAO , KITAHATA MAKOTO , MIYANAGA RYOKO , TAKAHASHI KUNIMASA , KUSUMOTO OSAMU , YAMASHITA MASAYA
IPC分类号： H01L29/872 , H01L21/329 , H01L21/336 , H01L29/12 , H01L29/47 , H01L29/78 , H01L29/861
CPC分类号： H01L2224/32245 , H01L2224/48091 , H01L2224/48247 , H01L2224/48472 , H01L2224/73265 , H01L2924/00014 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device and its manufacturing process in which ON resistance is further decreased using an SiC substrate.
SOLUTION: The semiconductor device is polished to have a thickness of 200 μm or less and comprises the SiC substrate 11a having an upper surface of a (000-1)C face, an epitaxial growth layer 12, a Schottky electrode 14 and an upper electrode 16 provided sequentially on the upper surface of the SiC substrate 11a, and an ohmic electrode 15 and a lower electrode 17 provided sequentially on the Si face, i.e. the rear surface of the SiC substrate 11a. Since the SiC substrate 11a is thinner than a conventional substrate, on-resistance is greatly decreased in operation.
COPYRIGHT: (C)2004,JPO

7. 发明专利

JP2003282946A Light emitting diode unit and its manufacturing method 审中-公开
标题翻译：发光二极管单元及其制造方法
公开(公告)号：JP2003282946A
公开(公告)日：2003-10-03
申请号：JP2003029010
申请日：2003-02-06
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KAMIYAMA SATOSHI , YOSHII SHIGEO , MIYANAGA RYOKO , NISHIKAWA KOJI , SAITO TORU , SASAI YOICHI
IPC分类号： H01L33/06 , H01L33/10 , H01L33/14 , H01L33/28 , H01L33/32 , H01L33/38 , H01L33/40 , H01L33/00
摘要： PROBLEM TO BE SOLVED: To raise an external quantum efficiency and productivity in a short wavelength light emitting diode unit. SOLUTION: The light emitting diode unit comprises a reflecting layer 14 having a Bragg reflector structure, a first clad layer 15 made of an n-type ZnMgSSe, a quantum well active layer 17 made of a Zn 1-x Cd x Se, a second clad layer 19 made of a p-type ZnMgSSe, and a contact layer 22 sequentially stacked and formed on a substrate 11 made of an n-type GaAs. Schottky electrode 23 for a pad made of Al having a potential barrier of 0.3 eV or more is provided for the layer 22 on the upper surface of the layer 22, a p-side ohmic electrode 24 for passing an emitted light is formed on the overall surface including the electrode 23 on the upper surface of the layer 22. An n-side ohmic electrode 25 is formed on a rear surface of a crystal grown surface of the substrate 11. COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提高短波长发光二极管单元中的外部量子效率和生产率。解决方案：发光二极管单元包括具有布拉格反射器结构的反射层14，由n型ZnMgSSe制成的第一覆层15，由ZnS 1-x制成的量子阱活性层17 Se，Se，Sb，Se，由p型ZnMgSSe制成的第二覆盖层19，以及依次层叠并形成在由n型GaAs构成的衬底11上的接触层22。在层22的上表面上的层22设置用于具有0.3eV以上的势垒的由Al制成的焊盘的肖特基电极23，在整体上形成用于通过发光的p侧欧姆电极24 表面包括在层22的上表面上的电极23.在衬底11的晶体生长表面的后表面上形成n侧欧姆电极25.版权所有（C）2004，JPO

8. 发明专利

JP2006196494A Electrical equipment 审中-公开
标题翻译：电子设备
公开(公告)号：JP2006196494A
公开(公告)日：2006-07-27
申请号：JP2005003469
申请日：2005-01-11
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： KITAHATA MAKOTO , KUSUMOTO OSAMU , UCHIDA MASAO , TAKAHASHI KUNIMASA , YAMASHITA MASAYA , MIYANAGA RYOKO , HASHIMOTO KOICHI
IPC分类号： H01L23/36
CPC分类号： H01L2224/48137 , H01L2224/73265 , H01L2924/12032 , H01L2924/1301 , H01L2924/13055 , H01L2924/13091 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide electrical equipment where efficiency of heat transfer design using a semiconductor module is made high by installing the semiconductor module using a wide band gap semiconductor to a member heated to a range of 90°C to 400°C. SOLUTION: Electrical equipment 130 is provided with the semiconductor module 110 using the wide band gap semiconductor and a member to be heated 13 used in the temperature range of 90°C to 400°C. The semiconductor module 110 is installed on the member to be heated 13 which is heated to the temperature range. Thus, the semiconductor module 110 is heated. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了提供使用半导体模块的传热设计效率高的电气设备，其通过使用宽带隙半导体将半导体模块安装到加热到90℃至400℃的范围的构件 C。解决方案：电气设备130使用宽带隙半导体和在90℃至400℃的温度范围内使用的待加热构件13设置半导体模块110。将半导体模块110安装在被加热到该温度范围的构件13上。因此，半导体模块110被加热。版权所有（C）2006，JPO＆NCIPI

9. 发明专利

JP2006120897A Silicon carbide element and its manufacturing method 审中-公开
标题翻译：硅碳元素及其制造方法
公开(公告)号：JP2006120897A
公开(公告)日：2006-05-11
申请号：JP2004307883
申请日：2004-10-22
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： TAKAHASHI KUNIMASA , KITAHATA MAKOTO , KUSUMOTO OSAMU , UCHIDA MASAO , YAMASHITA MASAYA , MIYANAGA RYOKO , HASHIMOTO KOICHI
IPC分类号： H01L21/336 , H01L21/205 , H01L29/12 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To restrain the deterioration of element characteristics caused due to basal plane dislocation, existing in the semiconductor substrate, in a semiconductor element.
SOLUTION: The semiconductor element comprises the semiconductor substrate 11, a semiconductor layer 20 formed on the surface of the semiconductor substrate 11, a gate insulating film 16 formed on the semiconductor layer 20, and a gate electrode 19 insulated from the semiconductor layer 20 via the gate insulating film 16. Density of the basal plane dislocation is ≥10
4 cm
-2 in the semiconductor substrate 11, and the density of the basal plane dislocation is ≤10
3 cm
-2 at a portion on the surface of the semiconductor layer 20 facing the gate electrode 19.
COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：为了抑制在半导体元件中存在于半导体衬底中的由于基底位错引起的元件特性的劣化。解决方案：半导体元件包括半导体衬底11，形成在半导体衬底11的表面上的半导体层20，形成在半导体层20上的栅极绝缘膜16和与半导体层绝缘的栅电极19 通过栅极绝缘膜16.半导体衬底11中的基面位错的密度为≥10 4 cm -2 ，并且基面位错的密度为在半导体层20的与栅极电极19相对的表面上的部分，≤10 3 cm -2 。版权所有（C）2006，JPO＆NCIPI

10. 发明专利

JP2006066438A Semiconductor device and its manufacturing method 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2006066438A
公开(公告)日：2006-03-09
申请号：JP2004243852
申请日：2004-08-24
申请人： Matsushita Electric Ind Co Ltd , 松下電器産業株式会社
发明人： YAMASHITA MASAYA , KITAHATA MAKOTO , KUSUMOTO OSAMU , TAKAHASHI KUNIMASA , UCHIDA MASAO , MIYANAGA RYOKO , HASHIMOTO KOICHI
IPC分类号： H01L29/78 , H01L21/336 , H01L29/12
CPC分类号： H01L29/7828 , H01L29/66666
摘要： PROBLEM TO BE SOLVED: To provide a high reliability semiconductor device by improving the insulating breakdown voltage in a gate insulating film. SOLUTION: The semiconductor device is provided with a second semiconductor layer 44 formed on a first semiconductor layer 42, a gate electrode 53 which is electrically insulated from the first semiconductor layer 42, a source electrode 51, a drain electrode 55, a gate insulating film 49, a second conductivity-type source region 47 in which at least a part is formed in a first conductivity-type well region 45 and which is electrically brought into contact with the source electrode 51, and a drift region 43. A prescribed region in the second semiconductor layer 44 is an accumulation channel region, including a second conductive layer. It is formed inside the well region 45 and has an auxiliary source region 48 which is brought into contact with the source region 47; the source region 47 is not overlapped by the gate electrode 53; and a part of the auxiliary source region 48 is overlapped by the gate electrode 53. The total dose amount of the auxiliary source region 48 is smaller than that of the source region 47. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：通过提高栅极绝缘膜中的绝缘击穿电压来提供高可靠性的半导体器件。解决方案：半导体器件设置有形成在第一半导体层42上的第二半导体层44，与第一半导体层42电绝缘的栅电极53，源电极51，漏电极55，栅极绝缘膜49，第二导电型源极区47，其中至少一部分形成在第一导电类型阱区45中，并且与源电极51电接触;以及漂移区43.A 第二半导体层44中的规定区域是包括第二导电层的堆积沟道区域。形成在阱区45的内部，并具有与源极区域47接触的辅助源极区域48; 源极区域47不与栅电极53重叠; 并且辅助源极区域48的一部分与栅电极53重叠。辅助源极区域48的总剂量量小于源极区域47的总剂量。（C）2006，JPO和NCIPI

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