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52. 发明专利

JP2002373975A Method for manufacturing ferroelectric memory cell and ferroelectric memory cell 审中-公开
标题翻译：用于制造电介质存储单元和电介质存储单元的方法
公开(公告)号：JP2002373975A
公开(公告)日：2002-12-26
申请号：JP2002131446
申请日：2002-05-07
申请人： Hynix Semiconductor Inc , 株式会社ハイニックスセミコンダクター
发明人： KWEON SOON-YOUNG
IPC分类号： H01L27/105 , H01L21/02 , H01L21/28 , H01L21/768 , H01L21/8246 , H01L27/115
CPC分类号： H01L21/76855 , H01L21/7687 , H01L27/11502 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： PROBLEM TO BE SOLVED: To provide a method for manufacturing a ferroelectric memory cell for preventing oxidation of a barrier film of a laminated plug by crystallization heat treatment of a ferroelectric thin film, and to provide the ferroelectric memory cell. SOLUTION: The method for manufacturing the ferroelectric memory cell comprises a step of forming a transistor having a source/drain region 33 on a front layer of a semiconductor substrate 31, a step of forming an interlayer insulating film 34 on the substrate 31 including the transistor, a step of forming a contact hole by etching the film 34, a step of forming a laminated plug by laminating a plug film 35 and a barrier film 36a in the contact hole, a step of growing a conductive layer 38 on an upper surface of the plug and the film 34, a step of forming a capping conductive film 39 covering the upper surface of at least the laminated plug by etching the layer 38 so that a sidewall in inclined, and a step of sequentially forming a lower electrode 40, a ferroelectric thin film 41, and an upper electrode 42 on the surface of the film 39 and on the upper surface of the film 34.
摘要翻译：要解决的问题：提供一种用于通过铁电薄膜的结晶热处理来防止层压塞的阻挡膜的氧化的铁电存储单元的制造方法，并提供铁电存储单元。解决方案：制造铁电存储单元的方法包括在半导体衬底31的前层形成具有源极/漏极区33的晶体管的步骤，在包括晶体管的衬底31上形成层间绝缘膜34的步骤，通过蚀刻膜34形成接触孔的步骤，通过在接触孔中层叠塞子膜35和阻挡膜36a来形成层叠塞子的步骤，在导电层38的上表面上生长导电层38的步骤插塞和薄膜34，通过蚀刻层38形成覆盖至少层压塞的上表面的封盖导电膜39的步骤，使得侧壁倾斜，并且顺序地形成下电极40的步骤铁膜薄膜41和薄膜39的表面上的上部电极42。

54. 发明专利

JP5801221B2 半導体装置の製造方法および半導体装置有权
公开(公告)号：JP5801221B2
公开(公告)日：2015-10-28
申请号：JP2012036377
申请日：2012-02-22
申请人：株式会社東芝
发明人：北村政幸 , 坂田敦子 , 和田真 , 山崎雄一 , 片桐雅之 , 梶田明広 , 酒井忠司 , 佐久間尚志 , 水島一郎
IPC分类号： H01L21/768 , H01L23/532 , H01L21/285 , H01L21/28 , C23C16/26 , H01L21/3205
CPC分类号： H01L21/76846 , H01L21/02373 , H01L21/76855 , H01L21/76858 , H01L21/76861 , H01L21/76876 , H01L23/53276 , H01L2221/1089 , H01L2924/0002 , H01L2924/00

55. 发明专利

JP5712058B2 半導体装置の製造方法有权
公开(公告)号：JP5712058B2
公开(公告)日：2015-05-07
申请号：JP2011124801
申请日：2011-06-03
申请人：ルネサスエレクトロニクス株式会社
发明人：三浦辰彦
IPC分类号： H01L21/683 , C23C14/34
CPC分类号： H01L21/68764 , C23C14/34 , C23C14/352 , H01L21/28512 , H01L21/6719 , H01L21/67748 , H01L21/68735 , H01L21/68771 , H01L21/68785 , H01L21/76855 , H01L29/456 , H01L29/66727 , H01L29/66734 , H01L29/7813

57. 发明专利

JP5568845B2 A method of manufacturing a semiconductor device 有权
公开(公告)号：JP5568845B2
公开(公告)日：2014-08-13
申请号：JP2008172166
申请日：2008-07-01
申请人：富士通セミコンダクター株式会社
发明人：直也佐次田
IPC分类号： H01L27/105 , H01L21/8246
CPC分类号： H01L21/76883 , H01L21/2855 , H01L21/76822 , H01L21/76826 , H01L21/76846 , H01L21/76849 , H01L21/76855 , H01L21/76856 , H01L21/7687 , H01L27/11507 , H01L28/55 , H01L28/75
摘要： A semiconductor device includes an insulating film provided over a semiconductor substrate, a conductive plug buried in the insulating film, an underlying conductive film which is provided on the conductive plug and on the insulating film and which has a flat upper surface, and a ferroelectric capacitor provided on the underlying conductive film. At least in a region on the conductive plug, the concentration of nitrogen in the underlying conductive film gradually decreases from the upper surface to the inside.

60. 发明专利

JP2012156451A Semiconductor device and method of manufacturing the same 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2012156451A
公开(公告)日：2012-08-16
申请号：JP2011016488
申请日：2011-01-28
申请人： Elpida Memory Inc , エルピーダメモリ株式会社
发明人： FUKUSHIMA YOICHI
IPC分类号： H01L23/522 , H01L21/768 , H01L21/8242 , H01L27/108
CPC分类号： H01L27/10855 , H01L21/76847 , H01L21/76855 , H01L21/76897 , H01L27/10814 , H01L27/10894
摘要： PROBLEM TO BE SOLVED: To reduce the contact resistance by forming a metal silicide layer of sufficient thickness on the interface of a polycrystalline silicon plug and an overlying conductor plug.SOLUTION: After a polycrystalline silicon plug is formed, germanium ions are implanted through the surface of the polycrystalline silicon plug to obtain a polycrystalline silicon 16G containing germanium. Subsequently, a metal silicide layer 19 is formed by depositing a metal film which can be silicided, and then a conductor film (a barrier film 20, a W film 21) is formed on the metal silicide 19.

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