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51. 发明专利

JPS5937494B2 JPS5937494B2 - 失效
公开(公告)号：JPS5937494B2
公开(公告)日：1984-09-10
申请号：JP6233477
申请日：1977-05-27
申请人： Mitsubishi Electric Corp
发明人： TSUKAMOTO KATSUHIRO
IPC分类号： H01L21/027 , G03F7/20 , G03F7/26 , H01L21/302 , H01L21/3065
CPC分类号： G03F7/2022

52. 发明专利

JPS59132663A Transistor 失效
标题翻译：晶体管
公开(公告)号：JPS59132663A
公开(公告)日：1984-07-30
申请号：JP828283
申请日：1983-01-19
申请人： Mitsubishi Electric Corp
发明人： TSUKAMOTO KATSUHIRO , HARADA HIROJI
IPC分类号： H01L27/04 , H01L21/331 , H01L21/822 , H01L29/47 , H01L29/72 , H01L29/73 , H01L29/872
CPC分类号： H01L29/72
摘要： PURPOSE:To improve the performance of high speed action of a transistor by reducing the base resistance by a method wherein the distance between a base contact and an emitter contact is decreased regardless of the minimum interval of an electrode wiring. CONSTITUTION:At the base contact B, the part 11 opposed to the emitter is not covered with the electrode wiring and is so formed as to contact a Pt silicide 9 at a part 12 away from the emitter contact E. Since the exposed part 11 is connected by means of the Pt silicide 9 of a small resistance value, the base resistance rbb' is proportional to the distance between the parts 8 and 12. Thus, the base resistance can be remarkably reduced, and the high speed performance of the transistor element improved, by reducing the distance L to the minimum dimension determined by a photoengraving technique, regardless of the minimum interval (s) of the electrode wiring.
摘要翻译：目的：通过降低基极电阻来提高晶体管的高速动作的性能，其中基极接触和发射极接触之间的距离与电极布线的最小间隔无关。构成：在基极触点B处，与发射极相对的部分11不被电极布线覆盖，并且形成为在远离发射极触点E的部分12处接触Pt硅化物9。由于暴露部分11是通过具有小电阻值的Pt硅化物9连接，基极电阻rbb'与部件8和12之间的距离成比例。因此，可以显着降低基极电阻，并且晶体管元件的高速性能通过将距离L减小到由照相雕刻技术确定的最小尺寸来改善，而不管电极布线的最小间隔如何。

53. 发明专利

JPS59110133A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS59110133A
公开(公告)日：1984-06-26
申请号：JP22227182
申请日：1982-12-15
申请人： Mitsubishi Electric Corp
发明人： TSUKAMOTO KATSUHIRO , SHIGETOMI AKIRA , WATAKABE YAICHIROU
IPC分类号： H01L21/68 , H01L21/3213 , H01L21/82 , H01L27/118
CPC分类号： H01L21/82
摘要： PURPOSE:To improve micro-miniaturization of elements and high performance by forming active elements to the one main surface of semiconductor substrate and forming position detection mark for delineating wiring pattern through the etching of metal film on insulating film having contact hole. CONSTITUTION:A position detecting mark 12 for direct exposure by beam is formed at a part of metal layer 11. The position detection mark 12 can be formed by aligning a pattern to the contact hole and then executing the etching. When the desired semiconductor device is wanted, first, the position detection mark is irradiated by beam for accurate alignment. A metal layer 11 for electrode wiring is obtained by direct exposure of electron beam or ion beam and moreover the desired wiring pattern is also obtained by direct delineation. A second and a third metal layers for wirings are also formed on the metal layer through insulating layer and a second and a third wiring patterns are formed by direct exposure of electron beam or ion beam.
摘要翻译：目的：通过在半导体基板的一个主表面上形成有源元件，通过在具有接触孔的绝缘膜上蚀刻金属膜来形成位置检测标记，来改善元件的微小型化和高性能化。构成：在金属层11的一部分处形成用于通过光束直接曝光的位置检测标记12.位置检测标记12可以通过将图案对准接触孔然后执行蚀刻来形成。当需要所需的半导体器件时，首先，通过光束照射位置检测标记以进行精确对准。通过电子束或离子束的直接曝光获得用于电极布线的金属层11，而且通过直接描绘获得所需的布线图案。用于布线的第二和第三金属层也通过绝缘层形成在金属层上，并且通过电子束或离子束的直接曝光形成第二和第三布线图案。

54. 发明专利

JPS5963731A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPS5963731A
公开(公告)日：1984-04-11
申请号：JP17554982
申请日：1982-10-04
申请人： Mitsubishi Electric Corp
发明人： KOTANI HIDEO , TSUKAMOTO KATSUHIRO
IPC分类号： H01L21/302
CPC分类号： H01L21/302
摘要： PURPOSE:To contrive to simplify the process, reduce the manufacturing cost, and improve the accuracy by a method wherein the relative position of a laser light put in photochemical reaction and a semiconductor substrate is adjusted by a computer, and an insulation film on the substrate in a reactive fluid atmosphere is etched with the laser light. CONSTITUTION:The reflection light of a positioning light 7 is detected 9 through a half mirror 8, and an X-Y table 6 is transferred by a signal of a controller 10. When a positioning conductive layer 5 comes to a position of the projection of the light 7, the reflection light is detected 9 and sent to the controller, and thus the position is detected. The laser light 7 is set up at a fixed position from the light 7, and then etches the insulation layer 3 at a required position into a required pattern by transfer-controlling the table 6 by the signal of the controller 10. When the substrate 1 is placed in e.g. CF3Br gas at 5.5Torr, and a CO2 laser pulse 11 of a width of 45nsec, 0.4J is applied to the insulation film 3, the CF3Br decomposes by photochemical reaction, thereby etching the SiO2. Or, the dipping of the substrate 1 in Br solution is effetive, and an etched pattern of a high accuracy can be obtained by both methods.
摘要翻译：目的：为了简化工艺，降低制造成本，并且通过以下方法提高精度，其中通过计算机调整放入光化学反应的激光的相对位置和半导体衬底以及衬底上的绝缘膜在反应性流体气氛中用激光蚀刻。构成：通过半反射镜8检测定位光7的反射光，并且通过控制器10的信号传送XY台6.当定位导电层5到达光的投影位置时如图7所示，检测到反射光9并发送到控制器，从而检测位置。将激光7从光7设置在固定位置，然后通过控制器10的信号传送控制台6，将所需位置的绝缘层3蚀刻成所需的图案。当基板1 被放置在例如在5.5Torr的CF3Br气体和宽度为45nsec的0.4J的CO2激光脉冲11施加到绝缘膜3上，CF 3 Br通过光化学反应分解，从而蚀刻SiO 2。或者，基板1在Br溶液中的浸渍是有效的，并且通过两种方法可以获得高精度的蚀刻图案。

55. 发明专利

JPS5895821A PARALLEL FLAT-PLATE TYPE PLASMA CVD METHOD 失效
公开(公告)号：JPS5895821A
公开(公告)日：1983-06-07
申请号：JP19470681
申请日：1981-11-30
申请人： MITSUBISHI ELECTRIC CORP
发明人： KOTANI HIDEO , YAKUSHIJI HISAO , TSUKAMOTO KATSUHIRO , HARADA HIROJI
IPC分类号： C23C16/505 , H01L21/205 , H01L21/31
摘要： PURPOSE:To obtain a smooth plasma CVD film having an excellent property of coating a staged part, by giving a sputtering effect with ions when the plasma CVD film is formed. CONSTITUTION:A plasma CVD film 2 is formed on a substrate 1 arranged on a parallel flat-plate electrode whereon a high-frequency power is impressed, by introducing a reactive gas and an inactive gas such as argon (Ar) under a reduced pressure and by supplying the high-frequency power to the electrode to generate plasma. On the surface of the above electrode, a cathode fall occurs, and thus active gas ions and inactive gas ions such as argon ions fall along a vertical electric field on the surfaces of the above electrode and a substrate 1. The energy of the ions thus falling is increased by reducing the pressure of gases and increasing a charged power, a sputtering phenomenon is thereby made to occur, and thus etching by the ions is performed simultaneously with the deposition by plasma CVD. In the case when a stage is formed beforehand on the substrate 1, the etching in the staged part is facilitated in comparison with that in a smooth part.

56. 发明专利

JPS5887818A THIN FILM FORMING METHOD 失效
公开(公告)号：JPS5887818A
公开(公告)日：1983-05-25
申请号：JP18728881
申请日：1981-11-19
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , WAKAMIYA WATARU , MIZUGUCHI KAZUO
IPC分类号： H05K3/16 , C23C14/22 , C23C14/24 , H01L21/205 , H01L21/28 , H01L21/31
摘要： PURPOSE:To form a thin film extremely excellent in adhesion, by a method wherein ions of the same substance as that constituting a deposited thin film or inert gas ions are implanted into the interface between a ground substrate and the thin film. CONSTITUTION:A desired-metal thin film 2 is deposited on the surface of a macromolecular film 1 by evaporation or sputtering. The thickness of the metal thin film is preferably on the order of 1,000-5,000Angstrom in consideration of the ion implantation in the subsequent step. Thereafter, ions of the same metallic substance as that constituting the metal thin film (e.g., aluminum ions) or inert gas ions 3 such as argon and xenon are implanted on the order of 10 -10 /cm . An implantation energy is selected so that the ions reach the interface between the metal thin film and the macromolecular film. In this case, as the implantation amount of the ions increases, the number of recoiling metal atoms increases, so that a larger amount of metal atoms 4 penetrates into the macromolecular film 1 to improve the adhesion of the metal thin film to the macromolecular film.

57. 发明专利

JPS5654051A FORMATION OF ELECTRODE WIRING 失效
公开(公告)号：JPS5654051A
公开(公告)日：1981-05-13
申请号：JP13065179
申请日：1979-10-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO
IPC分类号： H01L21/3205 , H01L21/28 , H01L21/306
摘要： PURPOSE:To prevent disconnection of the electrode wiring by keeping the cross- section from steeping in the shape during the etching with a higher etching speed at the upper layer part through thickness-wise change in the composition of the electrode wiring material. CONSTITUTION:An Al-Si alloy 6 (composition of 98:2) is laminated in an Al layer 2 on a semiconductor substrate 1 and is etched by a mixture liquid of phosphoric acid, nitric acid and acetic acid with a resist mask and then, the mask is removed. The Al-Si alloy is greater in the etching speed than Al and the Al-Si-Cu alloy (composition of 95:1:4) is much greater than the later. As a result, a gently tapered cross-section is formed thereby eliminating disconnection at the step. In this manner, the lamination of an Al-Si alloy and an Al provides a cross-sectional shape of desired taper angle through control of thickness of the film. In addition, the generation of hill rocking can be checked.

58. 发明专利

JPS5654036A MANUFACTURE OF SEMICONDUCTOR DEVICE 失效
公开(公告)号：JPS5654036A
公开(公告)日：1981-05-13
申请号：JP13065279
申请日：1979-10-08
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO
IPC分类号： H01L21/268 , H01L21/225
摘要： PURPOSE:To conduct diffusion without rediffusion from the semiconductor substrate while changing the quality of a poly Si film and utilize the film as internal wiring by a method wherein laser rays having high output and high energy are irradiated to the poly Si film containing impurities. CONSTITUTION:An SiO2 film 2 on a P type Si substrate 1 is opened, and a poly Si film 3 containing impurities 4 is deposited at the thickness of about several thousand Angstrom . When irradiating the laser rays of several joule/cm , temperature of the poly Si reaches about 1,200 deg.C, the impurities diffuse into the substrate, and a layer 6 is formed. The film 4 often melts, and recrystallizes in an opening portion and is changed into a monocrystal Si film, crystal grains greatly grow portions except the opening portion, impurities caught by crystal grain baundaries are taken into the crystal grains, and resistivity remarkably lowers. Rediffusion from the substrate side is not generated at all because a temperature of the Si substrate hardly rises at that time. Thus, the poly Si film used as a diffusion source can further be utilized as an electrode and internal wiring.

59. 发明专利

JPS54162453A SEMICONDUCTOR MANUFACTURING UNIT 失效
公开(公告)号：JPS54162453A
公开(公告)日：1979-12-24
申请号：JP7174578
申请日：1978-06-13
申请人： MITSUBISHI ELECTRIC CORP
发明人： AKASAKA YOUICHI , TSUKAMOTO KATSUHIRO
IPC分类号： H01J37/317 , H01J37/30 , H01L21/265
摘要： PURPOSE:To obtain desired electrical performance without heat treatment in high temperatures after ion injection. CONSTITUTION:Various ions produced by the ion source 1 are picked up and only desired ions are selected by the mass analysis electro magnet 2. The ions are accelerated 3 to desired energy, deflected by the desired angle through the deflection plates 4 and 5, to irradiate the entire surface of the target and the semiconductor substrate plate 6 uniformly. On the other hand, the laser beam in high energy is produced 7, which is moved with the reflection mirror 8 revolving by the specified angle around the specified shaft, to scan uniformly the full surface of the target and the substrate 6. Thus, the laser annealing for the ion injection layer is made to anneal the injection damage caused on the substrate and to activate the injected impurities.

60. 发明专利

JPS53110482A NONNVOLATILE SEMICONDUCTOR MEMORY ELEMENT AND ITS PRODUCTION 失效
公开(公告)号：JPS53110482A
公开(公告)日：1978-09-27
申请号：JP2628477
申请日：1977-03-09
申请人： MITSUBISHI ELECTRIC CORP
发明人： TSUKAMOTO KATSUHIRO , AKASAKA YOUICHI
IPC分类号： H01L21/8247 , H01L29/788 , H01L29/792
摘要： PURPOSE:To make a memory element of uniform characteristics by implanting impurity ions of groups III or V in the specified positions within the insulation film over the intermediate region of source and drain thereby making a trap.

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