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31. 发明专利

JP2011138851A Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：JP2011138851A
公开(公告)日：2011-07-14
申请号：JP2009296632
申请日：2009-12-28
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SHINTANI HIROSHI , HIRAMITSU SHINJI , OTA HIROYUKI , TANIE HISAFUMI , SUDA KOICHI
IPC分类号： H01L25/07 , H01L21/60 , H01L25/18
CPC分类号： H01L2924/0002 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a high-reliability semiconductor device by securing a breakdown voltage and accurate positioning of a control electrode of a semiconductor element. SOLUTION: The semiconductor device includes: a semiconductor element 1, that has a first main electrode 102 and a control electrode 101 on a first main surface and a second main electrode 103 on a second main surface on a side opposite to the first main surface, and whose sides are sealed by an insulating material 5, while exposing the first main surface and the second main surface; a first insulating substrate 7 that has a first metal circuit 3 arranged on the first main electrode 102, a control circuit 2 arranged on the control electrode 101, and a third metal circuit 4, which is a guide for guiding the semiconductor element to a desired position, while being in contact with the insulating material 5; and a second insulating substrate 8, having a second metal circuit 6 arranged on the second main electrode 103. The semiconductor element 1 is so constituted as to be sandwiched by the first insulating substrate 7 and the second insulating substrate 8. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：通过确保击穿电压和半导体元件的控制电极的精确定位来提供高可靠性的半导体器件。解决方案：半导体器件包括：半导体元件1，其在第一主表面上具有第一主电极102和控制电极101，在与第一主表面相反的一侧的第二主表面上具有第二主电极103 主表面，并且其侧面被绝缘材料5密封，同时暴露第一主表面和第二主表面; 第一绝缘基板7，其具有布置在第一主电极102上的第一金属电路3，布置在控制电极101上的控制电路2和第三金属电路4，第三金属电路4是用于将半导体元件引导到期望的同时与绝缘材料5接触; 以及具有布置在第二主电极103上的第二金属电路6的第二绝缘基板8.半导体元件1被构造成被第一绝缘基板7和第二绝缘基板8夹持。（C）2011，JPO＆INPIT

32. 发明专利

JP2010056354A Semiconductor device 审中-公开
标题翻译：半导体器件
公开(公告)号：JP2010056354A
公开(公告)日：2010-03-11
申请号：JP2008220676
申请日：2008-08-29
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： HIRAMITSU SHINJI , OTA HIROYUKI , IKEDA YASUSHI , MATSUYOSHI SATOSHI
IPC分类号： H01L23/34 , H01L21/52 , H01L23/48
CPC分类号： H01L24/01 , H01L2924/351 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device capable of suppressing thermal fatigue of a joining material by sufficiently securing radiation performance and reducing thermal stress generated in the joining material. SOLUTION: The semiconductor device includes a semiconductor chip 1, a first electrode 3 joined to one side of the semiconductor chip through a first joining material 2 while having conductivity, a second electrode 5 joined to the other side of the semiconductor chip through a second joining material 4 while having conductivity, and a first stress buffering material 6 to reduce stress of the first joining material which is generated due to the expansion quantity difference between the semiconductor chip and the first electrode. An region where the first electrode and the first stress buffering material each make direct contact with the first joining material is provided, and the area of the potion where the first joining material is in contact with the projecting part 3a of the first electrode is not more than 30% of the area of the semiconductor chip. COPYRIGHT: (C)2010,JPO&INPIT
摘要翻译：解决的问题：提供能够通过充分确保辐射性能并降低在接合材料中产生的热应力来抑制接合材料的热疲劳的半导体器件。解决方案：半导体器件包括半导体芯片1，第一电极3，其通过第一接合材料2连接到半导体芯片的一侧，同时具有导电性;第二电极5，其通过接合到半导体芯片的另一侧，通过具有导电性的第二接合材料4和第一应力缓冲材料6，以减少由于半导体芯片和第一电极之间的膨胀量差而产生的第一接合材料的应力。设置第一电极和第一应力缓冲材料与第一接合材料直接接触的区域，第一接合材料与第一电极的突出部分3a接触的部分的面积不大超过半导体芯片面积的30％。版权所有（C）2010，JPO＆INPIT

33. 发明专利

JP2008128920A Freezing sensor 有权
标题翻译：冷冻传感器
公开(公告)号：JP2008128920A
公开(公告)日：2008-06-05
申请号：JP2006316443
申请日：2006-11-24
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SHIMAZU HIROMI , OTA HIROYUKI , TANNO YOHEI , UCHIDA MARI , SAITO NAOTO
IPC分类号： G01N25/04 , G01N25/16
CPC分类号： G01N25/02 , G01N2203/0075 , G01N2203/0092
摘要： PROBLEM TO BE SOLVED: To provide a compact freezing sensor of low electric power consumption, capable of measuring precisely a frozen state of a liquid on real time.
SOLUTION: This freezing sensor is provided with a liquid absorption part 4 constituted of a liquid absorptive member, a substrate 2 connected to the liquid absorption part 4, and a strain sensor 1 for measuring a strain of the substrate 2, and detects the freezing of the liquid by generating the strain in the substrate 2 with a volume change when the liquid absorbed into the substrate 2 is frozen, and by detecting the strain with the strain sensor 1.
COPYRIGHT: (C)2008,JPO&INPIT
摘要翻译：要解决的问题：提供一种能够实时精确测量液体冷冻状态的低功耗的紧凑型冷冻传感器。解决方案：该冷冻传感器设置有由液体吸收构件，连接到液体吸收部分4的基板2和用于测量基板2的应变的应变传感器1构成的液体吸收部分4，并且检测当吸收到基板2中的液体被冷冻时，通过在基板2中产生体积变化而产生应变，并且通过用应变传感器1检测应变来冷冻液体。（C）2008，JPO＆INPIT

34. 发明专利

JP2006268393A Structure safety monitoring system 审中-公开
标题翻译：结构安全监测系统
公开(公告)号：JP2006268393A
公开(公告)日：2006-10-05
申请号：JP2005085185
申请日：2005-03-24
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： OTA HIROYUKI , SHIMAZU HIROMI
IPC分类号： G08C17/00 , G08C15/00
摘要： PROBLEM TO BE SOLVED: To provide a system monitoring safety of structure, operating for a long period when operating it by a battery, and allowing high-reliability information transmission even when installed to large-scale social infrastructure in large quantities. SOLUTION: A terminal is divided into three kinds according to an operation form thereof and is produced, is previously programmed with operation before the installation, and is installed according to an installation object. Comparison with preset value is made, possibility/impossibility of transmission of sensing information is determined, and the terminal is operated. Because the terminals are previously installed according to the operation forms of the three terminals not to cause a traffic jam of data, a communication network having reliability can be secured without causing the traffic jam of the data. COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：提供系统监控结构的安全性，在通过电池操作时长时间运行，并且即使在大规模社会基础设施安装时也可以进行高可靠性的信息传输。解决方案：根据其操作形式将终端分为三种，并且被制造，预先在安装之前进行操作，并根据安装对象进行安装。与预设值进行比较，确定感测信息的传输的可能性/不可能性，并且终端被操作。因为根据三个终端的操作形式预先安装终端，不会引起数据的堵塞，所以可以确保具有可靠性的通信网络，而不会引起数据的堵塞。版权所有（C）2007，JPO＆INPIT

35. 发明专利

JP2006266683A Mechanical quantity measuring instrument 有权
标题翻译：机械数量测量仪器
公开(公告)号：JP2006266683A
公开(公告)日：2006-10-05
申请号：JP2005080835
申请日：2005-03-22
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： TANIE HISAFUMI , SUMIKAWA TAKASHI , OTA HIROYUKI
IPC分类号： G01B7/16
CPC分类号： G01B7/18 , G01L1/2293
摘要： PROBLEM TO BE SOLVED: To solve a problem in thinning down silicon used as a semiconductor substrate for performing strain measurement that measurement accuracy is lowered since strain in a measured part is disturbed due to the affect of members such as wires on a silicon surface.
SOLUTION: A member of a small elastic modulus is provided between a wiring board for supporting a strain detection semiconductor element and the semiconductor element with a rear face of the semiconductor element taken as a bonding surface to a measuring object. The effect of the rigidity or thermal deformation of the supporting wiring board on the semiconductor element can be reduced while supporting the semiconductor element.
COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：要解决的问题：为了解决用作进行应变测量的半导体衬底的硅的薄减薄的问题，测量精度降低，因为测量部分的应变由于诸如硅之类的构件的影响而受到干扰表面。解决方案：在用于支撑应变检测用半导体元件的布线基板和将半导体元件的背面作为测量对象的接合面的半导体元件之间设置小弹性模量的构件。在支撑半导体元件的同时，可以减少支撑布线板对半导体元件的刚性或热变形的影响。版权所有（C）2007，JPO＆INPIT

36. 发明专利

JP2006258674A Device for measuring mechanical quantity 有权
标题翻译：用于测量机械量的装置
公开(公告)号：JP2006258674A
公开(公告)日：2006-09-28
申请号：JP2005078376
申请日：2005-03-18
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： SUMIKAWA TAKASHI , OTA HIROYUKI
IPC分类号： G01B7/16
CPC分类号： G01B7/18 , G01L1/18
摘要： PROBLEM TO BE SOLVED: To provide a mechanical quantity measuring device of long lifetime and high reliability, capable of measuring the strain components in the targeted specified direction with sufficient accuracy. SOLUTION: A strain detecting section is formed on a semiconductor substrate. A Wheatstone bridge, that uses an impurity diffusion zone considering crystal orientation, is formed in a semiconductor single-crystal substrate. Thus, the operation of Wheatstone bridge circuit becomes possible on the same substrate due to the anisotropy of the piezoresistance effect possessed by the semiconductor single crystal. COPYRIGHT: (C)2006,JPO&NCIPI
摘要翻译：要解决的问题：提供一种寿命长，可靠性高的机械量测量装置，其能够以足够的精度测量目标指定方向上的应变分量。解决方案：应变检测部分形成在半导体衬底上。在半导体单晶衬底中形成采用考虑晶体取向的杂质扩散区的惠斯通电桥。因此，由于半导体单晶所具有的压阻效应的各向异性，惠斯登电桥电路的操作成为可能。版权所有（C）2006，JPO＆NCIPI

37. 发明专利

JP2004228557A Semiconductor device and its manufacturing method 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：JP2004228557A
公开(公告)日：2004-08-12
申请号：JP2003178863
申请日：2003-06-24
申请人： Hitachi Ltd , Trecenti Technologies Inc , トレセンティテクノロジーズ株式会社 , 株式会社日立製作所
发明人： ISHIZUKA NORIO , IWASAKI TOMIO , OTA HIROYUKI , MIURA HIDEO , IKEDA SHUJI , SUZUKI NORIO , TAKAHASHI MASATO , SATO YASUO , TANAKA HIDEKI , MIMA HIROYUKI
IPC分类号： H01L21/76 , H01L21/8247 , H01L27/10 , H01L27/115 , H01L29/78 , H01L29/788 , H01L29/792
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device which can effectively inhibit a defect having ocurred in a substrate and has good performance, and its manufacturing method. SOLUTION: The semiconductor device includes: the semiconductor substrate; an element isolating region which has a trench formed on the semiconductor device and a buried dielectric film buried in the trench, a gate dielectric film formed adjacent to the element separating region, an active region where a gate electrode are formed on the gate dielectric film; and a region where at least a part of the gate electrode is positioned on the element isolating region and which is formed so that a first interface of the buried dielectric film, in which the gate electrode is positioned, is at a position above a second interface of the buried dielectric film in a second region in which the gate electrode is not located. COPYRIGHT: (C)2004,JPO&NCIPI
摘要翻译：解决的问题：提供一种半导体器件及其制造方法，该半导体器件能够有效地抑制衬底中产生的缺陷并具有良好的性能。解决方案：半导体器件包括：半导体衬底; 具有形成在半导体器件上的沟槽的元件隔离区域和埋在沟槽中的埋置电介质膜，邻近元件分离区域形成的栅极电介质膜，在栅极电介质膜上形成栅电极的有源区域; 以及栅电极的至少一部分位于元件隔离区域并且形成为使得栅极电极位于其中的埋置电介质膜的第一界面位于第二界面上方的区域的区域的掩埋电介质膜的栅电极不在其中的第二区域中。版权所有（C）2004，JPO＆NCIPI

38. 发明专利

JP2003282874A Method for fabricating semiconductor device 有权
标题翻译：制造半导体器件的方法
公开(公告)号：JP2003282874A
公开(公告)日：2003-10-03
申请号：JP2002083540
申请日：2002-03-25
申请人： Elpida Memory Inc , Hitachi Ltd , エルピーダメモリ株式会社 , 株式会社日立製作所
发明人： OGAWA KAZUO , OBA SHIZUNORI , OKONOGI KENSUKE , IMAMURA TOSHIHIRO , WATANABE KEIICHI , OTA HIROYUKI
IPC分类号： H01L21/28 , H01L29/423 , H01L29/49 , H01L29/78
CPC分类号： H01L21/28247 , H01L21/28061
摘要： PROBLEM TO BE SOLVED: To provide a method for fabricating a semiconductor device in which bonding strength of polysilicon and an oxide film can be enhanced greatly.
SOLUTION: Phosphorus doped polysilicon is formed on a gate oxide film and a high melting point metal or a compound of a high melting point metal and silicon is formed thereon thus fabricating a semiconductor device having a multilayer gate electrode. In such a method for fabricating a semiconductor device, the polysilicon is doped with phosphorus such that the concentration of phosphorus in the polysilicon is not higher than 2×10
20 (1/cm
3 ) at the interface of the polysilicon and the gate oxide film and then thermal oxidation is performed in wet hydrogen atmosphere containing steam.
COPYRIGHT: (C)2004,JPO
摘要翻译：要解决的问题：提供一种可以大大提高多晶硅和氧化物膜的结合强度的半导体器件的制造方法。解决方案：在栅极氧化膜上形成磷掺杂多晶硅，并在其上形成高熔点金属或高熔点金属和硅的化合物，从而制造具有多层栅电极的半导体器件。在制造半导体器件的这种方法中，多晶硅掺杂有磷，使得多晶硅中的磷的浓度不高于2×10 （1 / cm 3 / SP>）在多晶硅和栅极氧化物膜的界面处，然后在含有蒸汽的湿氢气氛中进行热氧化。版权所有（C）2004，JPO

39. 发明专利

JPH11274251A Manufacture of semiconductor device 失效
标题翻译：半导体器件的制造
公开(公告)号：JPH11274251A
公开(公告)日：1999-10-08
申请号：JP6978698
申请日：1998-03-19
申请人： Hitachi Ltd , 株式会社日立製作所
发明人： KONO RYUJI , KITANO MAKOTO , MIURA HIDEO , OTA HIROYUKI , ENDO KIJU , HARADA TAKESHI , KANAMARU MASATOSHI , AKASHI TERUHISA , HOSOGANE ATSUSHI , ARIGA AKIHIKO , BAN NAOTO
IPC分类号： H01L21/66 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/26 , G01R31/28
CPC分类号： G01R1/07314 , G01R1/06744 , G01R3/00 , G01R31/2863
摘要： PROBLEM TO BE SOLVED: To enable collective inspection of a large region of an electrode pad of a wafer in an electric characteristic inspection process, by pressing a protrusion of an inspection structure body which is electrically connected with a pad on the opposite surface against a desired position of an object to be inspected, in a probing process and a burn-in inspection process.
SOLUTION: A first plate member 1 has a protrusion 11 group on a surface facing an object 2 to be inspected. On the tips of the protrusion 11 group, a wiring pattern 12 for obtaining electric continuity between the object 2 to be inspected and the outside is formed. The wiring pattern 12 is electrically connected with the rear of a surface of the first plate member 1 on which the protrusion 11 group is formed, through a penetrating hole 13. On the rear of the first plate member 1, an insulating film 3 is formed excepting a pad 121 part formed in the end portion of the wiring pattern 12. As a result, electric continuous paths of a pad to be inspected of the object 2 which exists in a projection surface of the first plate member 1 are all present in the projection surface of the first plate member 1. As a result, collective inspection of a large region of the electrode pad of a wafer in an electric characteristic inspection process is enabled.
COPYRIGHT: (C)1999,JPO
摘要翻译：要解决的问题：为了能够在电特性检查过程中对晶片的电极焊盘的大区域进行集体检查，通过将与相对表面上的焊盘电连接的检查结构体的突起压靠在期望的在检测过程和老化检查过程中要检查的物体的位置。解决方案：第一板构件1在面向待检查物体2的表面上具有突起11组。在突起11组的尖端上，形成用于获得被检查物体2与外部之间的电连续性的布线图案12。布线图案12通过贯通孔13与形成有突起11组的第一板构件1的表面的后部电连接。在第一板构件1的后部形成有绝缘膜3 除了形成在布线图案12的端部中的垫121部分之外。结果，存在于第一板构件1的突出表面中的被检体2的待检查的垫的电连续路径全部存在于从而能够在电特性检查处理中对晶片的电极焊盘的大区域进行集体检查。

40. 发明专利

JP2004006929A SEMICONDUCTOR DEVICE 审中-公开
公开(公告)号：JP2004006929A
公开(公告)日：2004-01-08
申请号：JP2003191583
申请日：2003-07-04
申请人： HITACHI LTD
发明人： IWASAKI TOMIO , OTA HIROYUKI , ASANO ISAMU , OJI YUZURU , NAKAMURA YOSHITAKA
IPC分类号： H01L21/28 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L27/04 , H01L27/105 , H01L27/108 , H01L29/78
摘要： PROBLEM TO BE SOLVED: To provide a semiconductor device having a capacity element structure that is high in reliability and yield and is hard to cause conduction failure. SOLUTION: In the semiconductor device, a capacity element for information storage is provided with a conductive film, a first electrode contact with the conductive film, and a high dielectric constant or ferroelectric oxide film contact with the first electrode on one main surface side of a silicon (Si) substrate in this order. The conductive film contains an element for narrowing a diffusion passage of oxide. COPYRIGHT: (C)2004,JPO

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