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    • 12. 发明专利
    • METHOD OF SOLDERING PARTS TO PRINTED CIRCUIT BOARD, SOLDERING INSPECTION METHOD AND APPARATUS THEREFOR
    • JPH0968415A
    • 1997-03-11
    • JP22305395
    • 1995-08-31
    • HITACHI LTD
    • TAKAGI YUJIISOBE MITSUNOBU
    • G01B11/24H05K3/34
    • PROBLEM TO BE SOLVED: To provide a method for inspecting soldering of parts to a printed circuit board, particularly for inspecting soldering of an IC, which is a multi-pin surface-mount part, to a printed circuit board. SOLUTION: An object 5 to be inspected is illuminated by a lighting 2 set above a printed circuit board to be inspected and the resultant image is taken by a camera 1. A means is provided to compare an image signal of the inspection area including leads as obtained during the inspection with a reference signal waveform detected from the tip parts of the leads imaged previously in a soldering inspection area in the image taken and a part where the both coincide is searched to accomplish a decision of the position of the lead tip part. The stable decision of the position of the lead tip also allows the specifying of a soldering area accurately and hence, a reference signal waveform of a soldered part can be generated by storing an image signal of the soldered part. Thus, the image signal of the soldered part obtained during the inspection is compared with a reference signal waveform of the soldered part and when the difference therebetween is large, a notice to the effect is given thereby achieving a monitoring function for the state of soldering.
    • 14. 发明专利
    • DECENTRALIZED CONTROL SYSTEM
    • JPS6255704A
    • 1987-03-11
    • JP19480585
    • 1985-09-05
    • HITACHI LTD
    • MATSUZAKI YOSHIEISOBE MITSUNOBUHAMANO JUNICHIOSAKO KAZUYOSHI
    • G06F15/16G05B19/02G05B19/05G06F15/173H04L12/40
    • PURPOSE:To reduce the transfer frequency of data by transferring the value of the own input/output port to another programmable controller PC only when said value of the input/output port that is used by another PC for reference is changed. CONSTITUTION:An arithmetic part 12 performs the decentralized control according to the contents of a program stored in a program memory 16. The part 12 gives an access to its own input/output port 15 as long as the input/output port used by the program belongs to the part 12 itself. While an access is given to the value of an external name area of a global input/output port buffer memory 14 if the input/output port used by the program belongs to another programmable controller PC. When the execution of the decentralized control is through with the program by an amount equivalent to a single scan, the value of an input/output port registered to the memory 14 in the form of a public name is read out of the port 15. This value is compared with those values obtained in the preceding scans and stored in a public name area. Then the value read out of the port 15 is stored as it is when no difference is detected from said comparison. While the new value is stored if some difference is detected and at the same time a change flag is set up to the new value.
    • 15. 发明专利
    • Programmable controller
    • 可编程控制器
    • JPS6148001A
    • 1986-03-08
    • JP16931684
    • 1984-08-15
    • Hitachi Ltd
    • ISOBE MITSUNOBUMATSUZAKI YOSHIEOSAKO KAZUYOSHIHATA SEIJI
    • G05B19/05
    • G05B19/052G05B2219/15127
    • PURPOSE:To calculate various data while keeping the high speed characteristic of sequential controlling by switching, a general purpose microprocessor capable of system controlling and various data calculating with one-bit logical arithmetic processing without any overhead. CONSTITUTION:A eneral purpose microprocessor MPU1 sets mode-switching flip- flop within a one-bit logical arithmetic processor LPU5 by the mode-switching instruction, and cuts off a program memory PM4 from a bus (c) to connect an operation code bus (d) with an instruction register LPU5, and an operand data bus (e) with an address bus (h), respectively, and the LPU5 is release from the holding condition. In the LPU mode, an MPU1 generates the address for the fetch of a logical arithmetic instruction IPU5 by the fetch of the first dummy instruction from a dummy operation generator 6 and the LPU5 is actuated by the fetch of the second dummy instruction to execute the arithmetic processing.
    • 目的:通过切换来保持顺序控制的高速特性,可以计算各种数据,一种通用的微处理器,能够进行系统控制,并通过一位逻辑运算处理进行各种数据计算,而不会产生任何开销。 构成:通用微处理器MPU1通过模式切换指令在一位逻辑运算处理器LPU5内设置模式切换触发器,并从总线(c)切断程序存储器PM4以连接操作代码总线 d)分别具有指令寄存器LPU5和具有地址总线(h)的操作数数据总线(e),并且LPU5从保持状态释放。 在LPU模式中,MPU1通过从虚拟操作生成器6获取第一伪指令来生成用于获取逻辑运算指令IPU5的地址,并且通过提取第二伪指令来驱动LPU5以执行算术 处理。
    • 16. 发明专利
    • Bus connecting system
    • 总线连接系统
    • JPS59218532A
    • 1984-12-08
    • JP9229683
    • 1983-05-27
    • Hitachi Ltd
    • HATA SEIJIHORINO HIROSHIISOBE MITSUNOBUMIYAGAWA AKIRA
    • G06F13/36G06F3/00G06F15/16G06F15/173
    • PURPOSE: To improve the operating rate by connecting a multiprocessor to a bus line of a tree constitution and using a bus connecting device provided at a branching part to attain the upper bus occupation for each branch, a procesor within a branch or a lower branch.
      CONSTITUTION: Bus connecting devices 12
      1 and 12
      3 are provided to a main bus 11 for connection of slave buses 13
      1 and 13
      3 , and the bus 13
      1 is connected to a sub-slave bus 13
      2 via a bus connecting device 12
      2 . Then processors 17 and 18, a shared memory 16, a signal processing control processor 14, a signal processor 15 and work memories 19
      1 W19
      2 are connected to the buses 11 and 13
      1 W13
      3 , respectively. The devices 12
      1 W12
      3 are controlled to occupy the bus for each branch and to make a processor within a branch or a processor of a lower branch occupy an upper bus. This attains a partial parallel operation and improves the overall operating rate.
      COPYRIGHT: (C)1984,JPO&Japio
    • 目的:通过将多处理器连接到树结构的总线和使用设置在分支部分的总线连接装置来实现每个分支的上部总线占用来提高工作速率,分支或下部分支中的处理器。 总线连接装置121和123被提供给用于连接从总线131和133的主总线11,并且总线131经由总线连接装置122连接到副从属总线132.然后处理器17和18, 共享存储器16,信号处理控制处理器14,信号处理器15和工作存储器191-192分别连接到总线11和131-133。 控制设备121-123以占用每个分支的总线,并且使分支内的处理器或下分支的处理器占用上总线。 这实现了部分并行操作并且提高了整体运行率。
    • 20. 发明专利
    • PATTERN MATCHING METHOD
    • JP2000003444A
    • 2000-01-07
    • JP16660098
    • 1998-06-15
    • HITACHI LTD
    • SHISHIDO CHIEISOBE MITSUNOBUTAKAGI YUJIMAEDA SHUNJI
    • G01B11/00G06T1/00G06T7/00G06T7/40
    • PROBLEM TO BE SOLVED: To reduce an arithmetic quantity for obtaining the distribution of correlative coefficients by adding an area having a prescribed width and a fixed value to a measurement picture and a reference picture and executing a pre-processing where the sizes of the longitudinal and horizontal sizes of the picture are made to be the factorial pixel of two. SOLUTION: Picture data (s) and (r) are successively inputted to a position deviating amount arithmetic part 41 by one pixel. Since a fixed-sized picture is required for pattern matching, data corresponding to the fixed-sized picture are stored in memories 42 and 43. A whole control part 103 controls the addresses of the memories 42 and 43 and the picture where an O-area is added is outputted. Picture data with the O-area are inputted to FFT circuits 44 and 45 and Fourier-transformed. Transformed picture data are inputted to a cross power spectrum arithmetic circuit 46 and a cross power spectrum is obtained after multiplication. The cross power spectrum is inputted to an FFT-1 circuit 47 and reverse Fourier-transformed and a mutual function being its result is written in the memory 48.