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11. 发明专利

JPS6254966A SCHOTTKY GATE FIELD EFFECT TRANSISTOR AND MANUFACTURE THEREOF 失效
公开(公告)号：JPS6254966A
公开(公告)日：1987-03-10
申请号：JP19384185
申请日：1985-09-04
申请人： HITACHI LTD , HITACHI VLSI ENG
发明人： KAMIYANAGI KIICHI , MIYAZAKI MASARU , KOBAYASHI MASAYOSHI , KAYAMA SATOSHI , KODERA NOBUO , SHIGETA JUNJI , YANAGISAWA HIROSHI , HASHIMOTO TETSUKAZU , MASUKI JIYUNJI , ISOBE YOSHIHIKO
IPC分类号： H01L29/812 , H01L21/338 , H01L29/08
摘要： PURPOSE:To obtain a short gate MESFET having high performance by disposing the second source and drain regions having lower carrier density than the first source and drain regions between a gate electrode, and the first source region and the drain region respectively. CONSTITUTION:Source and drain regions are formed double and to be self- aligned with a gate electrode, the second source and drain regions 14, 14' of the gate electrode 3 side have relatively low carrier density and shallow depth, the first source and drain regions 4, 4' of the side separated from the gate electrode have high carrier density to form a high performance MESFET having small short channel effect, and low source resistance. The regions 14, 14' are formed by ion implanting at 15 with the electrode 3 as a mask, and the regions 4, 4' of higher carrier density than the regions 14, 14' are separated from the electrode 3 by ion implanting at 9 with the side wall 16 formed on the side of the electrode 3 as a mask. Thus, a high performance MESFET is obtained.

12. 发明专利

JPS60257133A HEAT-TREATING METHOD FOR GAAS SUBSTRATE 失效
公开(公告)号：JPS60257133A
公开(公告)日：1985-12-18
申请号：JP11072284
申请日：1984-06-01
申请人： HITACHI LTD
发明人： KODERA NOBUO , SHIGETA JIYUNJI , KAMIYANAGI KIICHI , MIYAZAKI MASARU
IPC分类号： H01L29/812 , H01L21/265 , H01L21/324 , H01L21/338
摘要： PURPOSE:To enable to obtain a substrate which is especially suitable for an IC by a method wherein, after a glass thin film having SiO2 as a main ingredient and containing the spcific ratio or more of alumina, boron oxide and barium oxide is coated on one main surface of a GaAs substrate, the above is heated up to the prescribed temperature or above and at the crystalline melting point or below. CONSTITUTION:After Si ions are implanted on the surface of a GaAs substrate 1 as shown by the arrows in the disgram, a glass thin film 2, having SiO2 as main ingredient and containing Al2O3 of 12% or above, a boron oxide and a barium oxide, such as the glass 7059 manufactured by Coroning Glass Works, for example, is coated by performing an RF sputtering method using Ar ion as a medium. Then, a heat treatment is performed on the substrate 1 at the temperature of 400 deg.C or above and at the temperature of crystalline melting point or below. Through these procedures, the exfoliation of the glass layer 2 to be used to prevent the evaporation of As in the substrate 1 and the generation of cracks can be prevented, and the change in crystalline characteristics due to the application of the stress generated from the difference of thermal expansion coefficient between the substrate 1 and the layer 2, on the substrate 1 can also be prevented, thereby enabling to obtain an excellent GaAs substrate to be used for an integrated circuit. After the glass layer 2 is formed, Si ions are implanted, and the a heat treatment may be performed.

13. 发明专利

JPS58130584A JOSEPHSON JUNCTION ELEMENT 失效
公开(公告)号：JPS58130584A
公开(公告)日：1983-08-04
申请号：JP1166182
申请日：1982-01-29
申请人： HITACHI LTD
发明人： MURAYAMA YOSHIMASA , KODERA NOBUO
IPC分类号： H01L39/22 , H03K19/195
摘要： PURPOSE:To ensure the switching operation at a non-latching mode by a constant circuit power source current, by connecting a Josephson junction and a negative resistor in parallel, arranging a control line along the junction with a gap being provided, and flowing a current, which does not exceed the minimum equivalent current Imin (RL, O) of the parallel circuit of the junction and the resistor, through the control line. CONSTITUTION:The Josephson junction 10 and the load resistor 11 whose resistance value is RL are connected in parallel and a closed circuit is constituted. The control line 12, through which the circuit power source current Ic flows, is arranged along the Josephson junction 10. In this constitution, a superconductive current flows through the junction 10 until the circuit power source current Ic exceeds the maximum tunnel current value Imo, and the circuit becomes a zero state. When the current Ic exceeds the value Imo, ON switching to the voltage state shown by a curve 20 from the zero voltage state is carried out. When the Ic is decreased from this state to the value lower than Imin (RL, O) value, OFF switching state is obtained.

14. 发明专利

JPS58129616A LOW TEMPERATURE WORKING TYPE COMPUTER 失效
公开(公告)号：JPS58129616A
公开(公告)日：1983-08-02
申请号：JP1165082
申请日：1982-01-29
申请人： HITACHI LTD
发明人： KODERA NOBUO , HIRANO MIKIO , KAWABE USHIO
IPC分类号： G11C11/44 , G06F1/00 , G06F1/18 , H01L39/22
摘要： PURPOSE:To reduce Joule heating at low temperature working and signal attenuation to discriminate connection at a room temperature by superposing a superconductive wire material to a normal conductive wire material so as to be double layers and doubling also electric connection. CONSTITUTION:Connection wiring is constituted by superposed films consisting of the superconductive wire material (thin film) 1 and the normal conductive wire material (thin film) 2. Electric connection is also doubled by the superconductive wire and the normal conductive wire. At a temperature higher than a transfer temperature, current flows mainly through the normal conductive wire material, and at a temperature lower than the transfer temperature, current flows the superconductive wire materal of which resistance is zero. In a wiring structure to connect pins on a circuit resistance is zero. In a wiring structure to connect pins on a circuit board (module board), a superconductive metallic film is formed like a disc so as to be circularly expanded around pin holes.

15. 发明专利

JPS5816331B2 失效
公开(公告)号：JPS5816331B2
公开(公告)日：1983-03-30
申请号：JP12740575
申请日：1975-10-24
申请人： HITACHI LTD
发明人： KODERA NOBUO , OOI TETSU , MYAMOTO NOBUO
IPC分类号： H01L43/10 , H01L21/18 , H01L21/203 , H01L21/208 , H01L43/00 , H01L43/12

16. 发明专利

JPS5816330B2 失效
公开(公告)号：JPS5816330B2
公开(公告)日：1983-03-30
申请号：JP12740475
申请日：1975-10-24
申请人： HITACHI LTD
发明人： KODERA NOBUO , OOI TETSU
IPC分类号： H01L43/10 , H01L21/18 , H01L21/203 , H01L21/208 , H01L43/00 , H01L43/12

17. 发明专利

JPS572129A SUPERCONDUCTIVE DIRECT CURRENT DRIVING LOGICAL CIRCUIT 失效
公开(公告)号：JPS572129A
公开(公告)日：1982-01-07
申请号：JP7554380
申请日：1980-06-06
申请人： HITACHI LTD
发明人： KODERA NOBUO , YAMASHITA KUNIO
IPC分类号： H03K19/195
摘要： PURPOSE:To obtain a general-purpose logical gate for integrated circuit use that can be driven with a DC power source, by forming a logical circuit which can obtain the arithmetic output of both an OR logic and an NOR logic at one time. CONSTITUTION:The upper side of a basic circuit is connected to a DC power supply line P1 via a series resistance R3; and the lower side of the basic circuit is earthed via a resistance RD. At the same time, a bias input loop is provided to generate an interlinking magnetic flux simultaneously with junction switches g11 and g22. Then two magnetic field coupled input lines are disposed so as to generate an interlinking magnetic flux simultaneously with switches g11 and g12 as well as g21 and g22. Then a combination is formed so that the input magnetic flux to g11 and g22 becomes opposite to the code of the bias magnetic field. Thus an OR output is extracted from the middle point between g11 and g12, and at the same time an NOR output is extracted from the middle point between g21 and g22, respectively.

18. 发明专利

JPS5558806A REPRODUCTION SYSTEM FOR MAGNETIC RECORDING 失效
公开(公告)号：JPS5558806A
公开(公告)日：1980-05-01
申请号：JP13054678
申请日：1978-10-25
申请人： HITACHI LTD
发明人： KODERA NOBUO , SHIGETA JIYUNJI
IPC分类号： G11B5/02
摘要： PURPOSE:To remove the occurrence of phase distortion in the process of recording and reproduction, by performing the constant current recording and linear reproduction. CONSTITUTION:The current signal in fidelity with the input signal is fed to the coil L of the recording head via the constant current load resistor R to record signal on tape. Further, the output of the Hall effect head for reproduction having the output impedance of pure resistance characteristics is fed to the linear differential amplifying circuit to obtain reproduced output via LPF. As a result, the signal without phase distortion can be recorded on tape or reproduced.

19. 发明专利

JPS5447588A CONNECTION METHOD OF MAGNETOELECTRIC TRANSDUCER 失效
公开(公告)号：JPS5447588A
公开(公告)日：1979-04-14
申请号：JP11335077
申请日：1977-09-22
申请人： HITACHI LTD
发明人： SHIGETA JIYUNJI , MIYAMOTO NOBUO , NAKASHIMA MUNEYASU , KODERA NOBUO
IPC分类号： H01L43/06 , H01L43/00 , H01L43/12 , H01L43/14
摘要： PURPOSE:To effectively reduce noises by parallel connecting plural Hall elements formed by using compound semiconductor thin films such of InSb by means of capacitors. CONSTITUTION:Hall elements 3 and 4 having an equal sensitivity are parallel connected via variable resistance 5 and 6 and applied current is applied to a current terminal 1 from a power source, capacitors 7 and 7' are parallel connected to the output terminals 2 of these two Hall elements 3 and 4 and outputs are drawn out herefrom. Then, the signal voltage equal to the Hall voltage of one element may be obtained on the outside and since the pahse of the noise voltages of the respective elements are mutualy irrespective, they respective elements are mutually irr spective, they may be negated by the capatitors, thus the noise voltages are less than with one elements.

20. 发明专利

JPS53122389A INSB THIN FILM ELEMENT 失效
公开(公告)号：JPS53122389A
公开(公告)日：1978-10-25
申请号：JP3617077
申请日：1977-04-01
申请人： HITACHI LTD
发明人： SHIGETA JIYUNJI , OOI TETSU , NAKASHIMA MUNEYASU , KODERA NOBUO
IPC分类号： H01L43/08 , H01L43/06
摘要： PURPOSE:To establish the InSb thin film great in S/N and low in resistance, by inserting the InSb film not doped between the InSb film including a given dopant of specified impurity element with a concentration of 5 X 10 to 1 X 10 atoms/cm and the metallic electrode.

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