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1. 发明专利

JP2011146667A Multilayer ceramic circuit substrate, and method of manufacturing the same 有权
标题翻译：多层陶瓷电路基板及其制造方法
公开(公告)号：JP2011146667A
公开(公告)日：2011-07-28
申请号：JP2010135398
申请日：2010-06-14
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , KIM JIN WAUN , LEE DAE HYEONG , HONG KI PYO
IPC分类号： H05K3/46 , H05K3/00 , H05K3/10
CPC分类号： H05K3/4629 , C04B37/001 , C04B2237/64 , H05K3/107
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer ceramic circuit substrate.
SOLUTION: The method for manufacturing a multilayer ceramic circuit substrate may include the stages of: preparing a plurality of ceramic green sheets; forming a recess having a desired line shape and a via hole connected to the recess in at least one of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with a conductive material; forming a circuit line connected to the conductive via by filling the recess with a conductive material; stacking the plurality of ceramic green sheets upon one another to thereby form a ceramic green sheet stack; and sintering the ceramic green sheet stack.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造多层陶瓷电路基板的方法。解决方案：制造多层陶瓷电路基板的方法可以包括以下步骤：制备多个陶瓷生片; 在所述多个陶瓷生片中的至少一个中形成具有所需线状的凹部和与所述凹部连接的通孔; 通过用导电材料填充所述通孔来形成导电通孔; 通过用导电材料填充凹槽来形成连接到导电通孔的电路线; 将多个陶瓷生片堆叠在一起形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。版权所有（C）2011，JPO＆INPIT

2. 发明专利

JP2013016788A Multilayer ceramic substrate and method for manufacturing the same 审中-公开
标题翻译：多层陶瓷基板及其制造方法
公开(公告)号：JP2013016788A
公开(公告)日：2013-01-24
申请号：JP2012129610
申请日：2012-06-07
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHOI YONG SEOK , LEE DAE HYEONG , MA WON-CHOL , HON KI-PYO
IPC分类号： H05K3/46
CPC分类号： H01L23/15 , B32B18/00 , B82Y30/00 , C04B37/006 , C04B2235/408 , C04B2235/616 , C04B2237/125 , C04B2237/32 , C04B2237/562 , C04B2237/62 , H01L21/4857 , H01L2924/0002 , H05K1/113 , H05K3/4061 , H05K3/4629 , H05K2203/025 , H05K2203/072 , H01L2924/00
摘要： PROBLEM TO BE SOLVED: To provide a multilayer ceramic substrate and a method for manufacturing the multilayer ceramic substrate.SOLUTION: A method for manufacturing a multilayer ceramic substrate includes the steps of: preparing a ceramic laminate in which a void is formed around a via in at least one ceramic layer of multilayer ceramic layers; immersing the ceramic laminate in a precipitating bath in which an electrode solution is contained; taking the ceramic laminate out of the precipitating bath after a predetermined period of time has elapsed and then removing a nanoparticle film laminated on a surface of the multilayer ceramic substrate; and, after the removal of the nanoparticle film, applying predetermined heat to the multilayer ceramic substrate to form nanoparticles filling an inside of the void. A binding strength between an external electrode and the ceramic laminate can be prevented from being lowered by filling the void around the via of the ceramic laminate with the nanoparticles and forming the external electrode on the nanoparticles and a surface of the via.
摘要翻译：要解决的问题：提供一种多层陶瓷基板和多层陶瓷基板的制造方法。解决方案：一种制造多层陶瓷基板的方法包括以下步骤：制备在多层陶瓷层的至少一个陶瓷层中在通孔周围形成空隙的陶瓷层压体; 将陶瓷层压体浸渍在其中含有电极溶液的沉淀浴中; 在经过预定时间后将陶瓷层压板从沉淀槽中取出，然后除去叠层在多层陶瓷基板的表面上的纳米颗粒膜; 并且在去除纳米颗粒膜之后，将预定的热量施加到多层陶瓷基底以形成填充空隙内部的纳米颗粒。通过用纳米颗粒填充陶瓷层压体的通孔周围的空隙并在纳米颗粒上形成外部电极和通孔的表面，可以防止外部电极和陶瓷层压体之间的结合强度降低。版权所有（C）2013，JPO＆INPIT

3. 发明专利

JP2012044136A Manufacturing method of ceramic substrate, and ceramic substrate manufactured thereby 审中-公开
标题翻译：陶瓷基板的制造方法和制造的陶瓷基板
公开(公告)号：JP2012044136A
公开(公告)日：2012-03-01
申请号：JP2011007843
申请日：2011-01-18
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HON KI-PYO
IPC分类号： H05K3/46
CPC分类号： C04B41/52 , C04B41/009 , C04B41/89 , C04B2111/00844 , H05K3/22 , H05K3/4629 , H05K2203/025 , Y10T428/20 , C04B35/00 , C04B41/4539 , C04B41/4572 , C04B41/5022 , C04B41/5031
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a ceramic substrate and a ceramic substrate manufactured thereby.SOLUTION: A manufacturing method of a ceramic substrate comprises a step of forming a first adhesive layer on a blister provided for a ceramic substrate, a step of filling with filler the blister provided with the first adhesive layer, and a step of curing the ceramic substrate. According to the present invention, the blister provided for the ceramic substrate can be removed and the ceramic substrate with a uniform substrate surface and higher reliability can be provided.
摘要翻译：要解决的问题：提供由此制造的陶瓷基板和陶瓷基板的制造方法。＆lt; P＆gt;解决方案：陶瓷基板的制造方法包括在为陶瓷基板提供的泡罩上形成第一粘合剂层的步骤，向填料填充设置有第一粘合剂层的泡罩的步骤，以及固化步骤陶瓷基板。根据本发明，可以去除为陶瓷基板提供的泡罩，并且可以提供具有均匀基板表面和更高可靠性的陶瓷基板。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2011202940A Baking furnace for ceramic product and baking method using the same 审中-公开
标题翻译：烘烤炉用于陶瓷产品和烘烤方法
公开(公告)号：JP2011202940A
公开(公告)日：2011-10-13
申请号：JP2011000399
申请日：2011-01-05
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HONG KI PYO , KIM JIN WAUN
IPC分类号： F27B17/00 , C04B35/64
摘要： PROBLEM TO BE SOLVED: To provide a baking furnace for ceramic product, and a baking method using the same.SOLUTION: The baking furnace for ceramic product includes a furnace body containing a heat insulating material; a setter disposed inside the furnace body, and having a ceramic molding placed on an upper portion thereof; an exhaust opening arranged in an upper portion of the heat insulating material; at least one heating element arranged around the ceramic molding; and at least one mesh arranged around the ceramic molding so that the inside of the furnace body maintains a uniform temperature gradient, the mesh being composed of at least one selected from metal, an alloy, an oxide and a nitride. The baking method uses this baking furnace. According to these furnace and method, change in characteristics of a ceramic product due to a difference in temperature gradient in baking can be prevented by minimizing the temperature gradient inside the baking furnace.
摘要翻译：要解决的问题：提供一种用于陶瓷制品的烘烤炉和使用其的烘烤方法。该方法：陶瓷制品的烘烤炉包括一个包含绝热材料的炉体; 设置在炉体内部并具有置于其上部的陶瓷模制件的固定器; 布置在绝热材料的上部的排气口; 布置在所述陶瓷模制件周围的至少一个加热元件; 以及至少一个布置在所述陶瓷模制件周围的网，使得所述炉体的内部保持均匀的温度梯度，所述网由选自金属，合金，氧化物和氮化物中的至少一种构成。烘焙方法使用这种烤炉。根据这些炉子和方法，可以通过使焙烧炉内的温度梯度最小化来防止由于烘烤中的温度梯度的差异导致的陶瓷制品的特性变化。

5. 发明专利

JP2013191899A Multilayer ceramic circuit substrate and manufacturing method 有权
标题翻译：多层陶瓷电路基板和制造方法
公开(公告)号：JP2013191899A
公开(公告)日：2013-09-26
申请号：JP2013141241
申请日：2013-07-05
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , KIM JIN WAUN , LEE DAE HYEONG , HONG KI PYO
IPC分类号： H05K3/46 , H05K3/10
CPC分类号： H05K3/4629 , C04B37/001 , C04B2237/64 , H05K3/107
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer ceramic circuit substrate.SOLUTION: A method for manufacturing a multilayer ceramic circuit substrate comprises the steps of: preparing a plurality of ceramic green sheets; forming a groove having a desired line shape and a via hole connected to the groove in at least one ceramic green sheet of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with conductive material; forming a circuit line connected to the conductive via by filling the groove with the conductive material; stacking the plurality of ceramic green sheets, and forming a ceramic green sheet stack; and sintering the ceramic green sheet stack.
摘要翻译：要解决的问题：提供一种制造多层陶瓷电路基板的方法。解决方案：一种制造多层陶瓷电路基板的方法，包括以下步骤：制备多个陶瓷生片; 在所述多个陶瓷生片的至少一个陶瓷生片中形成具有所需线形状的沟槽和与所述沟槽连接的通孔; 通过用导电材料填充通孔形成导电通孔; 通过用所述导电材料填充所述凹槽来形成连接到所述导电孔的电路线; 堆叠多个陶瓷生片，形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。

6. 发明专利

JP2013083635A Probe card and manufacturing method thereof 有权
标题翻译：探针卡及其制造方法
公开(公告)号：JP2013083635A
公开(公告)日：2013-05-09
申请号：JP2012197079
申请日：2012-09-07
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHOI YONG SEOK , LEE DAE HYEONG , MA WON CHUL , HONG KI PYO
IPC分类号： G01R1/073 , G01R31/26
CPC分类号： G01R3/00 , G01R1/06727 , G01R1/06755
摘要： PROBLEM TO BE SOLVED: To provide a probe card and a manufacturing method thereof that may prevent an electrode pad bonded with a probe pin from being released from a probe substrate.SOLUTION: The probe card includes: a ceramic substrate having at least one electrode pad on one surface thereof; and a probe pin bonded to the electrode pad. The electrode pad may be formed to have a larger dimension than a bonding surface of the probe pin.
摘要翻译：要解决的问题：提供一种探针卡及其制造方法，其可以防止与探针接合的电极垫从探针基板释放。解决方案：探针卡包括：在其一个表面上具有至少一个电极焊盘的陶瓷基板; 以及与电极焊盘接合的探针。电极焊盘可以形成为具有比探针的接合表面更大的尺寸。版权所有（C）2013，JPO＆INPIT

7. 发明专利

JP2013083620A Probe card and manufacturing method thereof 审中-公开
标题翻译：探针卡及其制造方法
公开(公告)号：JP2013083620A
公开(公告)日：2013-05-09
申请号：JP2011285225
申请日：2011-12-27
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： HON KI-PYO , CHOI YONG SEOK , MA WON-CHOL , LEE DAE HYEONG
IPC分类号： G01R1/073 , H01L21/66
摘要： PROBLEM TO BE SOLVED: To provide a probe card and a manufacturing method thereof that may prevent an electrode pad bonded with a probe pin from being released from a probe substrate.SOLUTION: The probe card may include: a ceramic substrate which has at least one pad groove formed on one face thereof, and an electrode pad formed to be embedded in the pad groove; and a probe pin bonded to the electrode pad.
摘要翻译：要解决的问题：提供一种探针卡及其制造方法，其可以防止与探针接合的电极垫从探针基板释放。解决方案：探针卡可以包括：陶瓷基板，其具有形成在其一个面上的至少一个焊盘槽和形成为嵌入在焊盘槽中的电极焊盘; 以及与电极焊盘接合的探针。版权所有（C）2013，JPO＆INPIT

8. 发明专利

JP2012042446A Method for repairing probe board and probe board using the method 有权
标题翻译：使用该方法修复探针板和探针板的方法
公开(公告)号：JP2012042446A
公开(公告)日：2012-03-01
申请号：JP2011001786
申请日：2011-01-07
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HON KI-PYO
IPC分类号： G01R1/073 , H05K1/11 , H05K3/22 , H05K3/40
CPC分类号： H05K1/11 , G01R1/02 , H05K1/09 , H05K3/225 , H05K3/4015 , H05K3/4061 , Y10T29/49002 , Y10T29/49149 , Y10T29/49165 , Y10T29/49726 , Y10T29/49748
摘要： PROBLEM TO BE SOLVED: To provide a method for repairing a probe board and to provide a probe board using the method.SOLUTION: The method for repairing a probe board includes steps of forming a plurality of first via electrodes filled with a first filling substance in a substrate made of a ceramic sintered body; forming a via hole in a via electrode with conductivity failure among the plurality of first via electrodes; filling the via hole with a second filling substance having a lower sintering temperature than that of the first filling substance; and forming a second via electrode by sintering the second filling substance. Repairing the via electrode with conductivity failure results in an improvement of the yield of the board and reduction of the cost of manufacturing.
摘要翻译：要解决的问题：提供修复探针板的方法，并使用该方法提供探针板。解决方案：用于修复探针板的方法包括以下步骤：在由陶瓷烧结体制成的衬底中形成多个填充有第一填充物质的第一通孔电极; 在所述多个第一通孔电极中形成具有导电性故障的通路电极中的通孔; 用比第一填充物质烧结温度低的第二填充物填充通孔; 以及通过烧结所述第二填充物质形成第二通孔电极。电导率故障修复导通电极会导致电路板产量的提高和制造成本的降低。版权所有（C）2012，JPO＆INPIT

9. 发明专利

JP2013134249A Probe card and method for manufacturing the same 审中-公开
标题翻译：探针卡及其制造方法
公开(公告)号：JP2013134249A
公开(公告)日：2013-07-08
申请号：JP2012141779
申请日：2012-06-25
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHUNG DOO YUN , LEE DAE HYEONG , HON KI-PYO , MA WON-CHOL , CHOI YONG SEOK
IPC分类号： G01R1/073 , G01R31/26 , H01L21/66
CPC分类号： B23K31/02 , B23K1/0008 , B23K1/0056 , B23K1/018 , B23K1/206 , B23K3/0638 , B23K35/0238 , B23K35/24 , B23K2201/42 , G01R1/06755 , G01R1/07314 , G01R3/00 , G01R31/26
摘要： PROBLEM TO BE SOLVED: To provide a probe card and a method for manufacturing the same.SOLUTION: A probe card according to an embodiment of the present invention may include: a substrate; at least one metal layer which has a groove part, and is formed by being mutually separated on one surface of the substrate; at least one probe pin inserted into the groove part of each metal layer; and a solder part which is formed on one surface of the metal layer and inside of the groove part, and joins the probe pin to the groove part.
摘要翻译：要解决的问题：提供一种探针卡及其制造方法。解决方案：根据本发明实施例的探针卡可以包括：基底; 至少一个金属层，其具有沟槽部分，并且通过在所述基板的一个表面上相互分离而形成; 至少一个探针插入每个金属层的槽部分中; 以及焊接部，其形成在金属层的一个表面和槽部的内部，并且将探针连接到槽部。

10. 发明专利

JP2013038385A Multilayer ceramic substrate and manufacturing method of the same 审中-公开
标题翻译：多层陶瓷基板及其制造方法
公开(公告)号：JP2013038385A
公开(公告)日：2013-02-21
申请号：JP2012097705
申请日：2012-04-23
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： HONG KI PYO , CHOI YONG SEOK , MA WON CHUL , LEE DAE HYEONG
IPC分类号： H05K3/46
摘要： PROBLEM TO BE SOLVED: To provide a multilayer ceramic substrate which prevents the occurence of interlayer short circuits when multiple ceramic sheets are laminated with an insulation pattern disposed between a first conductive pattern and a second conductive pattern on each ceramic sheet.SOLUTION: A multilayer ceramic substrate 100 formed by a ceramic laminated body where multiple ceramic sheets 100a to 100d laminated includes: first conductive patterns 120a to 120d which are respectively formed on the ceramic sheets 100a to 100d; second conductive patterns 140a to 140d which respectively enclose the first conductive patterns 120a to 120d; and insulation patterns 160a to 160d which are respectively disposed between the first conductive patterns 120a to 120d and the second conductive patterns 140a to 140d.
摘要翻译：要解决的问题：提供一种多层陶瓷基板，当多个陶瓷片层叠有布置在每个陶瓷片上的第一导电图案和第二导电图案之间的绝缘图案时，防止层间短路的发生。＆lt; P＆gt;解决方案：由陶瓷层叠体形成的多层陶瓷基板100，其中层叠多个陶瓷片100a至100d包括：分别形成在陶瓷片100a至100d上的第一导电图案120a至120d; 分别包围第一导电图案120a至120d的第二导电图案140a至140d; 以及分别设置在第一导电图案120a至120d和第二导电图案140a至140d之间的绝缘图案160a至160d。版权所有（C）2013，JPO＆INPIT

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