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1. 发明专利

JP2009196885A Low temperature co-fired ceramic substrate having diffusion barrier layer and method of manufacturing the same 审中-公开
标题翻译：具有扩散阻挡层的低温共烧陶瓷基板及其制造方法
公开(公告)号：JP2009196885A
公开(公告)日：2009-09-03
申请号：JP2009039741
申请日：2009-02-23
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE JONG MYEON , LYOO SOO HYUN , CHOO HO SUNG
IPC分类号： C04B35/00 , C04B35/622 , H05K3/46
CPC分类号： C04B37/005 , C04B2237/062 , C04B2237/10 , C04B2237/341 , C04B2237/62 , C04B2237/74 , H05K1/0306 , H05K1/162 , H05K3/4611 , H05K3/4629 , H05K3/4688
摘要： PROBLEM TO BE SOLVED: To provide a low temperature co-fired ceramic substrate having a diffusion barrier layer to prevent diffusion occurring at a heterojunction region during firing, and a method of manufacturing the same.
SOLUTION: The low temperature co-fired ceramic substrate includes: a first ceramic layer formed of a material having a first dielectric constant; a second ceramic layer formed of a material having a second dielectric constant lower than the first dielectric constant; and a diffusion barrier layer interposed between the first ceramic layer and the second ceramic layer and formed of the first ceramic layer material, the second ceramic layer material, and a barium (Ba) compound. Production of defects, such as diffusion layers, caused by mutual diffusion of ions of materials constituting a first ceramic layer having a high dielectric constant and a second ceramic layer having a low dielectric constant, respectively, in the junction region during firing, can be suppressed, and thus a decrease in dielectric constant of the first ceramic layer having the high dielectric constant in the prior art can be prevented, thereby providing a low temperature co-fired ceramic substrate having improved reliability.
COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：解决的问题：提供一种具有扩散阻挡层的低温共烧陶瓷基板及其制造方法，以防止在烧成期间的异质结区发生扩散。低温共烧陶瓷基板包括：由具有第一介电常数的材料形成的第一陶瓷层; 由具有低于第一介电常数的第二介电常数的材料形成的第二陶瓷层; 以及介于第一陶瓷层和第二陶瓷层之间并由第一陶瓷层材料，第二陶瓷层材料和钡（Ba）化合物形成的扩散阻挡层。可以抑制在焙烧期间在接合区域中分别产生由构成具有高介电常数的第一陶瓷层的材料的离子的相互扩散和具有低介电常数的第二陶瓷层引起的诸如扩散层的缺陷，因此可以防止现有技术中具有高介电常数的第一陶瓷层的介电常数降低，从而提供可靠性提高的低温共烧陶瓷基板。版权所有（C）2009，JPO＆INPIT

2. 发明专利

JP2011077487A Multi-layer ceramic substrate and method for manufacturing the same 审中-公开
标题翻译：多层陶瓷基板及其制造方法
公开(公告)号：JP2011077487A
公开(公告)日：2011-04-14
申请号：JP2009270756
申请日：2009-11-27
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HONG KIPYO , KIM JIN-WAN
IPC分类号： H05K3/46 , H05K1/02
CPC分类号： H05K3/4061 , B32B18/00 , C04B35/645 , C04B2237/343 , C04B2237/348 , C04B2237/62 , C04B2237/68 , H05K3/4629 , H05K2201/0352 , H05K2201/096 , Y10T29/49117 , Y10T29/49204
摘要： PROBLEM TO BE SOLVED: To suppress a via contact formed in an insulating sheet in the outermost hull from protruding to the outside in a multi-layer ceramic substrate. SOLUTION: The multi-layer ceramic substrate 100 includes a first insulating sheet 120 having a first via contact 124 and a second insulating sheet 130 having a second via contact 134, jointed to the first via contact 124 so as to be vertically aligned, and the first via contact 124 and the second via contact 134 are formed of conductive paste having mutually different shrinkage ratios, when baking. The shrinkage ratio of the second via contact 134 is set so as to be higher than that of the first via contact 124, and the first via contact 124 has a shape which spreads inside the second via contact 134, after baking. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了抑制在多层陶瓷基板中在最外层的绝缘片中形成的通孔接触部向外部突出。解决方案：多层陶瓷基板100包括具有第一通孔接触件124的第一绝缘片材120和具有第二通孔接头134的第二绝缘片材130，该第二绝缘片材接合到第一通孔接触件124以垂直对准并且当烘烤时，第一通孔触点124和第二通孔触头134由具有相互不同的收缩率的导电膏形成。第二通孔触点134的收缩率被设定为高于第一通孔触点124的收缩率，并且第一通孔触头124具有在烘烤之后在第二通路触头134内部扩展的形状。版权所有（C）2011，JPO＆INPIT

3. 发明专利

JP2012044136A Manufacturing method of ceramic substrate, and ceramic substrate manufactured thereby 审中-公开
标题翻译：陶瓷基板的制造方法和制造的陶瓷基板
公开(公告)号：JP2012044136A
公开(公告)日：2012-03-01
申请号：JP2011007843
申请日：2011-01-18
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HON KI-PYO
IPC分类号： H05K3/46
CPC分类号： C04B41/52 , C04B41/009 , C04B41/89 , C04B2111/00844 , H05K3/22 , H05K3/4629 , H05K2203/025 , Y10T428/20 , C04B35/00 , C04B41/4539 , C04B41/4572 , C04B41/5022 , C04B41/5031
摘要： PROBLEM TO BE SOLVED: To provide a manufacturing method of a ceramic substrate and a ceramic substrate manufactured thereby.SOLUTION: A manufacturing method of a ceramic substrate comprises a step of forming a first adhesive layer on a blister provided for a ceramic substrate, a step of filling with filler the blister provided with the first adhesive layer, and a step of curing the ceramic substrate. According to the present invention, the blister provided for the ceramic substrate can be removed and the ceramic substrate with a uniform substrate surface and higher reliability can be provided.
摘要翻译：要解决的问题：提供由此制造的陶瓷基板和陶瓷基板的制造方法。＆lt; P＆gt;解决方案：陶瓷基板的制造方法包括在为陶瓷基板提供的泡罩上形成第一粘合剂层的步骤，向填料填充设置有第一粘合剂层的泡罩的步骤，以及固化步骤陶瓷基板。根据本发明，可以去除为陶瓷基板提供的泡罩，并且可以提供具有均匀基板表面和更高可靠性的陶瓷基板。版权所有（C）2012，JPO＆INPIT

4. 发明专利

JP2011202940A Baking furnace for ceramic product and baking method using the same 审中-公开
标题翻译：烘烤炉用于陶瓷产品和烘烤方法
公开(公告)号：JP2011202940A
公开(公告)日：2011-10-13
申请号：JP2011000399
申请日：2011-01-05
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HONG KI PYO , KIM JIN WAUN
IPC分类号： F27B17/00 , C04B35/64
摘要： PROBLEM TO BE SOLVED: To provide a baking furnace for ceramic product, and a baking method using the same.SOLUTION: The baking furnace for ceramic product includes a furnace body containing a heat insulating material; a setter disposed inside the furnace body, and having a ceramic molding placed on an upper portion thereof; an exhaust opening arranged in an upper portion of the heat insulating material; at least one heating element arranged around the ceramic molding; and at least one mesh arranged around the ceramic molding so that the inside of the furnace body maintains a uniform temperature gradient, the mesh being composed of at least one selected from metal, an alloy, an oxide and a nitride. The baking method uses this baking furnace. According to these furnace and method, change in characteristics of a ceramic product due to a difference in temperature gradient in baking can be prevented by minimizing the temperature gradient inside the baking furnace.
摘要翻译：要解决的问题：提供一种用于陶瓷制品的烘烤炉和使用其的烘烤方法。该方法：陶瓷制品的烘烤炉包括一个包含绝热材料的炉体; 设置在炉体内部并具有置于其上部的陶瓷模制件的固定器; 布置在绝热材料的上部的排气口; 布置在所述陶瓷模制件周围的至少一个加热元件; 以及至少一个布置在所述陶瓷模制件周围的网，使得所述炉体的内部保持均匀的温度梯度，所述网由选自金属，合金，氧化物和氮化物中的至少一种构成。烘焙方法使用这种烤炉。根据这些炉子和方法，可以通过使焙烧炉内的温度梯度最小化来防止由于烘烤中的温度梯度的差异导致的陶瓷制品的特性变化。

5. 发明专利

JP2011044681A Ceramic substrate, and manufacturing method therefor 审中-公开
标题翻译：陶瓷基板及其制造方法
公开(公告)号：JP2011044681A
公开(公告)日：2011-03-03
申请号：JP2009239675
申请日：2009-10-16
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： SUNG JE HONG , KIM JIN-WAN , CHANG MYUNG WHUN
IPC分类号： H05K3/46
CPC分类号： H05K3/4061 , H05K1/113 , H05K3/0029 , H05K3/245 , H05K3/4629 , H05K2201/096 , H05K2201/09827 , H05K2201/09845 , H05K2203/0242 , H05K2203/1476 , Y10T29/49117 , Y10T29/49126 , Y10T29/49149 , Y10T29/49155 , Y10T29/49165
摘要： PROBLEM TO BE SOLVED: To prevent reliability of a ceramic substrate from getting low caused by a defect in the periphery of a via, in the substrate. SOLUTION: This ceramic substrate includes a ceramic laminate 100 laminated with a multilayered ceramic layers 10a, 10b, 10c, interlayer-connected through the via 30 provided in the respective ceramic layers 10a, 10b, 10c, and formed with a hole 40 for exposing an upper part of the via 30 in the surface ceramic layer 10a, a conductor 40a filled in the hole 40, and an external electrode 50 formed to be connected electrically to the conductor 40a on a surface of the ceramic laminate 100. COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：为了防止在基板中通孔周边的缺陷引起的陶瓷基板的可靠性降低。解决方案：该陶瓷基板包括层叠有通过设置在各个陶瓷层10a，10b，10c中的通路30夹层连接的多层陶瓷层10a，10b，10c的陶瓷层压体100，并且形成有孔40 用于暴露表面陶瓷层10a中的通孔30的上部，填充在孔40中的导体40a和形成为与陶瓷层压体100的表面上的导体40a电连接的外部电极50.
版权所有（C）2011，JPO＆INPIT

6. 发明专利

JP2013191899A Multilayer ceramic circuit substrate and manufacturing method 有权
标题翻译：多层陶瓷电路基板和制造方法
公开(公告)号：JP2013191899A
公开(公告)日：2013-09-26
申请号：JP2013141241
申请日：2013-07-05
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , KIM JIN WAUN , LEE DAE HYEONG , HONG KI PYO
IPC分类号： H05K3/46 , H05K3/10
CPC分类号： H05K3/4629 , C04B37/001 , C04B2237/64 , H05K3/107
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer ceramic circuit substrate.SOLUTION: A method for manufacturing a multilayer ceramic circuit substrate comprises the steps of: preparing a plurality of ceramic green sheets; forming a groove having a desired line shape and a via hole connected to the groove in at least one ceramic green sheet of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with conductive material; forming a circuit line connected to the conductive via by filling the groove with the conductive material; stacking the plurality of ceramic green sheets, and forming a ceramic green sheet stack; and sintering the ceramic green sheet stack.
摘要翻译：要解决的问题：提供一种制造多层陶瓷电路基板的方法。解决方案：一种制造多层陶瓷电路基板的方法，包括以下步骤：制备多个陶瓷生片; 在所述多个陶瓷生片的至少一个陶瓷生片中形成具有所需线形状的沟槽和与所述沟槽连接的通孔; 通过用导电材料填充通孔形成导电通孔; 通过用所述导电材料填充所述凹槽来形成连接到所述导电孔的电路线; 堆叠多个陶瓷生片，形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。

7. 发明专利

JP2012042446A Method for repairing probe board and probe board using the method 有权
标题翻译：使用该方法修复探针板和探针板的方法
公开(公告)号：JP2012042446A
公开(公告)日：2012-03-01
申请号：JP2011001786
申请日：2011-01-07
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , LEE DAE HYEONG , HON KI-PYO
IPC分类号： G01R1/073 , H05K1/11 , H05K3/22 , H05K3/40
CPC分类号： H05K1/11 , G01R1/02 , H05K1/09 , H05K3/225 , H05K3/4015 , H05K3/4061 , Y10T29/49002 , Y10T29/49149 , Y10T29/49165 , Y10T29/49726 , Y10T29/49748
摘要： PROBLEM TO BE SOLVED: To provide a method for repairing a probe board and to provide a probe board using the method.SOLUTION: The method for repairing a probe board includes steps of forming a plurality of first via electrodes filled with a first filling substance in a substrate made of a ceramic sintered body; forming a via hole in a via electrode with conductivity failure among the plurality of first via electrodes; filling the via hole with a second filling substance having a lower sintering temperature than that of the first filling substance; and forming a second via electrode by sintering the second filling substance. Repairing the via electrode with conductivity failure results in an improvement of the yield of the board and reduction of the cost of manufacturing.
摘要翻译：要解决的问题：提供修复探针板的方法，并使用该方法提供探针板。解决方案：用于修复探针板的方法包括以下步骤：在由陶瓷烧结体制成的衬底中形成多个填充有第一填充物质的第一通孔电极; 在所述多个第一通孔电极中形成具有导电性故障的通路电极中的通孔; 用比第一填充物质烧结温度低的第二填充物填充通孔; 以及通过烧结所述第二填充物质形成第二通孔电极。电导率故障修复导通电极会导致电路板产量的提高和制造成本的降低。版权所有（C）2012，JPO＆INPIT

8. 发明专利

JP2009117840A Constraining green sheet and method of manufacturing multilayer ceramic substrate using the same 有权
标题翻译：约束绿色板材及使用其制造多层陶瓷基板的方法
公开(公告)号：JP2009117840A
公开(公告)日：2009-05-28
申请号：JP2008285333
申请日：2008-11-06
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHO BEOM JOON , LEE JONG MYEON , CHANG MYUNG WHUN
IPC分类号： H05K3/46 , C04B35/622 , C04B35/64
CPC分类号： B32B18/00 , C04B35/638 , C04B2235/3217 , C04B2235/5292 , C04B2235/5436 , C04B2235/6562 , C04B2235/6567 , C04B2235/721 , C04B2235/9615 , C04B2237/562 , H05K1/0306 , H05K3/4611 , H05K3/4629 , H05K2201/0209 , H05K2201/0266 , H05K2201/0269 , H05K2203/308 , Y10T428/24942 , Y10T428/2495 , Y10T428/25 , Y10T428/252
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing multilayer ceramic substrate. SOLUTION: A hard-to-sinter constraining green sheet is provided which is arranged on at least one of the upper and lower faces of a non-sintered multilayer ceramic substrate. It includes a first constraining layer having a face arranged on the multilayer ceramic substrate and containing first organic binder and first inorganic powder spherically shaped or spherically shaped similarly thereto, and a second constraining layer bonded to the upper face of the first constraining layer, and containing second organic binder and second inorganic powder flake-shaped and having lower powder filling density than the first constraining layer has. Moreover, the method of manufacturing multilayer ceramic substrate using the same is provided. COPYRIGHT: (C)2009,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造多层陶瓷基板的方法。解决方案：提供了一种难烧结的约束生片，其布置在非烧结多层陶瓷衬底的上表面和下表面中的至少一个上。它包括第一约束层，其具有布置在多层陶瓷基片上的表面，并且包含第一有机粘合剂和与其类似地球形或球形的第一无机粉末，以及粘合到第一约束层的上表面的第二约束层，第二有机粘合剂和第二无机粉末片状，并且具有比第一约束层更低的粉末填充密度。此外，提供了使用其制造多层陶瓷基板的方法。版权所有（C）2009，JPO＆INPIT

9. 发明专利

JP2007227926A Method of manufacturing light emitting diode package 审中-公开
标题翻译：制造发光二极管封装的方法
公开(公告)号：JP2007227926A
公开(公告)日：2007-09-06
申请号：JP2007039580
申请日：2007-02-20
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： LEE HAI SUNG , LEE JONG MYEON , CHOO HO SUNG , CHANG MYUNG WHUN , PARK YOUN GON
IPC分类号： H01L33/22 , H01L33/54 , H01L33/56 , H01L33/60
CPC分类号： H01L33/54 , H01L2224/48247 , H01L2224/48257 , H01L2924/181 , H01L2933/0091 , H01L2924/00012
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing an LED package capable of increasing a light extraction efficiency on a surface of a translucent resin part such as a molding resin or lens. SOLUTION: After mounting an LED chip 105, the LED chip 105 is sealed by a molding resin 107 (stage S1). As the molding resin 107, for example, a silicon resin can be used. Thereafter, the molding resin 107 for sealing the LED chip 105 is cured (stage S2). Thereafter, roughness is formed on the surface of the molding resin 107 by using a laser abrasion step (stage S3). COPYRIGHT: (C)2007,JPO&INPIT
摘要翻译：解决的问题：提供一种制造能够提高诸如模制树脂或透镜的半透明树脂部件的表面上的光提取效率的LED封装的方法。解决方案：在安装LED芯片105之后，LED芯片105被模制树脂107密封（阶段S1）。作为成型树脂107，例如可以使用硅树脂。此后，固化用于密封LED芯片105的模塑树脂107（阶段S2）。此后，通过使用激光磨损步骤（阶段S3）在模制树脂107的表面上形成粗糙度。版权所有（C）2007，JPO＆INPIT

10. 发明专利

JP2011146667A Multilayer ceramic circuit substrate, and method of manufacturing the same 有权
标题翻译：多层陶瓷电路基板及其制造方法
公开(公告)号：JP2011146667A
公开(公告)日：2011-07-28
申请号：JP2010135398
申请日：2010-06-14
申请人： Samsung Electro-Mechanics Co Ltd , サムソンエレクトロ−メカニックスカンパニーリミテッド.
发明人： CHANG MYUNG WHUN , KIM JIN WAUN , LEE DAE HYEONG , HONG KI PYO
IPC分类号： H05K3/46 , H05K3/00 , H05K3/10
CPC分类号： H05K3/4629 , C04B37/001 , C04B2237/64 , H05K3/107
摘要： PROBLEM TO BE SOLVED: To provide a method of manufacturing a multilayer ceramic circuit substrate.
SOLUTION: The method for manufacturing a multilayer ceramic circuit substrate may include the stages of: preparing a plurality of ceramic green sheets; forming a recess having a desired line shape and a via hole connected to the recess in at least one of the plurality of ceramic green sheets; forming a conductive via by filling the via hole with a conductive material; forming a circuit line connected to the conductive via by filling the recess with a conductive material; stacking the plurality of ceramic green sheets upon one another to thereby form a ceramic green sheet stack; and sintering the ceramic green sheet stack.
COPYRIGHT: (C)2011,JPO&INPIT
摘要翻译：要解决的问题：提供一种制造多层陶瓷电路基板的方法。解决方案：制造多层陶瓷电路基板的方法可以包括以下步骤：制备多个陶瓷生片; 在所述多个陶瓷生片中的至少一个中形成具有所需线状的凹部和与所述凹部连接的通孔; 通过用导电材料填充所述通孔来形成导电通孔; 通过用导电材料填充凹槽来形成连接到导电通孔的电路线; 将多个陶瓷生片堆叠在一起形成陶瓷生片叠层; 并烧结陶瓷生片堆叠。版权所有（C）2011，JPO＆INPIT

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