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1. 发明授权

EP1088347B1 Single charge carrier transistor and detection method using the same 有权
标题翻译：相同的单个电荷载体晶体管和检测方法，使用
公开(公告)号：EP1088347B1
公开(公告)日：2011-11-23
申请号：EP99957113.6
申请日：1999-06-18
申请人： QinetiQ Limited
发明人： JEFFERSON, John Henry , PHILLIPS, Timothy Jonathan
IPC分类号： H01L29/772 , H01L29/78 , H01L29/201 , H01L29/205 , H01L29/221 , H01L29/225
CPC分类号： B82Y10/00 , H01L29/125 , H01L29/127 , H01L29/66469 , H01L29/7613 , H01L29/775 , Y10S977/937
摘要： A single electron on hole field effect transistor fabricated from a narrow band gap semiconductor. The transistor is such that the valence and conduction bands have sufficiently similar energy levels such that a top region of the valence band at one point (37), e.g. under a gate electrode (34), within the current path of the transistor can be forced to be higher than the bottom region of the conduction band at another point within the transistor, allowing Zener tunnelling to occur. The transistor is fabricated from semiconductors with band gaps narrow enough to allow this to occur, for instance InSb and InAISb, CdTe and CdxHg1-xTe.

2. 发明授权

EP1078461B1 SCHALTUNGSANORDNUNG MIT EINZELELEKTRON-BAUELEMENTEN UND VERFAHREN ZU DEREN BETRIEB 有权
标题翻译：个别电子组件的电路和方法操作
公开(公告)号：EP1078461B1
公开(公告)日：2002-09-18
申请号：EP99919077.0
申请日：1999-03-15
申请人： Infineon Technologies AG
发明人： RÖSNER, Wolfgang , RAMCKE, Ties , RISCH, Lothar
IPC分类号： H03K19/08
CPC分类号： G06F7/527 , B82Y10/00 , G06F7/502 , G06F7/505 , G06F2207/4828 , H03K19/08 , Y10S977/936 , Y10S977/937 , Y10S977/94
摘要： A circuit with at least five individual electron transistors, whereby three of said transistors (ET1, ET2, ET3) are mounted between a first main node (H1) and an output (A) via a second main node (H2) and a third main node (H3). The fourth individual electron transistor (ET4) is mounted between the second main node and a first supply voltage (V1), whereby the gate electrode pertaining thereto (G4) is connected to the first main node (H1). The fifth individual electron transistor (ET5) is mounted between the third main node (H3) and the first supply voltage (VI), whereby the gate electrode (G5) pertaining thereto is connected to the second main node (H2). The circuit is suitable for use as a full loader and a multiplier.

3. 发明公开

EP0836232A1 TUNNELLING DEVICE AND METHOD OF PRODUCING A TUNNELLING DEVICE 失效
标题翻译：隧道设备和生产隧道设备的方法
公开(公告)号：EP0836232A1
公开(公告)日：1998-04-15
申请号：EP97917492.7
申请日：1997-03-25
申请人： Samsung Electronics Co., Ltd. , Gubin, Sergei Pavlovich , Kolesov, Vladimir Vladimirovich , Soldatov, Evgenii Sergeevich , Trifonov, Artem Sergeevich , Khanin, Vladimir Viktorovich
发明人： GUBIN, Sergei Pavlovich , KOLESOV, Vladimir Vladimirovich , SOLDATOV, Evgenii Sergeevich , TRIFONOV, Artem Sergeevich , KHANIN, Vladimir Viktorovich , KHOMUTOV, Genadii Borisovich , YAKOVENKO, Sergei Alexandrovich
IPC分类号： H01L29/86
CPC分类号： B82Y10/00 , H01L29/7613 , H01L49/006 , Y10S977/937
摘要： The tunnel-effect device comprises an input electrode 3, an output electrode 4, and N control electrodes 5 separated with tunneling barriers, the latter barriers and the interbarrier space therein appear as an ordered structure of molecules and clusters establishing tunneling junctions; each control electrode 5 is located in the region of the ordered structure of molecules and clusters 2. The dimensions and properties of the molecules provide for single-electron correlated electron tunneling at a relatively high (room) temperature.
The tunnel-effect device functions on the base of controlled correlated electron tunneling. Possibility of controlling the tunneling current opens the way to constructing various electronic gate circuits on the base of single-electron tunneling junctions and hence to preparing single-electron analog and digital devices, in particular, high-sensitivity sensors.
The method for preparing the tunnel-effect device consists in establishing on the surface of a solid-state substrate an input electrode, an output electrode, and control electrodes followed by formation of an inert dielectric molecular matrix with orderly built-in active molecules and clusters which are the localization centers of the tunneling electrons and thus establish single-electron tunneling junctions.
The effect of discrete tunneling of individual current carriers through tunneling barriers at room temperature used in the tunnel-effect device may also be applied in a single-electron transistor and used for constructing single-electron gate circuits, wherein logical 1" and 0" are identified with the presence or absence of an electron.
摘要翻译：隧道效应器件包括输入电极3，输出电极4和N个控制电极5，隧道势垒隔开，后者屏障和屏障间空间表现为建立隧道结的分子和簇的有序结构; 每个控制电极5位于分子和簇2的有序结构的区域中。分子的尺寸和性质在相对高的（房间）温度下提供单电子相关电子隧道效应。隧道效应器件在受控相关电子隧穿的基础上起作用。控制隧穿电流的可能性打开了在单电子隧道结基础上构建各种电子门电路的方式，并因此为准备单电子模拟和数字器件，特别是高灵敏度传感器开辟了道路。用于制备隧道效应器件的方法包括在固态衬底的表面上建立输入电极，输出电极和控制电极，接着形成具有有序内置活性分子和簇的惰性介电分子矩阵它们是隧道电子的定位中心并因此建立单电子隧道结。在隧道效应器件中使用的室温下各个电流载流子的离散隧道效应也可以应用于单电子晶体管并用于构建单电子门电路，其中逻辑1“和0”是与电子的存在或不存在一致。

4. 发明公开

EP0718894A2 Coulomb-blockade element and method of manufacturing the same 失效
标题翻译：库伦封锁元素和Verfahren zur Herstellung
公开(公告)号：EP0718894A2
公开(公告)日：1996-06-26
申请号：EP95250256.5
申请日：1995-10-24
申请人： NIPPON TELEGRAPH AND TELEPHONE CORPORATION
发明人： Takahashi, Yasuo , Nagase, Masao , Fujiwara, Akira
IPC分类号： H01L29/76 , H01L21/334
CPC分类号： B82Y10/00 , H01L29/66469 , H01L29/7613 , Y10S977/937
摘要： A Coulomb-blockade element includes a silicon layer formed on a substrate through an insulating film. The silicon layer includes a narrow wire portion and first and second electrode portions. The narrow wire portion serves as a conductive island for confining a charge. The first and second electrode portions are formed to be connected to the two ends of the narrow wire portion and are wider than the narrow wire portion. Each of the first and second electrode portions has constrictions on at least one of the upper and lower surfaces thereof, which make a portion near the narrow wire portion thinner than the narrow wire portion.
摘要翻译：库仑阻挡元件包括通过绝缘膜（3）形成在基板（2）上的硅层（4）。硅层（4）包括窄线部分（10）和第一和第二电极部分（11,12）。窄线部分（10）用作限制电荷的导电岛。第一和第二电极部分（11,12）形成为连接到窄线部分（10）的两端并且比窄线部分宽。第一和第二电极部分（11,12）中的每一个在其上表面和下表面中的至少一个上具有收缩，这使得窄线部分附近的部分比窄线部分更薄。

5. 发明公开

EP0675546A2 Verfahren zur Herstellung eines Einzelelektronen-Bauelementes 失效
标题翻译：一种用于制造单电子器件的方法。
公开(公告)号：EP0675546A2
公开(公告)日：1995-10-04
申请号：EP95102892.7
申请日：1995-03-01
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： Rösner, Wolfgang, Dr. , Vogelsang, Thomas, Dr.
IPC分类号： H01L29/78 , H01L29/423 , H01L21/335
CPC分类号： B82Y10/00 , H01L29/66439 , H01L29/7613 , Y10S977/937
摘要： Zur Herstellung eines Einzelelektroden-Bauelementes in MOS-Technik wird in einem Siliziumsubstrat (14) ein aktives Gebiet definiert, das mit einem Gatedielektrikum (16) versehen wird. Mit Hilfe eines Feinstrukturierungsverfahrens, insbesondere mit Elektronenstrahl-Lithographie, wird eine erste Gateebene (12) mit feinen Strukturen
摘要翻译：为了生产在MOS技术的单组分电极，有源区是在硅衬底（14），其设置有一个栅极电介质（16）中所定义。使用精细图案形成方法，特别是用电子束光刻，第一栅极电平（12）产生的<与精细结构，表面和侧面用绝缘层（17，17A）被覆盖100纳米。它创建至少覆盖所述第一栅极电平（12）的精细结构中的有源区的区域上的第二栅极层（13）。

6. 发明公开

EP3037382A1 Graphene double-barrier resonant tunneling device 审中-公开
标题翻译： Resonante Tunneleffektvorrichtung aus Graphen mit Doppelbarriere
公开(公告)号：EP3037382A1
公开(公告)日：2016-06-29
申请号：EP14200335.9
申请日：2014-12-24
申请人： Nokia Technologies OY
发明人： Astley, Michael Robert
IPC分类号： B82Y10/00 , H01L29/73 , H01L29/88 , H01L29/08 , H01L29/16 , H01L29/76
CPC分类号： H01L29/0895 , B82Y10/00 , C01B21/064 , C01B32/182 , C01P2006/40 , H01L29/1606 , H01L29/2003 , H01L29/7311 , H01L29/7613 , H01L29/882 , Y10S977/734 , Y10S977/831 , Y10S977/937
摘要： An apparatus comprising: a fermion source nanolayer (90); a first insulating nanolayer (92); a fermion transport nanolayer (94); a second insulating nanolayer (96); a fermion sink nanolayer (98); a first contact for applying a first voltage to the fermion source nanolayer; a second contact for applying a second voltage to the fermion sink nanolayer; and a transport contact for enabling an electric current via the fermion transport nanolayer. In a particular example, the apparatus comprises three graphene sheets (90, 94, 98) interleaved with two-dimensional Boron-Nitride (BN) layers (92, 96).
摘要翻译：一种装置，包括：费米子源纳米层（90）; 第一绝缘纳米层（92）; 费米子运输纳米层（94）; 第二绝缘纳米层（96）; 费米子槽纳米层（98）; 用于将第一电压施加到费米籽源纳米层的第一接触; 用于向所述费米子槽纳米层施加第二电压的第二接触; 以及用于通过费米子运输纳米层实现电流的运输接触件。在具体示例中，该装置包括与二维硼氮化物（BN）层（92,96）交错的三个石墨烯片（90,94,98）。

7. 发明授权

EP1974388B1 MULTIPLE QUANTUM WELL DEVICES 有权
标题翻译：多量子BODY安排
公开(公告)号：EP1974388B1
公开(公告)日：2012-09-12
申请号：EP06830388.2
申请日：2006-12-05
申请人： International Business Machines Corporation
发明人： KATAYAMA, Yasunao , NEWNS, Dennis , TSUEI, Chang, Chyi
IPC分类号： H01L21/335
CPC分类号： H01L29/152 , B82Y10/00 , G11C11/14 , H01L29/41766 , H01L29/66431 , H01L29/66462 , H01L29/7782 , H01L29/7783 , Y10S977/937

8. 发明公开

EP2130229A4 CHARGE STORAGE NANOSTRUCTURE 审中-公开
标题翻译：电荷存储性纳米结构
公开(公告)号：EP2130229A4
公开(公告)日：2010-10-06
申请号：EP08724281
申请日：2008-03-26
申请人： QUNANO AB
发明人： SAMUELSON LARS , THELANDER CLAES
IPC分类号： H01L29/775 , G11C11/412 , G11C13/02 , H01L21/336 , H01L27/115 , H01L29/06 , H01L29/788 , H01L29/792
CPC分类号： H01L29/7881 , B82Y10/00 , G11C13/025 , G11C2213/16 , H01L27/11521 , H01L27/1156 , H01L29/0665 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/66477 , H01L29/7888 , H01L29/792 , H01L29/7926 , Y10S977/936 , Y10S977/937 , Y10S977/938

9. 发明公开

EP1474832A1 METHOD AND SYSTEM FOR MOLECULAR CHARGE STORAGE FIELD EFFECT TRANSISTOR 审中-公开
标题翻译：方法和系统分子电荷MEMORY场效应晶体管
公开(公告)号：EP1474832A1
公开(公告)日：2004-11-10
申请号：EP02805137.3
申请日：2002-12-12
申请人： The Regents of the University of California , North Carolina State University
发明人： MISRA, Veena , BOCIAN, David, F. , KUHR, Werner, G. , LINDSEY, Jonathan, S.
IPC分类号： H01L29/792
CPC分类号： H01L27/283 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/53 , H01L51/052 , H01L51/0529 , Y10S977/721 , Y10S977/887 , Y10S977/937
摘要： A method and/or system and/or apparatus for a molecular-based FET device (an m-FET) uses charge storing molecules (120) between a gate (110) and channel (105) of an FET-type transistor. Further embodiments describe fabrication methods for using combinations of standard practices in lithography and synthetic chemistry and novel elements.

10. 发明公开

EP1407493A1 SINGLE-ELECTRON TRANSISTORS AND FABRICATION METHODS IN WHICH A PROJECTING FEATURE DEFINES SPACING BETWEEN ELECTRODES 有权
标题翻译：用于生产单电晶体管和方法有什么突出的一部分引线之间的空间中定义
公开(公告)号：EP1407493A1
公开(公告)日：2004-04-14
申请号：EP02759144.5
申请日：2002-07-12
申请人： Quantum Logic Devices Inc.
发明人： BROUSSEAU, III, Louis, C.
IPC分类号： H01L29/76
CPC分类号： B82Y10/00 , H01L29/7613 , H01L49/006 , Y10S438/962 , Y10S977/937 , Y10T428/24612 , Y10T428/2462 , Y10T428/24628 , Y10T428/24678
摘要： A single-electron transistor includes a projecting feature, such as a pyramid (150), that projects from a face of a substrate (100). A first electrode (110) is provided on the substrate face that extends onto the projecting feature. A second electrode (120) is provided on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode. At least one nanoparticle (140) is provided on the projecting feature between the first and second electrodes (110, 120). Accordingly, the geometric configuration of the projecting feature can define the spacing between the first and second electrodes (110, 120). The single-electron transistors may be fabricated by forming a projecting feature on a substrate that projects from a face thereof, forming a first electrode (110) on the substrate face that extends onto the projecting feature, forming a second electrode (120) on the substrate face that extends onto the projecting feature and that is spaced apart from the first electrode, and placing at least one nanoparticle (140) on the projecting feature between the first and second electrodes (110, 120).

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