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1. 发明公开

EP0426877A4 METHOD OF PRODUCING COMPOUND SEMICONDUCTOR DEVICES 失效
标题翻译：生产化合物半导体器件的方法
公开(公告)号：EP0426877A4
公开(公告)日：1993-01-27
申请号：EP90907474
申请日：1990-05-29
申请人： NIPPON MINING COMPANY
发明人： SHIMAKURA, HARUHITO NIPPON MINING CO., LTD , ODA, OSAMU NIPPON MINING CO., LTD , KAINOSHO, KEIJI NIPPON MINING CO., LTD
IPC分类号： H01L21/28 , H01L21/285 , H01L21/316 , H01L21/336 , H01L29/78 , H01L29/812 , H01L29/872 , H01L21/31
CPC分类号： H01L29/66522 , H01L21/02241 , H01L21/02255 , H01L21/28264 , H01L21/28581 , H01L21/31666 , H01L29/78 , H01L29/812 , H01L29/872 , Y10S148/065 , Y10S148/118 , Y10S148/119
摘要： A method of producing semiconductor devices wherein a compound semiconductor substrate is contained in a quartz ampoule together with an oxygen gas and elements having higher vapor pressures among those elements constituting the substrate, the ampoule is then sealed and is heated to form an oxide film on the surface of the compound semiconductor substrate, followed by the formation of an electrode metal layer thereon. Thus, there are formed a MOS diode having a small interface level density and a Schottky electrode having a great barrier height and a small ideal factor. Namely, there are obtained a Schottky diode having a good forward current vs. voltage characteristic, a small reverse current and excellent rectifying property and MESFET having small variations in the threshold voltage.
摘要翻译：一种制造半导体器件的方法，其中化合物半导体衬底与构成衬底的那些元素中的氧气和较高蒸气压的元素一起包含在石英安瓿中，然后将安瓿密封并加热以形成氧化膜化合物半导体衬底的表面，然后在其上形成电极金属层。因此，形成了具有小的界面密度的MOS二极管和具有大的势垒高度和小的理想因子的肖特基电极。即，得到肖特基二极管具有良好的正向电流对电压特性，小的反向电流和优异的整流特性以及阈值电压变化小的MESFET。

2. 发明授权

EP0175436B1 Semiconductor processing 失效
标题翻译：半导体加工
公开(公告)号：EP0175436B1
公开(公告)日：1992-02-05
申请号：EP85303006.2
申请日：1985-04-29
申请人： NORTHERN TELECOM LIMITED
发明人： Greene, Peter David , Renner, Daniel S.O. c/o Marijo Jones
IPC分类号： H01L21/205 , H01L33/00 , C30B25/22
CPC分类号： C23C16/4488 , H01L21/02392 , H01L21/02461 , H01L21/02543 , H01L21/02546 , H01S5/2095 , H01S5/227 , H01S5/2275 , Y10S148/065 , Y10S148/119

3. 发明授权

EP0426877B1 METHOD OF PRODUCING COMPOUND SEMICONDUCTOR DEVICES 失效
标题翻译：制备化合物半导体布置。
公开(公告)号：EP0426877B1
公开(公告)日：1995-08-23
申请号：EP90907474.2
申请日：1990-05-29
申请人： JAPAN ENERGY CORPORATION
发明人： SHIMAKURA, Haruhito Nippon Mining Co., Ltd , ODA, Osamu Nippon Mining Co., Ltd , KAINOSHO, Keiji Nippon Mining Co., Ltd
IPC分类号： H01L21/316 , H01L21/28
CPC分类号： H01L29/66522 , H01L21/02241 , H01L21/02255 , H01L21/28264 , H01L21/28581 , H01L21/31666 , H01L29/78 , H01L29/812 , H01L29/872 , Y10S148/065 , Y10S148/118 , Y10S148/119
摘要： A method of producing semiconductor devices wherein a compound semiconductor substrate is contained in a quartz ampoule together with an oxygen gas and elements having higher vapor pressures among those elements constituting the substrate, the ampoule is then sealed and is heated to form an oxide film on the surface of the compound semiconductor substrate, followed by the formation of an electrode metal layer thereon. Thus, there are formed a MOS diode having a small interface level density and a Schottky electrode having a great barrier height and a small ideal factor. Namely, there are obtained a Schottky diode having a good forward current vs. voltage characteristic, a small reverse current and excellent rectifying property and MESFET having small variations in the threshold voltage.

4. 发明公开

EP0362952A1 Method of manufacturing an epitaxial indium phosphide layer on a substrate surface 失效
标题翻译： Verfahren zur Herstellung einer磷酸锑 - Epitaxialschicht au e einerSubstratoberfläche。
公开(公告)号：EP0362952A1
公开(公告)日：1990-04-11
申请号：EP89202472.0
申请日：1989-10-02
申请人： Philips Electronics N.V.
发明人： Staring, Aemilianus Gradus Johannes
IPC分类号： C30B25/02 , C30B29/40
CPC分类号： C30B25/02 , C23C16/301 , C30B29/40 , G05B2219/49013 , Y10S148/11 , Y10S148/119
摘要： A method of manufacturing an epitaxial InP layer on a substrate surface by means of a MOVPE process at atmospheric pressure, cyclopentadienyl indium (I) or alkyl cyclopentadienyl indium (I) being used as the indium precursor, thereby precluding side reactions.
摘要翻译：在大气压下通过MOVPE工艺在衬底表面上制造外延InP层的方法，使用环戊二烯基铟（I）或烷基环戊二烯基铟（I）作为铟前体，从而排除副反应。

5. 发明公开

EP0305990A2 Distributed bragg reflector type semiconductor laser and method of manufacturing same 失效
标题翻译： Halbleiterlaser mit verteiltem Bragg-Reflektor und Verfahren zu seiner Herstellung。
公开(公告)号：EP0305990A2
公开(公告)日：1989-03-08
申请号：EP88114187.3
申请日：1988-08-31
申请人： RESEARCH DEVELOPMENT CORPORATION OF JAPAN , SUMITOMO ELECTRIC INDUSTRIES LIMITED , TOKYO INSTITUTE OF TECHNOLOGY
发明人： Nishizawa, Hideaki , Takahashi, Mitsuo , Suematsu, Yasuharu
IPC分类号： H01S3/19 , H01L21/306
CPC分类号： H01S5/125 , Y10S148/095 , Y10S148/119
摘要： Disclosed are a distributed Bragg reflector type semiconductor laser and a method of manufacturing such a laser a high yields, in which the upper surface of an active waveguide is covered by an external waveguide, the external waveguide is disposed on the same surface as the active waveguide at side portions thereof, the external waveguide is coupled with the edge surfaces of the active waveguide without any gap remaining, and the coupling ratio of the active waveguide and external waveguide is high.
摘要翻译：本发明公开了一种分布式布拉格反射体型半导体激光器及其制造方法，其中有源波导的上表面被外部波导覆盖，外部波导设置在与有源波导相同的表面上在其侧面部分，外部波导与有源波导的边缘表面耦合，而没有任何间隙，并且有源波导和外部波导的耦合比高。

6. 发明公开

EP0233725A2 Opto-Electronic Device and Method for its Manufacture 失效
标题翻译：光电器件及其制造方法
公开(公告)号：EP0233725A2
公开(公告)日：1987-08-26
申请号：EP87300903.9
申请日：1987-02-02
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Kinoshita, Jun'ichi c/o Patent Division , Suzuki, Nobuo c/o Patent Division , Morinaga, Motoyasu c/o Patent Division , Hirayama, Yuzo c/o Patent Division , Nakamura, Masaru c/o Patent Division
IPC分类号： H01L29/80 , H01L27/15 , H01L33/00 , H01S3/19 , H01L21/28 , H01L21/306 , H01L21/82 , H01L21/76
CPC分类号： H01S5/0422 , H01L21/30612 , H01L21/8252 , H01L27/15 , H01L29/812 , H01L33/0062 , H01S5/0208 , H01S5/0261 , H01S5/06203 , H01S5/20 , H01S5/32391 , Y10S148/053 , Y10S148/095 , Y10S148/119
摘要： In a monolithic OEIC in which an FET (Q1) and a light-emitting device (LD) are integrated, the light-emitting device (LD) has a first clad layer (14), an active layer (15,), and a second clad layer (17) stacked on a substrate (11), the FET (Q1) has a channel layer (12) and source and drain layers (14 2 , 14 3 ) with a high impurity concentration stacked on the substrate (11), etching mask layers (15 2 , 15 3 ) on the source and drain layers (14 2 , 14 3 ), and a gate electrode (22) formed on a channel layer (12) between source and drain electrodes (21 1 , 21 2 ) and the source and drain layers (14 2 , 14 3 ), the first clad layer (14 1 ) of the light-emitting diode (LD) and the source and drain layers (14 2 , 14 3 ) with a high impurity concentration of the FET (Q 1 ) are formed of the same semiconductor layer, and an active layer (15 1 ) of the light-emitting device (LD) and the etching mask layers (15 2 , 15 3 ) of the FET (Q1) are formed of the same semiconductor layer.
摘要翻译：在集成了FET（Q1）和发光元件（LD）的单片式OEIC中，发光元件（LD）具有第一包覆层（14），活性层（15）和（11）上堆叠的第二覆盖层（17），FET（Q1）具有沟道层（12）和堆叠在衬底（11）上的具有高杂质浓度的源极和漏极层（142,143）在源极和漏极层（142,143）上的掩模层（152,153）以及在源极和漏极电极（211,212）与源极和漏极层之间的沟道层（12）上形成的栅极电极（22）（142,143），发光二极管（LD）的第一覆盖层（141）和FET（Q1）的高杂质浓度的源极和漏极层（142,143）由相同的半导体层，并且发光器件（LD）的有源层（151）和FET（Q1）的蚀刻掩模层（152,153）由相同的半导体层形成。

7. 发明授权

EP0242084B1 Preparation of semiconductor devices 失效
标题翻译：制造的半导体器件。
公开(公告)号：EP0242084B1
公开(公告)日：1994-02-16
申请号：EP87302815.3
申请日：1987-03-31
申请人： BRITISH TELECOMMUNICATIONS public limited company
发明人： Nelson, Andrew William , Cole, Simon , Harlow, Michael J. , Wong, Stanley Y.K.
IPC分类号： H01L21/205 , H01L33/00 , H01L21/324
CPC分类号： H01L21/02543 , H01L21/02546 , H01L21/02579 , H01L21/0262 , H01L21/02664 , H01L21/3245 , H01L33/0062 , Y10S148/015 , Y10S148/119 , Y10S438/902

8. 发明公开

EP0420143A3 Method of manufacturing semiconductor laser 失效
标题翻译：制造半导体激光的方法
公开(公告)号：EP0420143A3
公开(公告)日：1991-10-23
申请号：EP90118380.6
申请日：1990-09-25
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： Kamei, Hidenori, c/o Yokohama Works
IPC分类号： H01L33/00 , H01S3/19
CPC分类号： H01S5/227 , H01L33/0062 , H01S5/2081 , H01S5/2201 , H01S5/2275 , Y10S148/026 , Y10S148/051 , Y10S148/095 , Y10S148/119 , Y10S148/169 , Y10S438/978
摘要： According to this invention, a first cladding layer (2) of a first conductivity type, an active layer (3), a second cladding layer (4) of a second conductivity type, and a cap layer (5) much more susceptible to side etching than the second cladding layer (4) are sequentially grown on a (100) crystal plane of a semiconductor substrate (1) of the first conductivity type, and a stripe-like mask (7) extending in a direction is formed on the grown substrate to etch the stacked substrate. This etching is performed in a crystal orientation for forming an reverse triangular mesa. However, since the cap layer (5) is made of a material susceptible to side etching, a rounded mesa is formed. Thereafter, when a burying layer (10) is formed on the etched portion by a vapor phase epitaxy method, the burying layer (10) having a flat surface can be obtained depending on crystal orientations.

9. 发明公开

EP0420143A2 Method of manufacturing semiconductor laser 失效
标题翻译：韦尔法罕zur Herstellung eines Halbleiterlasers。
公开(公告)号：EP0420143A2
公开(公告)日：1991-04-03
申请号：EP90118380.6
申请日：1990-09-25
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： Kamei, Hidenori, c/o Yokohama Works
IPC分类号： H01L33/00 , H01S3/19
CPC分类号： H01S5/227 , H01L33/0062 , H01S5/2081 , H01S5/2201 , H01S5/2275 , Y10S148/026 , Y10S148/051 , Y10S148/095 , Y10S148/119 , Y10S148/169 , Y10S438/978
摘要： According to this invention, a first cladding layer (2) of a first conductivity type, an active layer (3), a second cladding layer (4) of a second conductivity type, and a cap layer (5) much more susceptible to side etching than the second cladding layer (4) are sequentially grown on a (100) crystal plane of a semiconductor substrate (1) of the first conductivity type, and a stripe-like mask (7) extending in a direction is formed on the grown substrate to etch the stacked substrate. This etching is performed in a crystal orientation for forming an reverse triangular mesa. However, since the cap layer (5) is made of a material susceptible to side etching, a rounded mesa is formed. Thereafter, when a burying layer (10) is formed on the etched portion by a vapor phase epitaxy method, the burying layer (10) having a flat surface can be obtained depending on crystal orientations.
摘要翻译：根据本发明，第一导电类型的第一包层（2），有源层（3），第二导电类型的第二包层（4）和更容易受到侧面影响的覆盖层（5）在第一导电型的半导体衬底（1）的（100）晶面上依次生长第二覆层（4）的蚀刻，并且形成沿<011>方向延伸的条状掩模（7）在生长的衬底上以蚀刻堆叠的衬底。该蚀刻以用于形成反向三角形台面的晶体取向进行。然而，由于盖层（5）由易受侧面蚀刻的材料制成，因此形成圆形台面。此后，当通过气相外延法在蚀刻部分上形成掩埋层（10）时，可以根据晶体取向获得具有平坦表面的掩埋层（10）。

10. 发明公开

EP0331103A3 A method for producing an opto-electronic integrated circuit 失效
标题翻译：一种用于生产光电集成电路的方法
公开(公告)号：EP0331103A3
公开(公告)日：1990-12-27
申请号：EP89103486.0
申请日：1989-02-28
申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.
发明人： Sasaki, Goro c/o Yokohama Works of
IPC分类号： H01L27/14 , H01L29/76 , H01L27/06
CPC分类号： H01L27/1443 , Y10S148/119 , Y10S148/12
摘要： Present invention is to provide a process for producing an opto-electronic integrated circuit comprising a field effect transistor as an electronic device and a photo-diode as an optical device both formed on an InP substrate,
the field effect transistor comprising a high electron mobility transistor having:
a GaInAs layer epitaxially grown on the InP substrate in a preset region thereof, a n-AlInAs layer epitaxially grown on the GaInAs layer, a gate electrode formed on the AlInAs layer, and a source electrode and a drain electrode formed on the AlInAs layer with the gate electrode therebetween, and
the photo-diode comprising a PIN photo-diode having:
the GaInAs layer epitaxially grown on the InP substrate near the region of the field effect transistor simultaneously with the growth of that of the field effect transistor, the n-AlInAs layer epitaxially grown on the GaInAs layer simultaneously with the growth of that of the field effect transistor, a n-InP layer epitaxially grown on the n-AlInAs layer, an undoped GaInAs layer epitaxially grown on the n-InP layer in a preset region thereof, a p-GaInAs layer epitaxially grown on the undoped GaInAs layer, an anode electrode formed on the p-GaInAs layer, and a cathode electrode formed on the n-InP layer near the undoped GaInAs layer.

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