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1. 发明公开

EP4380046A1 AN INPUT BUFFER AND A METHOD FOR REDUCING A SIGNAL AMPLITUDE DEPENDENCY OF SAID INPUT BUFFER 审中-公开
公开(公告)号：EP4380046A1
公开(公告)日：2024-06-05
申请号：EP22210186.7
申请日：2022-11-29
申请人： Imec VZW
发明人： MARKULIC, Nereo , CRANINCKX, Jan
IPC分类号： H03F1/32 , H03M1/12
CPC分类号： H03M1/12 , H03F1/3217 , H03F3/195 , H03F3/3028 , H03F2200/21320130101 , H03F2200/26720130101 , H03F2203/3008120130101 , H03F2203/3008420130101 , H03F2200/29720130101 , H03F2200/4220130101
摘要： An input buffer (1) for an analog-to-digital converter, ADC, (2) is provided. The input buffer is configured for receiving an input signal (Vin) and for outputting an output signal (Vout), and comprises an nMOS transistor (11) and pMOS transistor (12). The nMOS transistor and the pMOS transistor are arranged in a push-pull configuration such that the input signal is fed to gates of the nMOS transistor and the pMOS transistor and the output signal is taken from sources of the nMOS and the pMOS transistors. The input buffer comprises a first varactor (21) connected between a gate of the nMOS transistor and a first biasing voltage potential (V21), and a second varactor (22) connected between a gate of the pMOS transistor and a second biasing voltage potential (V22), which are configured to reduce a signal amplitude dependency of a capacitance of the input buffer.

2. 发明公开

EP4374492A1 METHOD AND APPARATUS FOR CANCELLING FRONT-END DISTORTION 审中-公开
公开(公告)号：EP4374492A1
公开(公告)日：2024-05-29
申请号：EP22761311.4
申请日：2022-07-20
申请人： Marvell Asia Pte, Ltd.
发明人： NGUYEN, Ray Luan , REYES, Benjamin Tomas , HATCHER, Geoffrey , JANTZI, Stephen
IPC分类号： H04B1/04 , H04B1/12 , H04B1/38 , H03F1/32 , H04B1/525
CPC分类号： H04B1/38 , H04B1/0475 , H04B1/123 , H04B2001/042520130101 , H04B1/525 , H03F1/3258 , H03M1/1042 , H03M1/12 , H03M1/66

3. 发明公开

EP3376671A1 A/D CONVERSION DEVICE 有权
公开(公告)号：EP3376671A1
公开(公告)日：2018-09-19
申请号：EP15908283.3
申请日：2015-11-11
申请人： Mitsubishi Electric Corporation
发明人： KOBAYASHI, Yusuke , NARUKAWA, Takayasu , TSUNEOKA, Masaya , FUNAKOSHI, Masayuki , YAMAGUCHI, Norihiro , OKANOUE, Takahiro
IPC分类号： H03M1/10 , H03M1/12
CPC分类号： H03M1/362 , H03M1/10 , H03M1/1071 , H03M1/12 , H03M1/123
摘要： A first mode in which to output analog electricity quantities of objects (4, 5) one by one independently to an A/D converter (1), a second mode in which to output none of the analog electricity quantities of the objects (4, 5), a third mode in which to output none of the analog electricity quantities of the objects (4, 5) and cause the output to the A/D converter (1) to be pulled down by a pull-down resistor (10), and a fourth mode in which to output to the A/D converter (1) a plurality of the analog electricity quantities of the objects (4, 5) at the same time, are caused to be generated, thus acquiring the A/D conversion values of the objects (4, 5) individually when in the first mode, and detecting an anomaly of the A/D converter (1) itself or a device connected to the A/D converter (1) when in the second mode to the fourth mode.

4. 发明公开

EP3349419A1 CONFIGURABLE SMART SENSOR SYSTEMS 审中-公开
公开(公告)号：EP3349419A1
公开(公告)日：2018-07-18
申请号：EP18151382.1
申请日：2018-01-12
申请人： Simmonds Precision Products, Inc.
发明人： MCBRIDE, Benjamin D. , CARINI, Peter J. , BURLEIGH, Matthew B. , GANG, Travis , NELSON, Joel
IPC分类号： H04L29/08 , H03M1/00
CPC分类号： G01R19/2506 , H03M1/1009 , H03M1/12 , H03M1/66 , H04L67/12
摘要： A smart sensor system can include one or more configurable input and output channels, each configurable channel including one or more switches configured to activate the input and/or output and/or to select a type of input and/or output signal, at least one analog-to-digital converter and at least one digital-to-analog converter operatively connected to the one or more switches for the one or more configurable channels, and at least one controller configured to control the configurable channels.

5. 发明授权

EP3026818B1 METHOD OF SELF-CALIBRATING A SAR A/D CONVERTER AND SAR-A/D CONVERTER IMPLEMENTING SAID METHOD 有权
标题翻译：自校准SAR A / D转换器和SAR-A / D转换器的方法实现所述方法
公开(公告)号：EP3026818B1
公开(公告)日：2018-03-28
申请号：EP15189321.1
申请日：2015-10-12
申请人： STMicroelectronics S.r.l.
发明人： BURGIO, Carmelo , GIACOMINI, Mauro
IPC分类号： H03M1/10 , H03M1/46 , H03M1/68 , H03M1/80
CPC分类号： H03M1/1047 , H03M1/00 , H03M1/0695 , H03M1/1033 , H03M1/12 , H03M1/1245 , H03M1/462 , H03M1/466 , H03M1/687 , H03M1/802 , H03M1/804 , H03M1/806 , H03M1/808
摘要： The present disclosure relates to a method of self-calibration of a SAR-A/D converter, comprising a N bit -bit digital-to-analog converter (DAC) for outputting a N bit -bit output code, said digital-to-analog converter (DAC) comprising a first subconverter (C MSB ) having a plurality N Th of thermometer elements T j (1) and a second subconverter (C LSB ) having a plurality of binary-weighted elements N Bin , said output code being defined by a thermometer scale S Th having a number of levels equal to 2 NBitTh +1. The method is characterized in that it comprises the steps of: - measuring, for each thermometer element of said plurality N Th of thermometer elements T j , an error value; - determining a mean value (µ) of these values; - dividing said plurality N Th of thermometer elements T j into a first subset (X) and a second subset (Y) each containing an identical number of values (x, y), equal to N Th /2, wherein said first subset (X) comprises the thermometer elements T j whose values are closer to said mean value (µ) as long as the error of the sum of thermometer elements T j of the first subset (X) is not worse than the error value of the element farthest from said mean value (µ) of said first subset (X) and said second subset (Y) comprising all the remaining thermometer elements T j ; - generating said thermometer scale, on the assumption that: - each level m i of said thermometer scale S Th , with i ranging from 0 to N Th /2, will be the incremental sum of each value (x) of said first ordered subset X; - each further level m i of said thermometer scale S Th , with i ranging from N Th /2+1 to N Th , will be the sum of all the values (y) of said second subset Y plus the incremental sum of the elements (x) of the subset X in any order; - generating said output code (OUTPUT) according to said thermometer scale S Th .

6. 发明公开

EP3280055A1 DELTA-SIGMA MODULATOR WITH DELTA-SIGMA TRUNCATOR AND ASSOCIATED METHOD FOR REDUCING LEAKAGE ERRORS OF DELTA-SIGMA MODULATOR 审中-公开
标题翻译：具有DELTA-SIGMA调制器的DELTA-SIGMA调制器以及用于减少DELTA-SIGMA调制器的泄漏错误的相关方法
公开(公告)号：EP3280055A1
公开(公告)日：2018-02-07
申请号：EP17182826.2
申请日：2017-07-24
申请人： MediaTek Inc.
发明人： WENG, Chan-Hsiang , LO, Tien-Yu
IPC分类号： H03M3/04 , H03M1/06
CPC分类号： H03M3/426 , H03M1/00 , H03M1/066 , H03M1/12 , H03M3/30 , H03M3/428 , H03M3/436 , H03M3/454
摘要： A delta-sigma modulator includes a receiving circuit, a loop filter module, a quantizer, a delta-sigma truncator, a digital filter module, and an output circuit. The receiving circuit is arranged for receiving a feedback signal and an input signal to generate a summation signal. The loop filter module is arranged for filtering the summation signal to generate a filtered summation signal. The quantizer is arranged for generating a first digital signal according to the filtered summation signal. The delta-sigma truncator is arranged for truncating the first digital signal to generate a second digital signal. The digital filter module is arranged for filtering the first digital signal and the second digital signal to generate a filtered first digital signal and a filtered second digital signal, respectively. The output circuit is arranged for generating an output signal according to the filtered first digital signal and the filtered second digital signal.
摘要翻译： Δ-Σ调制器包括接收电路，环路滤波器模块，量化器，Δ-Σ截断器，数字滤波器模块和输出电路。接收电路被设置用于接收反馈信号和输入信号以生成求和信号。环路滤波器模块用于对求和信号进行滤波以产生滤波后的和信号。量化器用于根据滤波后的和信号生成第一数字信号。 Δ-Σ截断器被设置用于截断第一数字信号以产生第二数字信号。数字滤波器模块用于对第一数字信号和第二数字信号进行滤波，以分别生成滤波后的第一数字信号和滤波后的第二数字信号。输出电路用于根据滤波后的第一数字信号和滤波后的第二数字信号生成输出信号。

7. 发明公开

EP3280054A2 ANALOG-TO-DIGITAL CONVERSION WITH LINEARITY CALIBRATION 审中-公开
标题翻译：线性校准的模拟 - 数字转换
公开(公告)号：EP3280054A2
公开(公告)日：2018-02-07
申请号：EP17163286.2
申请日：2017-03-28
申请人： NXP USA, Inc.
发明人： Kunnen, George Rogers , Lancaster, Mark Allen
IPC分类号： H03M1/06 , H03M1/10 , H03M1/12
CPC分类号： H03M1/1042 , H03M1/0678 , H03M1/1004 , H03M1/12 , H03M1/121 , H03M1/123 , H03M1/60
摘要： The embodiments described herein provide analog-to-digital converters (ADCs) and systems and methods for calibrating ADCs, including ADCs with poorly characterized nonlinearities that cannot be effectively calibrated with traditional calibration techniques. In general, the embodiments described herein calibrate by measuring output values from an ADC with a known calibration input values being applied. The measured output values are used to determine localized polynomial interpolants. Each of the determined localized polynomial interpolants is then evaluated at an uncorrected output value, and the evaluated localized polynomial interpolants are then used to generate correction values. These correction values can then be used to calibrate the ADC during later operation. Such a calibration technique can provide effective calibration for a variety of ADCs, including ADCs that use inverter-based voltage-to-current (VI) converters and current-controlled ring oscillators.
摘要翻译：本文描述的实施例提供模数转换器（ADC）以及用于校准ADC的系统和方法，包括具有不能用传统校准技术有效校准的具有较差表征的非线性度的ADC。通常，这里描述的实施例通过测量来自具有已知校准输入值的ADC的输出值来校准。测量的输出值用于确定局部多项式插值。然后在未校正的输出值处评估所确定的局部化多项式内插值中的每一个，然后将评估后的局部化多项式内插值用于生成校正值。然后这些校正值可用于在以后的操作中校准ADC。这种校准技术可以为各种ADC提供有效的校准，包括使用基于逆变器的电压至电流（VI）转换器和电流控制环形振荡器的ADC。

8. 发明授权

EP2851884B1 MEASUREMENT SYSTEM 有权
公开(公告)号：EP2851884B1
公开(公告)日：2018-01-31
申请号：EP13790218.5
申请日：2013-05-08
申请人： RION CO.,LTD
发明人： NAKAJIMA, Yasutaka , IWAHASHI, Kiyokatsu , OHYA, Masaharu , UETA, Toshihiro , SATO, Naru , HOTTA, Ryota , KUROSAWA, Yu , YONEMOTO, Yuichi
IPC分类号： H04Q9/00 , G01D21/00 , G01H11/00 , H04W52/02 , G01R1/30 , H03M1/12
CPC分类号： G01R1/30 , G01H11/00 , H03M1/12 , H04Q9/00 , H04Q2209/40 , H04Q2209/43 , H04Q2209/845 , H04W52/0235
摘要： If input signal is transmitted to a main body unit (10), a sensor amplifier (30) stores the input signal in itself as measurement data (S01), and transmits the input signal with the added transfer order information to the main body unit (10) (S02). By checking the transfer order information added to the input signal, the main body unit (10) can confirm if the input signal is deficient or not. Upon the end of the measurement of the physical quantity (S03), the main body unit (10) transmits the retransmission request that requests the retransmission of the deficient portion of the data to the sensor amplifier (30) (S04). According to the retransmission request from the main body unit (10), the sensor amplifier (30) extracts the deficient portion of the input signal data stored in itself (S05) and retransmits the extracted input signal data to the main body unit (10) (S06).

9. 发明公开

EP3270256A1 NOISE REDUCTION CIRCUIT AND ASSOCIATED DELTA-SIGMA MODULATOR 有权
标题翻译：降噪电路和相关的DELTA-SIGMA调制器
公开(公告)号：EP3270256A1
公开(公告)日：2018-01-17
申请号：EP17178615.5
申请日：2017-06-29
申请人： MediaTek Inc.
发明人： TSAI, Hung-Chieh
IPC分类号： G05F3/02 , G05F3/26 , G05F1/46 , H03F1/30 , H03M3/00
CPC分类号： H03M3/322 , G05F3/262 , H03F1/26 , H03F3/193 , H03F2200/498 , H03M1/00 , H03M1/12 , H03M3/30 , H03M3/368 , H03M3/422 , H03M3/50
摘要： A circuit (100) includes a transistor (M0), a signal generating circuit (120) and a noise sensing circuit (110). The signal generating circuit (120) is arranged to provide an input signal. The noise sensing circuit (110) is coupled to the transistor (M0) and the signal generating circuit (120), and the noise sensing circuit (110) is arranged for receiving the input signal provided by the signal generating circuit (120) to generate an output signal to the transistor (M0), wherein a signal component of the output signal generated by the noise sensing circuit (110) cancels out a signal component of the input signal provided by the signal generating circuit (120), and the output signal and the input signal have opposite polarities.
摘要翻译：电路（100）包括晶体管（M0），信号生成电路（120）和噪声感测电路（110）。信号生成电路（120）被配置为提供输入信号。噪声感测电路110耦接晶体管M0与信号产生电路120，噪声感测电路110用以接收信号产生电路120所提供的输入信号以产生（M0）的输出信号，其中由噪声感测电路（110）产生的输出信号的信号分量抵消由信号生成电路（120）提供的输入信号的信号分量，并且输出信号和输入信号具有相反的极性。

10. 发明公开

EP3267355A1 VECTOR-MATRIX MULTIPLICATIONS INVOLVING NEGATIVE VALUES 审中-公开
标题翻译：包含负值的矢量矩阵乘法
公开(公告)号：EP3267355A1
公开(公告)日：2018-01-10
申请号：EP17177059.7
申请日：2017-06-21
申请人： Hewlett Packard Enterprise Development LP
发明人： MURALIMANOHAR, Naveen , FEINBERG, Ben , SHAFIEE-ARDESTANI, Ali
IPC分类号： G06G7/16
CPC分类号： G06F17/16 , G06G7/16 , H03M1/12 , H03M1/66
摘要： Examples herein relate to circuits for computing vector-matrix multiplications involving negative values. A first memory crossbar array may be mapped to a first matrix which includes the positive values of an input matrix. A second memory crossbar array may be mapped to a second matrix which includes the negative values of the input matrix. An analog-to-digital converter may generate digital intermediate multiplication results based on analog results computed by the memory crossbar arrays. The digital intermediate multiplication results may include an intermediate result corresponding to a multiplication of each of the first vector and second vector with each of the first matrix and the second matrix. A controller may aggregate the digital intermediate results to generate a combined multiple result that represents the vector-matrix multiplication of the input vector and the input matrix.
摘要翻译：这里的例子涉及用于计算涉及负值的向量 - 矩阵乘法的电路。第一存储器交叉开关阵列可以被映射到包括输入矩阵的正值的第一矩阵。第二存储器交叉开关阵列可以被映射到包括输入矩阵的负值的第二矩阵。模数转换器可以基于由存储器交叉开关阵列计算的模拟结果来生成数字中间乘法结果。数字中间乘法结果可以包括与第一矢量和第二矢量中的每一个与第一矩阵和第二矩阵中的每一个相乘的中间结果。控制器可以聚集数字中间结果以产生组合的多个结果，其表示输入矢量和输入矩阵的矢量矩阵相乘。

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