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1. 发明授权

EP1901425B1 Amplifier with increased bandwidth and method thereof 有权
公开(公告)号：EP1901425B1
公开(公告)日：2018-08-08
申请号：EP06019088.1
申请日：2006-09-12
申请人： Realtek Semiconductor Corp.
发明人： Tu, Chuan Ping
IPC分类号： H03F1/48 , H03F3/45
CPC分类号： H03F3/45192 , H03F1/483 , H03F3/45188 , H03F2200/36 , H03F2203/45126 , H03F2203/45322 , H03F2203/45356 , H03F2203/45682
摘要： An amplifier with increased bandwidth by current injection and a method thereof. The amplifier includes an input stage (22) for receiving a first input signal, a load stage (24) coupled to the input stage (22) for generating a first output signal, a first current source (M9) coupled to the input stage (22) for allowing a predetermined current to flow, and a second current source (26,28), coupled to the input stage (22), for injecting a first current into the input stage for outputting the first output signal.

2. 发明公开

EP2472722A3 Amplifier with configurable DC-coupled or AC-coupled output 有权
标题翻译：具有可配置直流放大器耦合或交流耦合输出
公开(公告)号：EP2472722A3
公开(公告)日：2016-02-17
申请号：EP12002312.2
申请日：2008-06-24
申请人： Qualcomm Incorporated
发明人： Chilakapati, Uma , Pulincherry, Anurag , Bazarjani, Seyfollah
IPC分类号： H03F3/20 , H03F3/30 , H03F3/45 , H03F3/68
CPC分类号： H03F3/20 , H03F3/3022 , H03F3/45192 , H03F3/45475 , H03F3/68 , H03F2200/03 , H03F2203/45101
摘要： A multi-mode amplifier with configurable DC-coupled or AC-coupled output is described. In one design, the multi-mode amplifier includes an amplifier and at least one DC level shifting circuit. The amplifier receives and amplifies an input signal and provides an output signal that is suitable for DC coupling to a load in a DC-coupled mode and for AC coupling to the load in an AC-coupled mode. The at least one DC level shifting circuit performs DC level shifting for at least one (e.g., input and/or output) common-mode voltage of the amplifier and is controlled based on whether the amplifier is operating in the DC-coupled or AC-coupled mode. The amplifier operates between VDD and VNEG supplies in the DC-coupled mode and between VDD and VSS supplies in the AC-coupled mode. The amplifier may include at least one gain stage, an internal DC level shifting circuit, and an output stage.

3. 发明公开

EP2720611A4 NEURON RECORDING SYSTEM 有权
标题翻译：神经元记录系统
公开(公告)号：EP2720611A4
公开(公告)日：2014-12-03
申请号：EP12801854
申请日：2012-06-19
申请人： UNIV CALIFORNIA
发明人： LO YI-KAI , LIU WENTAI
IPC分类号： A61B5/04 , A61B5/00 , A61B5/0476 , A61B5/0478 , A61B5/0482 , H03F3/45
CPC分类号： A61B5/04001 , A61B5/04012 , A61B5/0476 , A61B5/0478 , A61B5/0482 , A61B5/7203 , A61B5/7225 , H03F3/45192 , H03F3/45475 , H03F3/45928 , H03F2200/165 , H03F2200/168 , H03F2200/171 , H03F2200/408 , H03F2203/45362 , H03F2203/45512 , H03F2203/45528 , H03F2203/45544 , H03F2203/45631 , H03F2203/45686 , H03F2203/45726

4. 发明授权

EP2533128B1 Regulated current source and method for providing a regulated output current 有权
标题翻译：受控电流源和方法用于获得受控电流源
公开(公告)号：EP2533128B1
公开(公告)日：2014-01-08
申请号：EP11169336.2
申请日：2011-06-09
申请人： ams AG
发明人： Singnurkar, Pramod
IPC分类号： G05F3/08 , H03G1/00 , H05B33/08
CPC分类号： G05F3/08 , H03F3/45192 , H03F3/45695 , H03F3/45753 , H03F3/45762 , H05B33/0815 , Y02B20/347

5. 发明公开

EP2612438A2 LOW DISTORTION FILTERS 审中-公开
标题翻译：过滤器MER GERINGER VERZERRUNG
公开(公告)号：EP2612438A2
公开(公告)日：2013-07-10
申请号：EP11821223.2
申请日：2011-09-02
申请人： Secretary, Department Of Information Technology (DIT) , Indian Institute of Technology-Madras
发明人： PAVAN, Yendluri, Shanthi , THYAGARAJAN, Siva, Viswanathan
IPC分类号： H03F1/32 , H03H11/00
CPC分类号： H03H11/02 , H03F3/211 , H03F3/45192 , H03F3/45654 , H03F2200/405 , H03F2200/534 , H03F2200/537 , H03F2200/541 , H03F2203/45418 , H03F2203/45424 , H03F2203/45512 , H03F2203/45526 , H03F2203/45528 , H03F2203/45594 , H03F2203/45702
摘要： An integrated continuous-time active-RC filter comprises a set of opamp integrators with Operational Transconductance Amplifiers (OTAs). The filter further includes at least one assistant connected between the input and output of each of the integrators of the set to enhance the linearity and speed of the opamp integrators of the set. The assistant comprises a plurality of sets of transconductors connected in parallel to each other wherein each set of transconductors is formed by a pair of MOSFETs connected in series, with one MOSFET operating in the triode region and the other MOSFET operating in the saturation region. The assistant is configured to provide an assistant current to be injected into the source of each of the integrators in the set to enhance the linearity and speed of the opamp integrators of the set.
摘要翻译：集成的连续时间有源RC滤波器包括一组具有运算放大器（OpAs）的运算放大器积分器，以及连接在该组的每个积分器的输入和输出端之间的至少一个辅助跨导体; 其中所述辅助跨导体包括彼此并联连接的多组MOSFET，其中每组MOSFETS由串联连接的一对MOSFET形成，其中一对MOSFET在三极管区域中工作，另一个MOSFET为对在饱和区域中工作; 并且其中所述辅助跨导体被配置为将辅助电流注入到所述组中的每个积分器的输出中，以增强所述组的运算放大器积分器的线性度和速度。

6. 发明公开

EP2057735A1 DIFFERENTIAL TO SINGLE-ENDED CONVERSION CIRCUIT AND COMPARATOR USING THE CIRCUIT 有权转让
标题翻译：电路差价的不对称转换和开关使用SANTANDER比较器
公开(公告)号：EP2057735A1
公开(公告)日：2009-05-13
申请号：EP06796270.4
申请日：2006-08-28
申请人： STMicroelectronics S.r.l.
发明人： ZAMPROGNO, Marco , CONFALONIERI, Pierangelo , MINUTI, Alberto
IPC分类号： H03F3/00 , H03F3/45
CPC分类号： H03F3/005 , H03F3/45192 , H03F2203/45028 , H03F2203/45138 , H03F2203/45396 , H03F2203/45534 , H03F2203/45726
摘要： An electrical circuit (1) for conversion from differential to single-ended is described, comprising: a differential amplifier stage (2) having a first (IN+) and a second (IN') input; a first (5) and a different second charging circuit (6) of the differential stage that can be operatively coupled, respectively, with an output (OUT*) of the conversion circuit (1) and with an auxiliary output (AUXOUT*). The circuit also comprises a first (7) and a second (8) buffer circuit each functionally arranged between one of said outputs\and between one of said charging circuits. The buffer circuits being configured so as to minimise a difference between the relative impedances seen towards said outputs (OUT*, AUXOUT*).

7. 发明公开

EP1378814A3 Output circuit device for clock signal distribution 审中-公开
标题翻译：用于分配时钟信号输出电路
公开(公告)号：EP1378814A3
公开(公告)日：2006-11-02
申请号：EP02029039.1
申请日：2002-12-27
申请人： FUJITSU LIMITED
发明人： Tamura, Hirotaka , Kibune, Masaya
IPC分类号： G06F1/10 , G06F1/04
CPC分类号： H03F3/4565 , H03F3/45192 , H03F3/45237 , H03F3/45659 , H03F2203/45418 , H03F2203/45446
摘要： An output circuit device has an output circuit connected between a first power supply line and a second power supply line via a control circuit having at least one isolating transistor. A control voltage held at a constant level is applied to a control electrode of the isolating transistor, and the control voltage is a voltage at a level that works to attenuate high-frequency components contained in a voltage supplied from the first or the second power supply line.

8. 发明公开

EP1398836A3 Thin film semiconductor device and manufacturing method 有权转让
标题翻译： Dünnfilm-Halbleiterbauelement und Herstellungsverfahren
公开(公告)号：EP1398836A3
公开(公告)日：2006-09-27
申请号：EP03020276.6
申请日：2003-09-08
申请人： NEC CORPORATION
发明人： Tsuchi, Hiroshi , Sera, Kenji
IPC分类号： H01L27/12 , H01L21/84 , G11C7/06 , H03K5/24 , H03F3/45
CPC分类号： H01L27/127 , G11C7/062 , H01L27/1214 , H03F3/45192 , H03F3/45219 , H03K5/2481 , H03K19/0016
摘要： When n-channel thin film transistors(TFTs) and p-channel TFTs are formed on a polycrystalline silicon film (3) formed on a glass substrate (1), a process is included in which P-dopant or N-dopant is introduced at the same time to the channel region of a part of the n-channel TFTs and a part of the p-channel TFTs. In one channel doping operation, a set of low-VT and high-VT p-channel TFTs and a set of low-VT and high-VT n-channel TFTs can be formed. This method is used for forming high-VT TFTs, which can reduce the off-current, in logics and switch circuits and for forming low-VT TFTs, which can enlarge the dynamic range, in analog circuits to improve the performance of a thin film semiconductor.
摘要翻译：该器件包括形成在玻璃衬底（1）的多晶硅膜（3）上的多个p沟道和n沟道薄膜晶体管（TFT）。相同通道类型的TFT具有彼此不同的阈值电压。不同通道类型的TFT具有相同掺杂剂的适当剂量引入相应通道区域。还包括以下独立权利要求：（1）显示装置; （2）薄膜半导体器件制造方法; 和（3）差分放大电路。

9. 发明公开

EP1187315A3 Schaltbarer Operationsverstärker für Switched-Opamp-Anwendungen 有权
标题翻译： SchaltbarerOperationsverstärkerfürSwitched-Opamp-Anwendungen
公开(公告)号：EP1187315A3
公开(公告)日：2003-08-13
申请号：EP01118528.7
申请日：2001-08-01
申请人： Infineon Technologies AG
发明人： Sauerbrey, Jens , Wittig, Martin
IPC分类号： H03F3/72
CPC分类号： H03F3/72 , H03F3/45188 , H03F3/45192 , H03F2203/45396 , H03F2203/45506 , H03F2203/7203
摘要： Es wird ein schaltbarer Operationsverstärker für die Switched-Opamp-Technik vorgestellt, bei dem der Strom durch die Vorstufe während der Aus-Phase des Schalttakts reduziert wird. Dadurch kann die Leistungsaufnahme verringert werden. Der Strom kann während der Aus-Phase des Schalttakts entweder herabgesetzt oder ganz abgeschaltet werden.
摘要翻译：提出了一种可切换运算放大器，用于开关运算放大器技术，其中在开关时钟脉冲的截止阶段，通过前级的电流减小。这样可以降低功耗。在切换时钟脉冲的关断阶段，电流可以完全减小或关断。

10. 发明公开

EP1300942A2 Operational amplifier 审中-公开
标题翻译：运算放大器
公开(公告)号：EP1300942A2
公开(公告)日：2003-04-09
申请号：EP02256508.9
申请日：2002-09-19
申请人： SILICON STORAGE TECHNOLOGY, INC.
发明人： Van Tran, Hieu , Khan, Sakhawat M. , Saiki, William John
IPC分类号： H03F3/45
CPC分类号： H03F3/45192
摘要： The operational amplifier (100) comprises multiple stages: a differential input stage (102) that includes an adaptive high voltage differential pair and generates up and down output currents (122,124) in response to up and down input voltages (118,120). The differential input stage (102) receives an adaptive common input high voltage (HV) bias (126). An intermediate stage (106) converts the up and down output currents (122,124) into a first output voltage signal (132). The intermediate stage (106) includes a folded cascode arrangement (302) and is biased by fixed voltage bias signals (134,135). The intermediate stage (106) also includes unaffected slew rate stability compensation and a combined split stability compensation (304). An output stage (108) includes a class AB source follower driver that generates a second output voltage signal (136) in response to the first output voltage signal (132). The output stage (108) is biased with an adaptive push-pull source follower output HV bias (126,154). The output stage (108) includes feed-forward slew rate enhancement (520,522,508,510,512,524,532). A local power supply pre-filter (114) provides a filtered local high voltage (142) to the intermediate stage (106) and stages (104,110) that provide the fixed and adaptive voltage bias signals.
摘要翻译：运算放大器（100）包括多个级：差分输入级（102），其包括自适应高压差分对并且响应于上和下输入电压（118,120）产生上和下输出电流（122,124）。差分输入级（102）接收自适应公共输入高电压（HV）偏置（126）。中间级（106）将上行和下行输出电流（122,124）转换成第一输出电压信号（132）。中间级（106）包括折叠共源共栅布置（302）并且被固定的电压偏置信号（134,135）偏置。中间级（106）还包括未受影响的转换速率稳定性补偿和组合的分裂稳定性补偿（304）。输出级（108）包括响应于第一输出电压信号（132）产生第二输出电压信号（136）的AB类源极跟随器驱动器。输出级（108）利用自适应推挽源极跟随器输出HV bias（126,154）进行偏置。输出级（108）包括前馈转换速率增强（520,522,508,510,512,524,532）。本地电源预滤波器（114）向提供固定和自适应电压偏置信号的中间级（106）和级（104,110）提供滤波的本地高电压（142）。

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