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1. 发明公开

EP3058590A1 INTEGRATED PACKAGE DESIGN WITH WIRE LEADS FOR PACKAGE-ON-PACKAGE PRODUCT 审中-公开
标题翻译：用铁丝梯子进行封装-ON封装产品集成草案包胶
公开(公告)号：EP3058590A1
公开(公告)日：2016-08-24
申请号：EP14893691.7
申请日：2014-12-23
申请人： Intel Corporation
发明人： SUN, Zhiyong Simon
IPC分类号： H01L23/34 , H01L23/48 , H01L23/528
CPC分类号： H01L23/49503 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/49506 , H01L23/4952 , H01L23/49541 , H01L23/49555 , H01L25/105 , H01L2224/48247 , H01L2225/1029 , H01L2225/1052 , H01L2924/0002 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： An integrated package design for a package-on-package product is described that uses wire leads. Some embodiments pertain to a stacked package assembly that includes a first die having a front side and a back side, a die paddle attached to the back side of the first die, a plurality of wire leads, one end being connected to the front side of the die for connection to an external device, a mold compound encapsulating the first die and at least a portion of the die paddle, a land pad cut from the die paddle and supported by the mold compound, a second plurality of wire leads, one end of the wire leads being connected to the front side of the first die and the other end of the wire leads being connected to the land pad, a second die stacked over the die paddle and a third plurality of wire leads, one end being connected to the second die and the other end being connected to the land pad.
摘要翻译：一个封装上封装产品的集成封装设计说明没有使用引线。一些实施例涉及的堆叠封装组件做包括一第一具有前侧和后侧，一个附接到引线的复数，一端连接到前侧的第一背面的桨用于连接到外部设备，一个模制化合物包封所述第一爱和至少管芯焊盘的部分，从管芯焊盘的国家垫切割和支承在模制化合物，引线的第二多个，一端模具的引线被连接到所述第一爱和电线的另一端的前侧引线被连接到所述焊盘，第二对堆叠在管芯焊盘和引线的第三多个，一端连接到第二的，而另一端被连接到所述焊盘。

2. 发明公开

EP2940726A4 SEMICONDUCTOR DEVICE 有权
标题翻译： HALBLEITERBAUELEMENT
公开(公告)号：EP2940726A4
公开(公告)日：2016-07-20
申请号：EP13869756
申请日：2013-11-08
申请人： FUJI ELECTRIC CO LTD
发明人： NASHIDA NORIHIRO
IPC分类号： H01L23/29 , H01L21/56 , H01L23/16 , H01L23/31 , H01L23/433 , H01L25/07 , H01L25/18
CPC分类号： H01L23/49811 , H01L23/10 , H01L23/16 , H01L23/3121 , H01L23/3135 , H01L23/3735 , H01L23/4334 , H01L23/49506 , H01L23/49575 , H01L23/49833 , H01L25/162 , H01L2224/48091 , H01L2924/1305 , H01L2924/13055 , H01L2924/13091 , H01L2924/00014 , H01L2924/00
摘要： Provided is a semiconductor device such that, when a first sealing member that covers a semiconductor chip is disposed between a printed substrate and an insulating substrate on which the semiconductor chip is mounted, and the whole is sealed with a second sealing member, it is possible to prevent detachment of the second sealing member, thus increasing reliability. The semiconductor device includes an insulating substrate (11) on which is mounted a main circuit part including a semiconductor chip, a printed substrate (16) wherein a conductive connection member connected to the semiconductor chip is disposed on the surface opposing the insulating substrate, a first sealing member (21) that seals so as to enclose the semiconductor chip between the opposing surfaces of the insulating substrate and printed substrate, and a second sealing member (24) that covers the whole excepting a bottom portion of the insulating substrate, the semiconductor device having sealing region regulation rod portions (22Aa) to (22Ad) and (22Ba) to (22Bd) disposed in an outer peripheral portion of a sealing region of the first sealing member and connected between the insulating substrate and printed substrate, wherein the heat resistance temperature of the first sealing member is set to be higher than the heat resistance temperature of the second sealing member.
摘要翻译：提供一种半导体器件，使得当覆盖半导体芯片的第一密封构件设置在印刷基板和其上安装半导体芯片的绝缘基板之间时，并且整体用第二密封构件密封，这是可能的以防止第二密封构件的分离，从而提高可靠性。半导体器件包括绝缘基板（11），其上安装有包括半导体芯片的主电路部分，印刷基板（16），其中连接到半导体芯片的导电连接部件设置在与绝缘基板相对的表面上，第一密封构件（21），其密封以将绝缘基板和印刷基板的相对表面之间的半导体芯片封闭，以及覆盖整个绝缘基板的底部以外的整体的第二密封构件（24），半导体具有密封区域调节杆部分（22Aa）至（22Ad）和（22Ba）至（22Bd）的装置，其设置在第一密封构件的密封区域的外周部分中并且连接在绝缘基板和印刷基板之间，其中，将第一密封构件的电阻温度设定为高于第二密封构件的耐热温度。

3. 发明公开

EP2790213A3 Cavity package 审中-公开
标题翻译： Hohlraumgehäuse
公开(公告)号：EP2790213A3
公开(公告)日：2015-04-01
申请号：EP14164158.9
申请日：2014-04-10
申请人： Fan, Chun Ho
发明人： Fan, Chun Ho
IPC分类号： H01L23/057 , H01L21/50 , H01L23/495
CPC分类号： H01L23/49506 , H01L21/4839 , H01L21/50 , H01L21/56 , H01L23/057 , H01L23/495 , H01L23/49517 , H01L23/49551 , H01L2924/0002 , H05K1/0271 , H05K2201/068 , H05K2201/10378 , H01L2924/00
摘要： A cavity package is provided. The package can include a metal leadframe and a substrate attached to an interposer formed as part of the leadframe. The substrate typically has a coefficient of thermal expansion matched to the coefficient of thermal expansion of a semiconductor device to be affixed to the substrate. The semiconductor device is typically attached to an exposed top surface of the substrate. The cavity package also includes a plastic portion molded to the leadframe forming a substrate cavity. The substrate cavity allows access to the exposed top surface of the substrate for affixing the semiconductor device. The cavity package also include a connective element for grounding a lid through an electrical path from the lid to the interposer.
摘要翻译：提供腔体包装。封装可以包括金属引线框架和附接到形成为引线框架的一部分的插入件的基板。衬底通常具有与待固定到衬底的半导体器件的热膨胀系数相匹配的热膨胀系数。半导体器件通常附接到衬底的暴露的顶表面。空腔封装还包括模制到引线框架的塑料部分，形成衬底空腔。衬底空腔允许进入衬底的暴露的顶表面以固定半导体器件。空腔封装还包括连接元件，用于通过从盖到插入件的电气路径将盖接地。

4. 发明公开

EP0623955A2 Semiconductor chip module 失效
标题翻译： Halbleiterchipmodul。
公开(公告)号：EP0623955A2
公开(公告)日：1994-11-09
申请号：EP94303149.2
申请日：1994-04-29
申请人： MOTOROLA, INC.
发明人： Golubic, Theodore R. , Chaudhry, Udey
IPC分类号： H01L23/495 , H01L21/58
CPC分类号： H01L24/83 , H01L23/49506 , H01L24/29 , H01L24/48 , H01L2224/2919 , H01L2224/48091 , H01L2224/48247 , H01L2224/8319 , H01L2224/8385 , H01L2224/83894 , H01L2924/00014 , H01L2924/01006 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01082 , H01L2924/014 , H01L2924/0665 , H01L2924/07802 , H01L2924/10253 , H01L2924/14 , H01L2924/181 , H01L2924/00 , H01L2924/3512 , H01L2224/45099 , H01L2924/00012
摘要： A semiconductor chip module is formed by providing at least one semiconductor chip and a semiconductor substrate and bonding the semiconductor chip to the semiconductor substrate without the use of an epoxy or a metallic layer to create a bond between the semiconductor chip and the semiconductor substrate. The semiconductor chip of the semiconductor chip module is electrically connected to an external, electrical interconnection system. The semiconductor substrate has similar thermal properties to the semiconductor chip, this thermal mismatch present between a semiconductor chip and a metallic heatsink in conventional external, electrical interconnection systems is eliminated.
摘要翻译：通过提供至少一个半导体芯片和半导体衬底并且将半导体芯片接合到半导体衬底而不使用环氧树脂或金属层来形成半导体芯片和半导体衬底之间的结合来形成半导体芯片模块。半导体芯片模块的半导体芯片电连接到外部电气互连系统。半导体衬底具有与半导体芯片相似的热性能，消除了在传统的外部电气互连系统中存在于半导体芯片和金属散热器之间的热失配。

7. 发明公开

EP0458423A2 Packaging of semiconductor elements 失效
标题翻译： VerpackungfürHalbleiterelemente。
公开(公告)号：EP0458423A2
公开(公告)日：1991-11-27
申请号：EP91202052.6
申请日：1987-11-24
申请人： HITACHI, LTD.
发明人： Kitamura, Wahei , Nishi, Kunihiko , Murakami, Gen
IPC分类号： B65D81/26
CPC分类号： B32B27/08 , B32B27/18 , B32B27/304 , B32B27/32 , B32B2307/7246 , B32B2311/24 , B32B2323/04 , B32B2327/06 , B32B2439/00 , B65D79/02 , B65D81/266 , H01L21/67121 , H01L23/3107 , H01L23/3135 , H01L23/49506 , H01L23/49582 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/73 , H01L2224/32245 , H01L2224/45015 , H01L2224/45124 , H01L2224/45144 , H01L2224/45147 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/48465 , H01L2224/48599 , H01L2224/48699 , H01L2224/49171 , H01L2224/73265 , H01L2224/8592 , H01L2924/00014 , H01L2924/01005 , H01L2924/01006 , H01L2924/01007 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01018 , H01L2924/01019 , H01L2924/01027 , H01L2924/01029 , H01L2924/01047 , H01L2924/0105 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/014 , H01L2924/12042 , H01L2924/14 , H01L2924/181 , H01L2924/20753 , H05K13/0084 , Y10S174/08 , Y10S428/922 , Y10T29/49121 , H01L2924/00 , H01L2924/00012 , H01L2224/05599
摘要： In surface packaging of thin resin packages such as resin molded memory ICs or the like, cracks of the package occur frequently at a solder reflow step where thermal impact is applied to the package because the resin has absorbed moisture before packaging.
To solve this problem, the devices are packaged moisture-tight at an assembly step of the resin molded devices where the resin is still dry, and are taken out from the bags immediately before the execution of surface packaging.
摘要翻译：在诸如树脂模制存储器IC等的薄树脂封装的表面封装中，由于树脂在包装之前吸收了水分，所以在焊料回流步骤中经常发生热冲击施加到封装上的封装的裂纹。为了解决这个问题，在树脂成型装置的树脂成型装置的组装工序中，在树脂仍然干燥的状态下，将装置密封而成，并且在执行表面包装之前从袋子中取出。

8. 发明公开

EP0330749A1 Semiconductor device 失效
标题翻译：半导体器件
公开(公告)号：EP0330749A1
公开(公告)日：1989-09-06
申请号：EP88120623.9
申请日：1988-12-09
申请人： KABUSHIKI KAISHA TOSHIBA
发明人： Ichikawa, Keiji , Ohno, Jun-ichi
IPC分类号： H01L23/50 , H01L23/30
CPC分类号： H01L24/85 , H01L23/16 , H01L23/49506 , H01L23/4951 , H01L24/45 , H01L24/48 , H01L24/49 , H01L2224/451 , H01L2224/48091 , H01L2224/48247 , H01L2224/48465 , H01L2224/4899 , H01L2224/49171 , H01L2924/00014 , H01L2924/01014 , H01L2924/01015 , H01L2924/01033 , H01L2924/01082 , H01L2924/181 , H01L2224/78 , H01L2224/45099 , H01L2924/00 , H01L2924/00015 , H01L2224/05599 , H01L2924/00012 , H01L2224/85399
摘要： A semiconductor device comprises an insulating sheet (2) arranged on a pellet mounting portion of a lead frame so as to adhesively fix inner lead tip portions substantially radially arranged around the pellet mounting portion and a semiconductor pellet (3) mounted on the insulating sheet, wherein the insulating sheet is provided on inner leads and is formed so that the peripheral portion (2a) of the insulating sheet is thicker than the central portion thereof.
摘要翻译：一种半导体器件，包括：布置在引线框架的芯片安装部分上的绝缘片（2），以粘合固定围绕芯片安装部分放射状布置的内部引线尖端部分;以及安装在绝缘片上的半导体芯片（3）其中所述绝缘片设置在内部引线上并且形成为使得所述绝缘片的周边部分（2a）比其中心部分厚。

9. 发明授权

EP3017470B1 ELECTRONIC DEVICE HAVING A LEAD WITH SELECTIVELY MODIFIED ELECTRICAL PROPERTIES AND METHOD OF MANUFACTURING THE SAME 有权
公开(公告)号：EP3017470B1
公开(公告)日：2018-10-24
申请号：EP14735474.0
申请日：2014-07-02
申请人： Rosenberger Hochfrequenztechnik GmbH & Co. KG
发明人： CAHILL, Sean S. , SANJUAN, Eric A.
IPC分类号： H01L21/60 , H01L23/49 , H01L23/66 , H01L23/50
CPC分类号： H01L23/49541 , H01L21/4821 , H01L21/4846 , H01L23/49506 , H01L23/49827 , H01L23/49838 , H01L23/50 , H01L23/64 , H01L23/645 , H01L23/66 , H01L24/45 , H01L24/48 , H01L24/49 , H01L24/85 , H01L2223/6611 , H01L2224/45541 , H01L2224/4555 , H01L2224/4556 , H01L2224/45565 , H01L2224/4569 , H01L2224/48011 , H01L2224/48091 , H01L2224/48227 , H01L2224/48247 , H01L2224/4903 , H01L2224/49052 , H01L2224/85444 , H01L2224/8592 , H01L2224/8593 , H01L2224/85931 , H01L2224/85935 , H01L2224/85939 , H01L2224/85947 , H01L2924/00014 , H01L2924/15311 , H01L2924/181 , H01L2924/30111 , H01L2924/20654 , H01L2224/45099 , H01L2924/00
摘要： A die package having a plurality of connection pads, a die substrate supporting a plurality of connection elements, a first lead having a first metal core with a first core diameter, and a dielectric layer surrounding the first metal core, the dielectric layer having a first dielectric thickness that varies along its length and/or the dielectric layer having an outer metal layer at least partially surrounding the dielectric layer, for selectively modifying the electrical characteristics of the lead.

10. 发明公开

EP3058590A4 INTEGRATED PACKAGE DESIGN WITH WIRE LEADS FOR PACKAGE-ON-PACKAGE PRODUCT 审中-公开
标题翻译： ENTWURF EINER INTEGRIERTEN KAPSELUNG MIT DRAHTLEITERNFÜREIN KAPSELUNG-AUF-KAPSELUNG-PRODUKT
公开(公告)号：EP3058590A4
公开(公告)日：2017-08-02
申请号：EP14893691
申请日：2014-12-23
申请人： INTEL CORP
发明人： SUN ZHIYONG SIMON
IPC分类号： H01L23/495 , H01L21/48 , H01L21/56 , H01L25/10
CPC分类号： H01L23/49503 , H01L21/4842 , H01L21/561 , H01L23/3107 , H01L23/49506 , H01L23/4952 , H01L23/49541 , H01L23/49555 , H01L25/105 , H01L2224/48247 , H01L2225/1029 , H01L2225/1052 , H01L2924/0002 , H01L2924/181 , H01L2924/00012 , H01L2924/00
摘要： An integrated package design for a package-on-package product is described that uses wire leads. Some embodiments pertain to a stacked package assembly that includes a first die having a front side and a back side, a die paddle attached to the back side of the first die, a plurality of wire leads, one end being connected to the front side of the die for connection to an external device, a mold compound encapsulating the first die and at least a portion of the die paddle, a land pad cut from the die paddle and supported by the mold compound, a second plurality of wire leads, one end of the wire leads being connected to the front side of the first die and the other end of the wire leads being connected to the land pad, a second die stacked over the die paddle and a third plurality of wire leads, one end being connected to the second die and the other end being connected to the land pad.
摘要翻译：描述了使用引线的封装式封装产品的集成封装设计。一些实施例涉及一种堆叠封装组件，其包括具有正面和背面的第一裸片，附接到第一裸片的背面的裸片焊盘，多个引线，一端连接到第一裸片的正面用于连接到外部装置的管芯，封装第一管芯和管芯焊盘的至少一部分的模制化合物，从管芯焊盘切割并由模制化合物支撑的焊盘，第二多个导线，一端的导线连接到第一管芯的正面，并且导线的另一端连接到焊盘，堆叠在管芯焊盘上的第二管芯和第三多个导线，一端连接到第二管芯和另一端连接到焊盘。

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