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1. 发明公开

EP0202477A2 Method of forming an electrical short circuit between adjoining regions in an insulated gate semiconductor device 失效
标题翻译：具有绝缘栅半导体器件的制造相邻区域之间的电短路的方法。
公开(公告)号：EP0202477A2
公开(公告)日：1986-11-26
申请号：EP86105334.6
申请日：1986-04-17
申请人： GENERAL ELECTRIC COMPANY
发明人： Chow, Tat-Sing Paul , Baliga, Bantval Jayant , Love, Robert Paul
IPC分类号： H01L21/285 , H01L29/60 , H01L29/72
CPC分类号： H01L29/6634 , H01L21/3086 , H01L21/31116 , H01L29/7396
摘要： A method of forming an electrical short circuit between adjoining regions of an insulated gate semiconductor device uses retained portions of insulating layers formed over gate electrodes as an etching mask. The insulating layers are formed over the exposed surfaces of the insulated gate device, including the gate electrodes, and are then selectively removed to leave the retained portions covering the gate electrode top surfaces and sidewalls while exposing selected areas of a semiconductor substrate. The retained portions of the insulating layers are then used as an etching mask to etch away selected portions of the adjoining regions in the semiconductor substrate and expose a junction therebetween. The electrical short circuit is subsequently formed at the exposed junction.
摘要翻译：上形成的绝缘栅型半导体装置的相邻区域之间的电短路的方法使用保持绝缘层，形成在栅电极层作为蚀刻掩模的部分上。绝缘层被形成在所述绝缘栅型器件的暴露的表面，包括所述栅电极，然后被选择性地去除，以留下覆盖栅电极顶表面和侧壁同时暴露半导体衬底的选定区域上所保留的部分。绝缘层的保留部分随后被用作蚀刻掩模，以蚀刻掉，以在半导体衬底的邻接区域的选定部分和暴露的结之间存在。电气短路是在暴露结随后形成。

2. 发明公开

EP0144654A2 Semiconductor device structure including a dielectrically-isolated insulated-gate transistor 失效
标题翻译： Halbleiteranordnung mit dielektrisch isoliertem Feldeffekttransistor mit isoliertem Gate。
公开(公告)号：EP0144654A2
公开(公告)日：1985-06-19
申请号：EP84112589.1
申请日：1984-10-18
申请人： GENERAL ELECTRIC COMPANY
发明人： Baliga, Bantval Jayant , Chow, Tat-Sing Paul
IPC分类号： H01L29/72 , H01L27/12 , H01L21/76
CPC分类号： H01L29/7394 , H01L21/76297 , H01L27/1203
摘要： An insulated-gate transistor is dielectrically isolated from other semiconductor devices in a monolithic semiconductor device structure. The insulated-gate transistor, in one form, includes, in successively adjoining relationship, a source region, a base region, a voltage-supporting region and a minority carrier injection region. The interfaces between selected, adjacent pairs of these device regions are oriented in their entireties orthogonal to a major surface of the semiconductor device structure that is planar. As a consequence, the insulated-gate transistor achieves a high current capacity as well as high voltage operation without the need for electric field rings. The insulated-gate transistor, in another form, constitutes a bidirectional device with the interfaces, between adjacent device regions being oriented as in the foregoing insulated gate transistor so as to also achieve the same advantages.
摘要翻译：绝缘栅晶体管在单片半导体器件结构中与其它半导体器件介电隔离。一种形式的绝缘栅晶体管以相继的邻接关系包括源极区域，基极区域，电压支撑区域和少数载流子注入区域。这些器件区域的选定的相邻对之间的界面整体上取向于平坦的半导体器件结构的主表面。因此，绝缘栅晶体管实现高电流容量以及高电压操作，而不需要电场环。另一种形式的绝缘栅晶体管构成具有界面的双向器件，相邻器件区域之间的定向与上述绝缘栅极晶体管相同，以达到相同的优点。

3. 发明授权

EP0144865B1 Semiconductor wafer with an electrically-isolated semiconductor device 失效
标题翻译：具有电分离半导体器件的半导体晶体管
公开(公告)号：EP0144865B1
公开(公告)日：1991-06-26
申请号：EP84114126.0
申请日：1984-11-22
申请人： GENERAL ELECTRIC COMPANY
发明人： Wildi, Eric Joseph , Chow, Tat-Sing Paul
IPC分类号： H01L21/76 , H01L29/06 , H01L29/36
CPC分类号： H01L21/761

4. 发明授权

EP0199293B1 Insulated gate semiconductor device 失效
标题翻译：绝缘栅半导体器件
公开(公告)号：EP0199293B1
公开(公告)日：1991-02-27
申请号：EP86105333.8
申请日：1986-04-17
申请人： GENERAL ELECTRIC COMPANY
发明人： Baliga, Bantval Jayant , Chow, Tat-Sing Paul , Temple, Victor Albert Keith
IPC分类号： H01L29/74 , H01L29/78 , H01L29/36 , H01L27/06
CPC分类号： H01L29/7395 , H01L29/0847 , H01L29/7802
摘要： An insulated gate semiconductor device includes an inherent bipolar transistor having an emitter region which is relatively lightly doped in comparison to prior art devices. This reduces the tendency of such bipolar transistor to turn-on, which might harm the device. The beneficial effects of lightly doping the emitter region may be enhanced by decreasing the emitter region depth.

5. 发明公开

EP0144865A2 Semiconductor wafer with an electrically-isolated semiconductor device 失效
标题翻译： Halbleitersubstrat mit einer elektrisch isolierten Halbleiteranordnung。
公开(公告)号：EP0144865A2
公开(公告)日：1985-06-19
申请号：EP84114126.0
申请日：1984-11-22
申请人： GENERAL ELECTRIC COMPANY
发明人： Wildi, Eric Joseph , Chow, Tat-Sing Paul
IPC分类号： H01L21/76 , H01L29/06 , H01L29/36
CPC分类号： H01L21/761
摘要： A semiconductor wafer having a substrate with an epitaxial layer thereon includes a semiconductor device electrically isolated from the substrate as well as from any other devices in the wafer by electrical isolation structure comprising semiconductor material. The semiconductor device can accordingly be operated at high voltage with respect to the wafer substrate. The isolation structure in one form of the wafer comprises an N+ high voltage tub included in the wafer and a P+ ground region situated in the expitaxial layer, adjoining the substrate, and horizontally circumscribing the N+ high voltage tub and being spaced therefrom by a minimum lateral extent of a portion of the epitaxial layer that is of N conductivity type. The N+ high voltage tub comprises an N+ high voltage region situated in the epitaxial layer and surrounding a device region in which the semiconductor device is at least partially contained and, further, an N+ buried layer underlying the N+ high voltage region and the entirety of the device region.
摘要翻译：具有其上具有外延层的衬底的半导体晶片包括与衬底以及通过包括半导体材料的电隔离结构与晶片中的任何其它器件电隔离的半导体器件。因此，相对于晶片衬底，半导体器件可以以高电压工作。晶片的一种形式的隔离结构包括晶片中包括的N +高压电池和位于外延层中的毗邻衬底的P +接地区域，并且水平地围绕N +高压电池并与其隔开最小的侧向具有N导电类型的外延层的一部分的程度。 N +高电压槽包括位于外延层中的N +高电压区域，并且包围至少部分地包含半导体器件的器件区域，并且还包括N +高电压区域下面的N +掩埋层和整个设备区域。

6. 发明授权

EP0199293B2 Insulated gate semiconductor device 失效
标题翻译：一种半导体装置，具有绝缘栅。
公开(公告)号：EP0199293B2
公开(公告)日：1995-08-30
申请号：EP86105333.8
申请日：1986-04-17
申请人： GENERAL ELECTRIC COMPANY
发明人： Baliga, Bantval Jayant , Chow, Tat-Sing Paul , Temple, Victor Albert Keith
IPC分类号： H01L29/74 , H01L29/78 , H01L29/36 , H01L27/06
CPC分类号： H01L29/7395 , H01L29/0847 , H01L29/7802
摘要： An insulated gate semiconductor device includes an inherent bipolar transistor having an emitter region which is relatively lightly doped in comparison to prior art devices. This reduces the tendency of such bipolar transistor to turn-on, which might harm the device. The beneficial effects of lightly doping the emitter region may be enhanced by decreasing the emitter region depth.

7. 发明公开

EP0144654A3 Semiconductor device structure including a dielectrically-isolated insulated-gate transistor 失效
标题翻译：包含绝缘绝缘栅晶体管的半导体器件结构
公开(公告)号：EP0144654A3
公开(公告)日：1987-10-07
申请号：EP84112589
申请日：1984-10-18
申请人： GENERAL ELECTRIC COMPANY
发明人： Baliga, Bantval Jayant , Chow, Tat-Sing Paul
IPC分类号： H01L29/72 , H01L27/12 , H01L21/76
CPC分类号： H01L29/7394 , H01L21/76297 , H01L27/1203
摘要： An insulated-gate transistor is dielectrically isolated from other semiconductor devices in a monolithic semiconductor device structure. The insulated-gate transistor, in one form, includes, in successively adjoining relationship, a source region, a base region, a voltage-supporting region and a minority carrier injection region. The interfaces between selected, adjacent pairs of these device regions are oriented in their entireties orthogonal to a major surface of the semiconductor device structure that is planar. As a consequence, the insulated-gate transistor achieves a high current capacity as well as high voltage operation without the need for electric field rings. The insulated-gate transistor, in another form, constitutes a bidirectional device with the interfaces, between adjacent device regions being oriented as in the foregoing insulated gate transistor so as to also achieve the same advantages.

8. 发明公开

EP0199293A2 Insulated gate semiconductor device 失效
标题翻译： Halbleiteranordnung mit isoliertem门。
公开(公告)号：EP0199293A2
公开(公告)日：1986-10-29
申请号：EP86105333.8
申请日：1986-04-17
申请人： GENERAL ELECTRIC COMPANY
发明人： Baliga, Bantval Jayant , Chow, Tat-Sing Paul , Temple, Victor Albert Keith
IPC分类号： H01L29/74 , H01L29/78 , H01L29/36 , H01L27/06
CPC分类号： H01L29/7395 , H01L29/0847 , H01L29/7802
摘要： An insulated gate semiconductor device includes an inherent bipolar transistor having an emitter region which is relatively lightly doped in comparison to prior art devices. This reduces the tendency of such bipolar transistor to turn-on, which might harm the device. The beneficial effects of lightly doping the emitter region may be enhanced by decreasing the emitter region depth.
摘要翻译：绝缘栅极半导体器件包括固有双极晶体管，其具有与现有技术器件相比相对轻掺杂的发射极区域。这就降低了这种双极晶体管导通的趋势，这可能会损害器件。通过降低发射极区域深度可以增强轻掺杂发射极区域的有益效果。

9. 发明公开

EP0202477A3 Method of forming an electrical short circuit between adjoining regions in an insulated gate semiconductor device 失效
标题翻译：在绝缘栅极半导体器件中形成补充区域之间的电气短路的方法
公开(公告)号：EP0202477A3
公开(公告)日：1988-04-20
申请号：EP86105334
申请日：1986-04-17
申请人： GENERAL ELECTRIC COMPANY
发明人： Chow, Tat-Sing Paul , Baliga, Bantval Jayant , Love, Robert Paul
IPC分类号： H01L21/285 , H01L29/60 , H01L29/72
CPC分类号： H01L29/6634 , H01L21/3086 , H01L21/31116 , H01L29/7396
摘要： A method of forming an electrical short circuit between adjoining regions of an insulated gate semiconductor device uses retained portions of insulating layers formed over gate electrodes as an etching mask. The insulating layers are formed over the exposed surfaces of the insulated gate device, including the gate electrodes, and are then selectively removed to leave the retained portions covering the gate electrode top surfaces and sidewalls while exposing selected areas of a semiconductor substrate. The retained portions of the insulating layers are then used as an etching mask to etch away selected portions of the adjoining regions in the semiconductor substrate and expose a junction therebetween. The electrical short circuit is subsequently formed at the exposed junction.

10. 发明公开

EP0393949A1 Power field effect devices having small cell size and low contact resistance and method of fabrication 失效
标题翻译：功率场效应器件具有小细胞和低接触电阻和它们的制备方法。
公开(公告)号：EP0393949A1
公开(公告)日：1990-10-24
申请号：EP90304018.6
申请日：1990-04-12
申请人： GENERAL ELECTRIC COMPANY
发明人： Korman, Charles Steven , Baliga, Bantval Jayant , Shenai, Krishna , Piacente, Patricia Ann , Gorowitz, Bernard , Kim, Manjin Jerome , Chow, Tat-Sing Paul
IPC分类号： H01L29/784 , H01L29/54
CPC分类号： H01L29/7802 , H01L21/28512 , H01L21/28518 , H01L21/28525 , H01L29/456 , H01L29/665 , H01L29/7455
摘要： A multi-cellular power field effect semiconductor device includes a high conductivity layer of metal or a metal silicide (158) disposed in intimate contact with the source region (120) of the device. This high conducrivity layer is self-aligned with respect to the aperture in the gate electrode (131) through which the source region is diffused. The presence of this high conductivity layer allows a substantially smaller contact window to be employed for making contact between the final metalization (134) and the source region. As a consequence, the aperture in the gate electrode and the cell size of the device can both be substantially reduced. The device has substantially improved operating characteristics. A method of producing the device is also described.
摘要翻译：一种多蜂窝功率场效应半导体器件包括金属或与所述装置的所述源极区（120）紧密接触设置在金属硅化物（158）的高导电率的层。这种高conducrivity层是自对准相对于在通过其源极区域扩散在栅电极（131）的孔。这种高导电层的存在允许采用用于制备最终金属化（134）和源极区域之间的接触的基本上更小的接触窗口。其结果是，在所述栅电极和所述装置的单元尺寸的孔径既可以是显着降低。该装置具有明显改进的操作特性。由此说明制造装置的方法。

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