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51. 发明公开

EP0947005A4 COMPOSITE MEMORY MATERIAL COMPRISING A MIXTURE OF PHASE-CHANGE MEMORY MATERIAL AND DIELECTRIC MATERIAL 失效
标题翻译：甲钟小姐相变物质交换和介电材料一种含有复合蓄热材料
公开(公告)号：EP0947005A4
公开(公告)日：2006-06-21
申请号：EP97911035
申请日：1997-10-27
申请人： ENERGY CONVERSION DEVICES INC
发明人： CZUBATYJ WOLDODYMYR , OVSHINSKY STANFORD R , STRAND DAVID A , KLERSY PATRICK
IPC分类号： H01L27/10 , G11C16/02 , H01L27/105 , H01L45/00 , H01L47/00
CPC分类号： H01L45/06 , G11C13/0004 , G11C2213/35 , G11C2213/51 , G11C2213/72 , H01L45/1233 , H01L45/1246 , H01L45/14 , H01L45/142 , H01L45/144 , H01L45/145 , H01L45/146 , H01L45/1625 , H01L45/1641
摘要： A composite memory material (36) comprising a mixture of active phase-change memory material and inactive dielectric material. The phase-change material includes one or more elements selected from the group consisting of Te, Se, Ge, Sb, Bi, Pb, Sn, As, S, Si, P, O and mixtures of alloys thereof. A single cell memory element (30) comprising the aforementioned composite memory material (36), and a pair of spacedly disposed contacts (6, 8).

52. 发明公开

EP1662575A3 A NOT circuit 有权
标题翻译： Ein NOT-Schaltkreis
公开(公告)号：EP1662575A3
公开(公告)日：2006-06-07
申请号：EP06001940.3
申请日：2001-10-29
申请人： Japan Science and Technology Agency , Riken
发明人： Aona, Masakazu , Hasegawa, Tsuyoshi , Terabe, Kazuya , Nakayama, Tomonobu
IPC分类号： H01L29/06 , H01L29/66
CPC分类号： G11C13/025 , B82Y10/00 , G11C11/5614 , G11C13/0004 , G11C13/0009 , G11C13/0011 , G11C2213/77 , G11C2213/81 , H01L27/2463 , H01L29/242 , H01L29/26 , H01L29/45 , H01L45/085 , H01L45/1266 , H01L45/142 , H01L45/143 , H01L45/146 , H01L45/1633 , H03K17/545 , H03K19/02
摘要： A NOT circuit is realised using a device which includes an atomic switch serving as a two-terminal device, the device including a first electrode (102) made of a compound conductive material having ionic conductivity and electronic conductivity and a second electrode (103) made of a conductive substance, and capable of controlling conductance between the electrodes.
摘要翻译：提供了一种点接触阵列，其中布置有多个点触点，每个点接触电和可逆地控制电极之间的电导并且可应用于运算电路，逻辑电路和存储器件，NOT电路和使用该电路的电子电路。电路包括多个点接点，每个点接触由由具有离子导电性和电子导电性的复合导电材料制成的第一电极和由导电物质制成的第二电极组成。控制各点触点的电导，实现电路。 Ag2S，Ag2Se，Cu2S或Cu2Se优选用作复合导电材料。当在电极之间插入半导体或绝缘体材料时，优选使用GeSx，GeSex，GeTex或WOx（0

53. 发明授权

EP0939957B1 PROGRAMMABLE METALLIZATION CELL STRUCTURE AND METHOD OF MAKING SAME 失效
标题翻译：结构可编程METALLISIERZELLE和方法
公开(公告)号：EP0939957B1
公开(公告)日：2005-08-17
申请号：EP97928748.9
申请日：1997-05-28
申请人： Axon Technologies Corporation , ARIZONA BOARD OF REGENTS a body corporate acting on behalf of Arizona State University
发明人： KOZICKI, Michael, N. , WEST, William, C.
IPC分类号： G11C11/00 , G01T1/16 , G02F1/19
CPC分类号： G11C13/0011 , G02F1/1525 , G02F1/155 , G11C13/0069 , G11C2013/009 , G11C2213/51 , H01L45/085 , H01L45/1206 , H01L45/1213 , H01L45/1226 , H01L45/1233 , H01L45/142
摘要： A programmable metallization cell (10) ('PMC') comprises a fast ion conductor such as a chalcogenide-metal ion and a plurality of electrodes (13 and 14) (e.g., an anode and a cathode) disposed at the surface of the fast ion conductor (12) and spaced a set distance apart from each other. Preferably, the fast ion conductor comprises a chalcogenide with Group IB or Group IIB metals, the anode comprises silver, and the cathode comprises aluminum or other conductor. When a voltage is applied to the anode and the cathode, a non-volatile metal dendrite grows from the cathode along the surface of the fast ion conductor towards the anode. The growth rate of the dendrite is a function of the applied voltage and time. The growth of the dendrite may be stopped by removing the voltage and the dendrite may be retracted by reversing the voltage polarity at the anode and cathode. Changes in the length of the dendrite affect the resistance and capacitance of the PMC. The PMC may be incorporated into a variety of technologies such as memory devices, programmable resistor/capacitor devices, optical devices, sensors, and the like. Electrodes additional to the cathode and anode can be provided to serve as outputs or additional outputs of the devices in sensing electrical characteristics which are dependent upon the extent of the dendrite.

54. 发明授权

EP1235227B1 Programmable sub-surface aggregating metallization structure 有权
标题翻译：可编程的子表面聚合金属化结构
公开(公告)号：EP1235227B1
公开(公告)日：2004-08-25
申请号：EP02006778.1
申请日：1998-12-04
申请人： Axon Technologies Corporation , Arizona Board of Regents a body corporate acting on behalf of Arizona State University
发明人： Kozicki, Michael N. , West, William C.
IPC分类号： G11C11/34
CPC分类号： G11C13/0069 , B82Y10/00 , G11C13/0011 , G11C2013/009 , G11C2213/15 , G11C2213/72 , G11C2213/77 , H01L45/085 , H01L45/1233 , H01L45/142

55. 发明公开

EP1159743A4 PROGRAMMABLE MICROELECTRONIC DEVICES AND METHODS OF FORMING AND PROGRAMMING SAME 有权
标题翻译：可编程电子显微组织和方法进行生产和编程
公开(公告)号：EP1159743A4
公开(公告)日：2004-04-21
申请号：EP00911772
申请日：2000-02-11
申请人： UNIV ARIZONA
发明人： KOZICKI MICHAEL N
IPC分类号： H01L27/10 , G11C11/00 , G11C11/34 , G11C13/02 , G11C16/02 , H01L27/105 , H01L45/00 , G11C11/24
CPC分类号： H01L45/142 , B82Y10/00 , G11C11/00 , G11C11/34 , G11C13/0011 , G11C2213/15 , G11C2213/72 , G11C2213/79 , H01L45/085 , H01L45/1233 , H01L45/143 , H01L45/1658 , H01L45/1683
摘要： A microelectronic programmable structure (300) and methods of forming and programming the structure (300) are disclosed. The programmable structure (300) generally includes an ion conductor (340) and a plurality of electrodes (320, 330). Electrical properties of the structure (300) may be altered by applying a bias across the electrodes (320, 330), and thus information may be stored using the structure (300).

56. 发明公开

EP0939957A4 PROGRAMMABLE METALLIZATION CELL STRUCTURE AND METHOD OF MAKING SAME 失效
标题翻译：结构可编程METALLISIERZELLE和方法
公开(公告)号：EP0939957A4
公开(公告)日：2002-08-07
申请号：EP97928748
申请日：1997-05-28
申请人： AXON TECHNOLOGIES CORP , UNIV ARIZONA STATE
发明人： KOZICKI MICHAEL N , WEST WILLIAM C
IPC分类号： G02F1/19 , G02F1/15 , G02F1/155 , G06F12/00 , G11C13/00 , G11C13/02 , H01B1/06 , H01B1/10 , H01L21/82 , H01L21/822 , H01L27/04 , H01L27/10 , H01L27/105 , H01L45/00 , G11C11/00 , G01T1/16
CPC分类号： G11C13/0011 , G02F1/1525 , G02F1/155 , G11C13/0069 , G11C2013/009 , G11C2213/51 , H01L45/085 , H01L45/1206 , H01L45/1213 , H01L45/1226 , H01L45/1233 , H01L45/142
摘要： A programmable metallization cell (10) ('PMC') comprises a fast ion conductor such as a chalcogenide-metal ion and a plurality of electrodes (13 and 14) (e.g., an anode and a cathode) disposed at the surface of the fast ion conductor (12) and spaced a set distance apart from each other. Preferably, the fast ion conductor comprises a chalcogenide with Group IB or Group IIB metals, the anode comprises silver, and the cathode comprises aluminum or other conductor. When a voltage is applied to the anode and the cathode, a non-volatile metal dendrite grows from the cathode along the surface of the fast ion conductor towards the anode. The growth rate of the dendrite is a function of the applied voltage and time. The growth of the dendrite may be stopped by removing the voltage and the dendrite may be retracted by reversing the voltage polarity at the anode and cathode. Changes in the length of the dendrite affect the resistance and capacitance of the PMC. The PMC may be incorporated into a variety of technologies such as memory devices, programmable resistor/capacitor devices, optical devices, sensors, and the like. Electrodes additional to the cathode and anode can be provided to serve as outputs or additional outputs of the devices in sensing electrical characteristics which are dependent upon the extent of the dendrite.

57. 发明公开

EP3288092A1 PHASE CHANGE MEMORY DEVICES INCLUDING TWO-DIMENSIONAL MATERIAL AND METHODS OF OPERATING THE SAME 有权
标题翻译：相变存储器装置，包括二维材料及其操作方法
公开(公告)号：EP3288092A1
公开(公告)日：2018-02-28
申请号：EP17162095.8
申请日：2017-03-21
申请人： Samsung Electronics Co., Ltd.
发明人： LEE, Minhyun , NAM, Seunggeol , KIM, Changhyun , SHIN, Hyeonjin , CHO, Yeonchoo , HEO, Jinseong , PARK, Seongjun
IPC分类号： H01L45/00 , G11C13/00
CPC分类号： G11C13/0004 , G11C13/0069 , G11C13/0097 , H01L27/24 , H01L45/06 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/144 , H01L45/1641
摘要： A phase change memory device may include a phase change layer that includes a two-dimensional (2D) material. The phase change layer may include a layered structure that includes one or more layers of 2D material. The phase change layer may be provided between a first electrode and a second electrode, and the phase of at least a portion of one or more of the layers of 2D material may be changed based on an electrical signal applied to the phase change layer through the first electrode and the second electrode. The 2D material may include a chalcogenide-based material or phosphorene. The 2D material may be associated with a phase change temperature that is greater than or equal to about 200°C and lower than or equal to about 500°C.
摘要翻译：相变存储器件可以包括包含二维（2D）材料的相变层。相变层可以包括包含一层或多层2D材料的分层结构。可以在第一电极和第二电极之间提供相变层，并且2D材料的一个或多个层的至少一部分的相位可以基于施加到相变层的电信号通过第一电极和第二电极。 2D材料可以包括硫属化物基材料或磷ne。 2D材料可以与大于或等于大约200℃且小于或等于大约500℃的相变温度相关联。

58. 发明授权

EP2689423B1 RESISTANCE-CHANGE MEMORY 有权
标题翻译：电阻变化记忆
公开(公告)号：EP2689423B1
公开(公告)日：2018-01-24
申请号：EP11861820.6
申请日：2011-09-16
申请人： Toshiba Memory Corporation
发明人： ICHIHARA, Reika , MATSUSHITA, Daisuke , FUJII, Shosuke
IPC分类号： G11C13/00 , H01L27/105 , H01L45/00 , H01L49/00 , H01L27/10
CPC分类号： G11C13/0069 , G11C11/5614 , G11C13/0004 , G11C13/0007 , G11C13/0011 , G11C13/004 , G11C13/0097 , G11C2013/005 , G11C2013/0073 , G11C2013/009 , G11C2013/0092 , G11C2213/15 , G11C2213/33 , H01L27/101 , H01L27/2409 , H01L45/085 , H01L45/1233 , H01L45/142 , H01L45/148
摘要： According to one embodiment, a resistance-change memory includes a memory cell and a control circuit. The memory cell comprises first and second electrodes, and a variable resistance layer disposed between the first electrode and the second electrode. The control circuit applies a voltage between the first electrode and the second electrode to perform writing, erasing, and reading. During the writing, the control circuit applies a first voltage pulse between the first electrode and the second electrode, and then applies a second voltage pulse different in polarity from the first voltage pulse after applying the first voltage pulse.

59. 发明授权

EP2973772B1 RESISTIVE MEMORY CELL WITH TRENCH-SHAPED BOTTOM ELECTRODE 失效
标题翻译：具有沟槽形底电极的电阻式存储器单元
公开(公告)号：EP2973772B1
公开(公告)日：2017-11-22
申请号：EP14712545.4
申请日：2014-03-08
申请人： Microchip Technology Incorporated
发明人： WALLS, James , FEST, Paul
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , H01L27/2463 , H01L45/08 , H01L45/085 , H01L45/1233 , H01L45/124 , H01L45/1246 , H01L45/1273 , H01L45/142 , H01L45/144 , H01L45/145 , H01L45/146 , H01L45/16
摘要： A resistive memory cell, e.g., a CBRAM or ReRAM cell, may include a top electrode, a bottom electrode having an elongated trench shape defining a pair of spaced-apart bottom electrode sidewalls, and an electrolyte switching region arranged between the top electrode and at least one of the bottom electrode sidewalls to provide a path for the formation of a conductive filament or vacancy chain from the at least one bottom electrode sidewall to the top electrode when a voltage bias is applied to the cell. In addition, a memory may include an array of resistive memory cells including a top electrode structure, a plurality of trench-style bottom electrodes extending in first direction, and a plurality of inverted-trench-style electrolyte switching regions extending perpendicular to the trench-style bottom electrodes to define a two-dimensional array of spaced-apart contact areas between the electrolyte switching regions and the bottom electrodes.

60. 发明公开

EP3198645A1 1S1R MEMORY CELLS INCORPORATING A BARRIER LAYER 审中-公开
标题翻译： 1S1R内存单元包含一个屏障层
公开(公告)号：EP3198645A1
公开(公告)日：2017-08-02
申请号：EP14902489.5
申请日：2014-09-25
申请人： Intel Corporation
发明人： KARPOV, Elijah V. , MUKHERJEE, Niloy , MAJHI, Prashant , CHAU, Robert S.
IPC分类号： H01L27/115 , H01L27/11502
CPC分类号： H01L45/146 , H01L27/2409 , H01L27/2436 , H01L27/2463 , H01L27/2481 , H01L27/249 , H01L45/04 , H01L45/1226 , H01L45/1233 , H01L45/14 , H01L45/142 , H01L45/147 , H01L45/16
摘要： Thin film 1S1R bitcells incorporating a barrier between selector and memory elements. Devices incorporating such bitcells and methods of forming such bitcells are also described. In embodiments, the selector and memory element is each a dielectric material, and advantageously a metal oxide. Between the selector and memory elements is a barrier, which is to reduce intermixing and/or reaction of selector material and memory material. Addition of a barrier layer having suitable material properties into the 1S1R stack may extend the operating lifetime of a bitcell incorporated the stack by resisting intermixing and/or reaction of the selector and memory thin film materials driven by thermal and/or electric field stresses experienced by a bitcell during operation. In embodiments, a barrier layer may include one or more material layers having a composition distinct from the material composition(s) of the selector and memory elements.
摘要翻译：薄膜1S1R位单元在选择器和存储器元件之间包含屏障。还描述了包含这种位单元的器件以及形成这种位单元的方法。在实施例中，选择器和存储器元件各自是电介质材料，并且有利地是金属氧化物。在选择器和存储器元件之间是屏障，其用于减少选择器材料和存储器材料的混合和/或反应。向1S1R叠层中添加具有合适材料特性的阻挡层可以通过抵抗选择器和存储器薄膜材料的混合和/或反应来延长并入叠层中的位单元的工作寿命，所述选择器和存储器薄膜材料由操作过程中的位单元。在实施例中，阻挡层可以包括具有与选择器和存储器元件的材料组成不同的组成的一个或多个材料层。

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