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1. 发明公开

EP3224876A4 ELECTRODE CONFIGURATIONS TO INCREASE ELECTRO-THERMAL ISOLATION OF PHASE-CHANGE MEMORY ELEMENTS AND ASSOCIATED TECHNIQUES 审中-实审
公开(公告)号：EP3224876A4
公开(公告)日：2018-08-01
申请号：EP15862633
申请日：2015-10-21
申请人： INTEL CORP
发明人： PELLIZZER FABIO , ALBINI GIULIO , RUSSELL STEPHEN W , HINEMAN MAX F , RANGAN SANJAY
IPC分类号： H01L45/00 , H01L45/02
CPC分类号： H01L27/2463 , H01L27/2427 , H01L45/06 , H01L45/065 , H01L45/1206 , H01L45/122 , H01L45/1233 , H01L45/124 , H01L45/1253 , H01L45/126 , H01L45/141 , H01L45/16 , H01L45/1608 , H01L45/1666 , H01L45/1675 , H01L2224/16225 , H01L2924/15311
摘要： Embodiments of the present disclosure describe electrode configurations to increase electro-thermal isolation of phase-change memory elements and associated techniques. In an embodiment, an apparatus includes a plurality of phase-change memory (PCM) elements, wherein individual PCM elements of the plurality of PCM elements include a phase-change material layer, a first electrode layer disposed on the phase-change material layer and in direct contact with the phase-change material layer, and a second electrode layer disposed on the first electrode layer and in direct contact with the first electrode layer. Other embodiments may be described and/or claimed.

2. 发明公开

EP3227932A4 BARRIER FILM TECHNIQUES AND CONFIGURATIONS FOR PHASE-CHANGE MEMORY ELEMENTS 有权
公开(公告)号：EP3227932A4
公开(公告)日：2018-07-25
申请号：EP15864633
申请日：2015-11-05
申请人： INTEL CORP
发明人： PETZ CHRISTOPHER W , HU YONGJUN J , COLLINS DALE W , MCTEER ALLEN
IPC分类号： H01L45/00
CPC分类号： H01L45/06 , H01L27/2409 , H01L29/6609 , H01L45/12 , H01L45/1233 , H01L45/1253 , H01L45/141 , H01L45/16 , H01L45/1608
摘要： Embodiments of the present disclosure describe barrier film techniques and configurations for phase-change memory elements. In an embodiment, an apparatus includes a plurality of phase-change memory (PCM) elements, wherein individual PCM elements of the plurality of PCM elements include a bottom electrode layer, a select device layer disposed on the bottom electrode layer, a middle electrode layer disposed on the select device layer, a phase-change material layer disposed on the middle electrode layer, a top electrode layer disposed on the phase-change material layer, and a barrier film comprising a group IV transition metal, a group VI transition metal, carbon (C) and nitrogen (N), the barrier film being disposed between the bottom electrode layer and the top electrode layer. Other embodiments may be described and/or claimed.

3. 发明授权

EP2875526B1 SEMICONDUCTOR CONSTRUCTIONS, MEMORY CELLS, MEMORY ARRAYS AND METHODS OF FORMING MEMORY CELLS 有权
标题翻译：半导体结构，存储单元，存储阵列和形成存储单元的方法
公开(公告)号：EP2875526B1
公开(公告)日：2018-04-11
申请号：EP13820188.4
申请日：2013-06-28
申请人： Micron Technology, Inc.
发明人： PELLIZZER, Fabio , PERRONE, Cinzia
IPC分类号： H01L45/00
CPC分类号： H01L27/2463 , H01L27/2409 , H01L27/2445 , H01L29/02 , H01L45/06 , H01L45/12 , H01L45/124 , H01L45/141 , H01L45/144 , H01L45/145 , H01L45/1666 , H01L45/1691
摘要： Some embodiments include a construction having oxygen-sensitive structures directly over spaced-apart nodes. Each oxygen-sensitive structure includes an angled plate having a horizontal portion along a top surface of a node and a non-horizontal portion extending upwardly from the horizontal portion. Each angled plate has an interior sidewall where an inside corner is formed between the non-horizontal portion and the horizontal portion, an exterior sidewall in opposing relation to the interior sidewall, and lateral edges. Bitlines are over the oxygen-sensitive structures, and have sidewalls extending upwardly from the lateral edges of the oxygen-sensitive structures. A non-oxygen-containing structure is along the interior sidewalls, along the exterior sidewalls, along the lateral edges, over the bitlines, and along the sidewalls of the bitlines. Some embodiments include memory arrays, and methods of forming memory cells.

4. 发明授权

EP2847794B1 SWITCHING DEVICE STRUCTURES AND METHODS 有权
标题翻译：开关装置结构和方法
公开(公告)号：EP2847794B1
公开(公告)日：2017-12-27
申请号：EP13787091.1
申请日：2013-05-07
申请人： Micron Technology, Inc.
发明人： SANDHU, Gurtej S.
IPC分类号： H01L45/00
CPC分类号： H01L45/1253 , G11C13/0002 , G11C13/0007 , G11C13/0011 , G11C13/0016 , G11C13/0069 , G11C2013/0083 , G11C2213/17 , G11C2213/18 , G11C2213/52 , G11C2213/53 , H01L45/08 , H01L45/085 , H01L45/1206 , H01L45/1233 , H01L45/14 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/146 , H01L45/147 , H01L45/16
摘要： Switching device structures and methods are described herein. A switching device can include a vertical stack comprising a material formed between a first and a second electrode. The switching device can further include a third electrode coupled to the vertical stack and configured to receive a voltage applied thereto to control a formation state of a conductive pathway in the material between the first and the second electrode, wherein the formation state of the conductive pathway is switchable between an on state and an off state.

5. 发明公开

EP3138136A1 MEMRISTOR AND METHOD OF PRODUCTION THEREOF 审中-公开
标题翻译： VERFAHREN ZUR HERSTELLUNG DAVON公司
公开(公告)号：EP3138136A1
公开(公告)日：2017-03-08
申请号：EP14812821.8
申请日：2014-10-23
申请人： Nokia Technologies OY
发明人： BESSONOV, Alexander Alexandrovich , PETUKHOV, Dmitrii Igorevich , KIRIKOVA, Marina Nikolaevna , BAILEY, Mark , RYHANEN, Tapani
IPC分类号： H01L45/00 , H01G7/06
CPC分类号： H01L45/1233 , H01G7/06 , H01L45/08 , H01L45/1253 , H01L45/1273 , H01L45/141 , H01L45/142 , H01L45/146 , H01L45/16 , H01L45/1608 , H01L45/1641
摘要： A device is disclosed which comprises a first electrode (101), a second electrode (104) spaced from the first electrode, a switching region (102) positioned between the first electrode and the second electrode, and an intermediate region (103) positioned between the switching region and the second electrode, wherein the intermediate region is in electrical contact with the switching region and the second electrode. Preferably, the intermediate region comprises metal nanowires (105) in a polymer matrix, and the device is a memristor or a memcapacitor. In the latter case, the switching region comprises a conductive material (106) and an insulating material (107).
摘要翻译：公开了一种装置，其包括第一电极（101），与第一电极间隔开的第二电极（104），位于第一电极和第二电极之间的开关区域（102）和位于第一电极所述开关区域和所述第二电极，其中所述中间区域与所述开关区域和所述第二电极电接触。优选地，中间区域包括聚合物基质中的金属纳米线（105），并且该装置是忆阻器或膜电容器。在后一种情况下，开关区域包括导电材料（106）和绝缘材料（107）。

6. 发明公开

EP3084830A1 LINER FOR PHASE CHANGE MEMORY (PCM) ARRAY AND ASSOCIATED TECHNIQUES AND CONFIGURATIONS 有权
标题翻译： COVER FOR相变存储器（PCM）阵列及相关联的方法和配置
公开(公告)号：EP3084830A1
公开(公告)日：2016-10-26
申请号：EP14871597.2
申请日：2014-12-09
申请人： Intel Corporation
发明人： ROCKLEIN, Noel , TAO, Qian , SONG, Zhe , BHAT, Vishwanath
IPC分类号： H01L27/115 , H01L21/8247
CPC分类号： H01L27/2481 , H01L27/2427 , H01L27/2463 , H01L45/06 , H01L45/12 , H01L45/1233 , H01L45/141 , H01L45/16 , H01L45/1675
摘要： Embodiments of the present disclosure describe a liner for a phase change memory (PCM) array and associated techniques and configurations. In an embodiment, a substrate, an array of phase change memory (PCM) elements disposed on the substrate, wherein individual PCM elements of the array of PCM elements comprise a chalcogenide material and a liner disposed on sidewall surfaces of the individual PCM elements, wherein the liner comprises aluminum (Al), silicon (Si) and oxygen (O). Other embodiments may be described and/or claimed.

7. 发明授权

EP2686875B1 METHODS OF FORMING AT LEAST ONE CONDUCTIVE ELEMENT, METHODS OF FORMING A SEMICONDUCTOR STRUCTURE, METHODS OF FORMING A MEMORY CELL AND RELATED SEMICONDUCTOR STRUCTURES 有权
标题翻译：方法制造至少一个导电元件，一种用于生产半导体器件制造方法的存储单元与相关半导体结构
公开(公告)号：EP2686875B1
公开(公告)日：2016-09-28
申请号：EP12757934.0
申请日：2012-03-13
申请人： Micron Technology, Inc.
发明人： TANG, Sanh D. , SILLS, Scott E. , WEST, Whitney L. , GOODWIN, Rob B. , SINHA, Nishant
IPC分类号： H01L21/768 , H01L23/532 , H01L45/00
CPC分类号： H01L45/1266 , H01L21/7684 , H01L21/76843 , H01L21/76849 , H01L21/76858 , H01L21/76877 , H01L21/76882 , H01L21/76883 , H01L23/53247 , H01L23/53252 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/141 , H01L45/142 , H01L45/143 , H01L45/145 , H01L45/146 , H01L45/16 , H01L45/1608 , H01L2924/0002 , H01L2924/00
摘要： Methods of forming conductive elements, such as interconnects and electrodes, for semiconductor structures and memory cells. The methods include forming a first conductive material and a second conductive material comprising silver in a portion of at least one opening and performing a polishing process to fill the at least one opening with at least one of the first and second conductive materials. An annealing process may be performed to form a mixture or an alloy of the silver and the first conductive material. The methods enable formation of silver containing conductive elements having reduced dimensions (e.g., less than about 20 nm). The resulting conductive elements have a desirable resistivity. The methods may be used, for example, to form interconnects for electrically connecting active devices and to form electrodes for memory cells. A semiconductor structure and a memory cell including such a conductive structure are also disclosed.

8. 发明授权

EP2727147B1 MEMORY CELL STRUCTURES 失效
标题翻译：存储器单元结构
公开(公告)号：EP2727147B1
公开(公告)日：2016-09-07
申请号：EP12807889.6
申请日：2012-06-28
申请人： Micron Technology, Inc.
发明人： SILLS, Scott E.
IPC分类号： H01L45/00
CPC分类号： H01L45/1273 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/04 , H01L45/085 , H01L45/1233 , H01L45/1253 , H01L45/1266 , H01L45/141 , H01L45/146 , H01L45/147 , H01L45/1616
摘要： The present disclosure includes memory cell structures and method of forming the same. One such memory cell includes a first electrode having sidewalls angled less than 90 degrees in relation to a bottom surface of the first electrode, a second electrode, including an electrode contact portion of the second electrode, having sidewalls angled less than 90 degrees in relation to the bottom surface of the first electrode, wherein the second electrode is over the first electrode, and a storage element between the first electrode and the electrode contact portion of the second electrode.

9. 发明公开

EP2875526A4 SEMICONDUCTOR CONSTRUCTIONS, MEMORY CELLS, MEMORY ARRAYS AND METHODS OF FORMING MEMORY CELLS 有权
标题翻译：半导体结构，存储单元，存储器阵列及其制造方法蓄电池
公开(公告)号：EP2875526A4
公开(公告)日：2016-03-30
申请号：EP13820188
申请日：2013-06-28
申请人： MICRON TECHNOLOGY INC
发明人： PELLIZZER FABIO , PERRONE CINZIA
IPC分类号： H01L21/8247 , H01L27/115
CPC分类号： H01L27/2463 , H01L27/2409 , H01L27/2445 , H01L29/02 , H01L45/06 , H01L45/12 , H01L45/124 , H01L45/141 , H01L45/144 , H01L45/145 , H01L45/1666 , H01L45/1691
摘要： Some embodiments include a construction having oxygen-sensitive structures directly over spaced-apart nodes. Each oxygen-sensitive structure includes an angled plate having a horizontal portion along a top surface of a node and a non-horizontal portion extending upwardly from the horizontal portion. Each angled plate has an interior sidewall where an inside corner is formed between the non-horizontal portion and the horizontal portion, an exterior sidewall in opposing relation to the interior sidewall, and lateral edges. Bitlines are over the oxygen-sensitive structures, and have sidewalls extending upwardly from the lateral edges of the oxygen-sensitive structures. A non-oxygen-containing structure is along the interior sidewalls, along the exterior sidewalls, along the lateral edges, over the bitlines, and along the sidewalls of the bitlines. Some embodiments include memory arrays, and methods of forming memory cells.
摘要翻译：一些实施例包括具有氧敏感的结构正上方间隔开的节点的结构。每对氧敏感的结构包括具有沿着节点和从该水平部向上延伸的非水平部分的上表面上的水平部分成角度的板。每个成角度的板具有内侧壁，其中，以内侧角在非水平部分和在相对的相对于内侧壁上外侧壁的水平部，和横向边缘之间形成。位线在氧敏感的结构，并且具有侧壁从氧敏感的结构的横向边缘向上延伸。含非氧结构是沿所述内侧壁，沿外侧壁，沿侧向边缘，在所述位线，以及沿所述位线的侧壁上。一些实施例包括存储器阵列，以及形成存储单元的方法。

10. 发明公开

EP2499639A4 MEMORY ARRAYS AND ASSOCIATED METHODS OF MANUFACTURING 有权
标题翻译：存储器阵列及其制造方法
公开(公告)号：EP2499639A4
公开(公告)日：2016-03-16
申请号：EP10830389
申请日：2010-10-08
申请人： MICRON TECHNOLOGY INC
发明人： LIU JUN
IPC分类号： H01L27/24 , G11C5/06 , G11C13/00 , H01L45/00
CPC分类号： H01L45/141 , G11C5/063 , G11C13/0004 , G11C13/0023 , H01L27/24 , H01L27/2409 , H01L27/2463 , H01L45/06 , H01L45/124 , H01L45/1691
摘要： Memory arrays and associated methods of manufacturing are disclosed herein. In one embodiment, a memory array includes an access line extending along a first direction and a first contact line and a second contact line extending along a second direction different from the first direction. The first and second contact lines are generally parallel to each other. The memory array also includes a memory node that includes a first memory cell electrically connected between the access line and the first contact line to form a first circuit, and a second memory cell electrically connected between the access line and the second contact line to form a second circuit different from the first circuit.

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