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91. 发明公开

EP1112125A4 METALLIZATION STRUCTURES FOR MICROELECTRONIC APPLICATIONS AND PROCESS FOR FORMING THE STRUCTURES 有权
标题翻译：金属化用于生产这种结构的微电子应用和方法
公开(公告)号：EP1112125A4
公开(公告)日：2003-10-01
申请号：EP99932154
申请日：1999-06-30
申请人： SEMITOOL INC
发明人： KRISHNAMOORTHY AHILA , DUQUETTE DAVID J , MURARKA SHYAM P
IPC分类号： B32B7/02 , B32B15/01 , B32B15/04 , C25D3/58 , C25D5/18 , C25D7/12 , H01G4/33 , H01L21/288 , H01L21/3205 , H01L21/768 , H01L23/52 , H01L23/532 , B05D3/10 , B32B9/00 , B32B15/06 , B32B15/18 , B32B19/00
CPC分类号： H01L21/76846 , C25D3/58 , C25D5/18 , C25D7/12 , H01L21/2885 , H01L21/76843 , H01L21/76864 , H01L21/76877 , H01L23/53228 , H01L23/53233 , H01L23/53238 , H01L2924/0002 , H01L2924/00
摘要： A metallized structure (20) for use in a microelectronic circuit is set forth. The metallized structure comprises a dielectric layer, and a low-Me concentration, copper-Me alloy layer (40) disposed exterior to the ultra-thin film bonding layer. The Me is a metal other than copper and, preferably, is zinc. The concentration of the Me is less than about 5 atomic percent, preferably less than about 2 atomic percent, and even more preferably, less than about 1 atomic percent. In a preferred embodiment of the metallized structure, the dielectric layer, ultra-thin film bonding layer and the copper-Me alloy layer are all disposed immediately adjacent one another. If desired, a primary conductor (43), such as a film of copper, may be formed exterior to the foregoing layer sequence. The present invention also contemplates methods for forming the foregoing structure as well as electroplating baths that may be used to deposit the copper-Me alloy layer.

92. 发明公开

EP1308540A1 Plating bath and method for depositing a metal layer on a substrate 有权
标题翻译：镀浴和方法，用于在衬底上沉积的金属层
公开(公告)号：EP1308540A1
公开(公告)日：2003-05-07
申请号：EP01308483.5
申请日：2001-10-04
申请人： Shipley Co. L.L.C.
发明人： Cobley, Andrew J. , Kapeckas, Mark J. , Reddington, Erik , Sonnenberg, Wade , Barstad, Leon R. , Buckley, Thomas
IPC分类号： C25D3/02 , C25D7/06 , C25D3/38 , C25D7/12
CPC分类号： C25D3/02 , C25D3/38 , H05K3/241 , H05K3/242
摘要： A metal plating bath and method of plating a metal on a substrate where the metal plating bath contains heteroatom organic compounds that prevent or inhibit the consumption of metal plating bath additives. The metal plating bath additives improve the brightness of plated metal as well as the ductility, micro-throwing power and macro-throwing power of the plating bath. The addition of the additive consumption inhibiting heteroatom organic compounds improves the physical properties of the plated metal as well as the efficiency of the plating process. The heteroatom organic compounds may contain sulfur, oxygen or nitrogen heteroatoms.
摘要翻译：金属镀浴和其中所述金属镀浴含有杂原子的化合物并防止或抑制金属镀浴的添加剂的消耗衬底镀覆金属的方法。所述金属镀浴的添加剂改善电镀金属的镀浴的亮度以及延展性，微镀能力和宏观均镀能力。在加入添加剂的消耗抑制性杂原子的有机化合物改善电镀金属的物理性质以及电镀处理的效率。杂原子的有机化合物可含有硫，氧或氮的杂原子。

93. 发明公开

EP1268881A1 DEVICE PROVIDING ELECTRICAL CONTACT TO THE SURFACE OF A SEMICONDUCTOR WORKPIECE DURING METAL PLATING 审中-公开
标题翻译：设备用于半导体部分的在METALLBESCHICHTUNG电ANBRINGNUNG的KONTAKTSZUR表面
公开(公告)号：EP1268881A1
公开(公告)日：2003-01-02
申请号：EP01911067.5
申请日：2001-02-22
申请人： Nu Tool Inc.
发明人： TALIEH, Homayoun , UZOH, Cyprian , BASOL, Bulent, M.
IPC分类号： C25D7/12 , C25D5/52 , C25D5/00 , C25D5/18 , C25D17/00 , C25B9/00
CPC分类号： B23H3/04 , B23H5/08 , C25D5/08 , C25D17/00 , C25D17/001 , C25D17/005 , C25F7/00 , H01L21/2885
摘要： Substantially uniform deposition of conductive material on a surface of a substrate, which substrate includes a semiconductor wafer, from an electrolyte containing the conductive material can be provided by way of a particular device which includes first and second conductive elements. The first conductive element can have multiple electrical contacts, of identical or different configurations, or may be in the form of a conductive pad, and can contact or otherwise electrically interconnect with the substrate surface over substantially all of the substrate surface. Upon application of a potential between the first and second conductive elements while the electrolyte makes physical contact with the substrate surface and the second conductive element, the conductive material is deposited on the substrate surface. It is possible to reverse the polarity of the voltage applied between the anode and the cathode so that electro-etching of deposited conductive material can be performed.

94. 发明公开

EP1061159A1 PLATING APPARATUS, PLATING SYSTEM, METHOD FOR PLATING USING THE SAME 审中-公开
标题翻译：电镀装置，电镀系统，电镀方法
公开(公告)号：EP1061159A1
公开(公告)日：2000-12-20
申请号：EP99959760.2
申请日：1999-12-10
申请人： TOKYO ELECTRON LIMITED
发明人： HONGO, Toshiaki
IPC分类号： C25D5/20 , C25D7/12
CPC分类号： C25D7/12 , C25D5/20 , C25D17/001 , H01L21/2885
摘要： This plating apparatus 4 includes a plating bath 15 filled up with a plating solution, a first O ring 17 arranged on a top part of the plating bath 15, for electrical connection with an underlying electrode 18 formed on a wafer 2, a second O ring 20 arranged on the top part of the plating bath 15 so as to prevent the plating solution in the plating bath 15 from contact with the first O ring 17, an anode plate 24 disposed in the plating bath 15 and an ultrasonic oscillating element 26 arranged in the plating bath 15. The plating apparatus 4 is capable of forming a plating film having an uniform thickness on the semiconductor wafer.
摘要翻译：该电镀设备4包括填充有电镀液的电镀槽15，布置在电镀槽15的顶部上的第一O形环17，用于与形成在晶片2上的下层电极18电连接，第二O形环 20，其设置在电镀槽15的顶部以防止电镀槽15中的电镀液与第一O形环17接触;设置在电镀槽15中的阳极板24;以及设置在电镀槽15中的超声波振荡元件26 电镀浴15.电镀装置4能够在半导体晶片上形成厚度均匀的电镀膜。

95. 发明公开

EP1027480A1 ELECTRODES FOR SEMICONDUCTOR ELECTROPLATING APPARATUS AND THEIR APPLICATION 失效
标题翻译：引领半导体器件电涂料及其应用
公开(公告)号：EP1027480A1
公开(公告)日：2000-08-16
申请号：EP98903514.2
申请日：1998-01-14
申请人： SEMITOOL, INC.
发明人： BATZ, Robert, W., Jr. , BLECK, Martin, C. , BERNER, Robert, W. , GEYER, Harry, J. , GRAHAM, Lloyd, W. , HANSEN, Kyle, M. , HAUGEN, Chris, K. , PASSWATER, Brent , PEACE, Steven, L. , RADLOFF, Larry, R. , RITZDORF, Thomas, L. , TURNER, Jeffrey, I.
IPC分类号： C25B11/00 , C25D17/04 , C25D5/02 , C25D7/12
CPC分类号： H01L21/68721 , H01L21/67259 , H01L21/67769 , H01L21/67781 , H01L21/68728 , H01L21/68785
摘要： Wafer contact electrode assemblies (24) useful for supporting a wafer surface to be electroplated are disclosed herein. These fingers (235) provide electrical contact necessary for providing electric power between the wafer (55) and a corresponding anode in order to electroplate the surface wall of the wafer (55). Such conductive fingers (235) are useful in the production of electroplated products having reduced surface irregularities compared to products made by electroplating equipment and methods employing existing conductive fingers. In particular, the electrodes set forth herein are useful in electroplating apparatus and processes for the copper metallization of semiconductor wafers.

96. 发明公开

EP0886894A4 CONTACT CARRIERS (TILES) FOR POPULATING LARGER SUBSTRATES WITH SPRING CONTACTS 失效
标题翻译：联系支持人员拟合大型基板的
公开(公告)号：EP0886894A4
公开(公告)日：1999-06-16
申请号：EP96926049
申请日：1996-05-24
申请人： FORMFACTOR INC
发明人： KHANDROS IGOR Y , ELDRIDGE BENJAMIN N , MATHIEU GAETEAN L , DOZIER THOMAS H , SMITH WILLIAM D
IPC分类号： B23K20/00 , C23C18/16 , C25D5/08 , C25D5/22 , C25D7/12 , C25D21/02 , G01R1/067 , G01R1/073 , G01R3/00 , G01R31/28 , H01L21/00 , H01L21/48 , H01L21/56 , H01L21/60 , H01L21/603 , H01L21/66 , H01L21/68 , H01L23/48 , H01L23/485 , H01L23/49 , H01L23/498 , H01L25/065 , H01L25/16 , H01R33/76 , H05K1/14 , H05K3/20 , H05K3/32 , H05K3/40 , H01R43/20 , G01R31/00 , G01R31/316 , H01R9/28
CPC分类号： B23K20/004 , B23K2201/40 , C25D5/08 , C25D5/22 , C25D21/02 , G01R1/06711 , G01R1/06716 , G01R1/06744 , G01R1/07342 , G01R3/00 , G01R31/2884 , G01R31/2886 , H01L21/4853 , H01L21/4889 , H01L21/563 , H01L22/20 , H01L23/49811 , H01L24/11 , H01L24/13 , H01L24/72 , H01L24/81 , H01L25/0652 , H01L25/16 , H01L2224/13099 , H01L2224/131 , H01L2224/16145 , H01L2224/45144 , H01L2224/73203 , H01L2224/81801 , H01L2224/85201 , H01L2225/0651 , H01L2225/06527 , H01L2225/06555 , H01L2225/06572 , H01L2924/0001 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01012 , H01L2924/01013 , H01L2924/01015 , H01L2924/01019 , H01L2924/01022 , H01L2924/01027 , H01L2924/01029 , H01L2924/01033 , H01L2924/01039 , H01L2924/01042 , H01L2924/01045 , H01L2924/01046 , H01L2924/01047 , H01L2924/01049 , H01L2924/0105 , H01L2924/01051 , H01L2924/01057 , H01L2924/01074 , H01L2924/01075 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/01322 , H01L2924/014 , H01L2924/09701 , H01L2924/10253 , H01L2924/10329 , H01L2924/12042 , H01L2924/14 , H01L2924/1532 , H01L2924/15787 , H01L2924/19041 , H01L2924/19043 , H01L2924/30107 , H01L2924/3011 , H01L2924/3025 , H05K1/141 , H05K3/20 , H05K3/326 , H05K3/4015 , H01L2924/00
摘要： A plurality of contact elements, such as contact bumps or free-standing spring contacts (710) including both monolithic and composite interconnection elements, are mounted to relatively small tile substrates (702) which, in turn, are mounted and connected to a relatively large electronic component substrate (706), thereby populating the electronic component with a plurality of contact elements while avoiding the necessity of yielding the contact elements directly upon the electronic component. The relatively large electronic component is suitably a space transformer component of a probe card assembly. In this manner, pressure connections can be made to an entire semiconductor wafer, at once, to provide for wafer-level bum-in, and the like. Solder balls, z-axis conductive adhesive, or compliant connections are suitably employed for making electrical connections between the tile substrates and the electronic component. Multiple die sites on a semiconductor wafer are readily probed using the disclosed techniques, and the tiles can be arranged to optimize probing of an entire wafer. Composite interconnection elements having a relatively soft core overcoated by a relatively hard shell, as the resilient contact structures are described. Techniques for maintaining a prescribed x-y and z-axis alignment of the tiles to the relatively large substrate are disclosed.

98. 发明公开

EP0379289A3 Fixture and a method for plating contact bumps for integrated circuits 失效
标题翻译：用于集成电路的接触焊料的固定和方法
公开(公告)号：EP0379289A3
公开(公告)日：1990-08-01
申请号：EP90300208.7
申请日：1990-01-09
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： Stierman, Roger J. , Lessard, Robert J.
IPC分类号： C25D7/12
CPC分类号： C25D17/06 , C25D7/12 , H01L21/67138 , H01L24/11 , H01L2224/13099 , H01L2924/01005 , H01L2924/01006 , H01L2924/01033 , H01L2924/01078 , H01L2924/14
摘要： @ This disclosure describes a plating fixture to hold a silicon wafer containing integrated circuits in a metal plating bath. The wafer (11) is coated with photoresist to a thickness equal to the desired bump height and the desired bump locations patterned by standard photolithographic techniques. The wafer is then loaded in the fixture and the fixture placed in the plating bath so that the patterned side of the wafer is facing up and the plating anode (3) is located directly above the wafer (11). Systems presently on the market have the wafer positioned with the patterned side facing down and the anode located below it, or the wafer faces sideways and the anodes are access from it. These present systems allow air to be entrapped in the pattern of the photoresist, lowering yield by under plating or uneven plating of the bumps on the wafer. This disclosure prevents such yield loss and also allows cleanups on the wafer after it is loaded in the fixture.

99. 发明授权

EP0214465B1 Plating process for an electronic part 失效
标题翻译：电子部件的镀层工艺
公开(公告)号：EP0214465B1
公开(公告)日：1988-12-28
申请号：EP86110808.2
申请日：1986-08-05
申请人： HITACHI, LTD.
发明人： Sekibata, Masao , Ohta, Toshihiko , Miyazawa, Osamu
IPC分类号： C25D5/12 , C25D7/12 , H01L23/10
CPC分类号： C25D5/50 , C25D5/12 , H01L21/4821 , H01L23/49582 , H01L24/48 , H01L2224/48091 , H01L2224/48227 , H01L2224/484 , H01L2224/85444 , H01L2924/00014 , H01L2924/01006 , H01L2924/01007 , H01L2924/01014 , H01L2924/01015 , H01L2924/01027 , H01L2924/01028 , H01L2924/01042 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01322 , H01L2924/014 , H01L2924/15787 , H01L2924/16152 , H05K1/092 , H05K3/245 , H01L2224/45099 , H01L2924/00 , H01L2224/05599
摘要： Before Au-plating onto the metallic surface of an electronic part, Ni-plating and then Co-plating are applied to form a primer coating for Au-plating. But in the steps of Ni and Co-platings, hydrogen gas produced during the plating is occluded into a plating layer. On the other hand, when a pellet connected onto an Au-plated metal, an Au-Si alloy is formed, but hydrogen gas in the plating layer remains as voids in the Au-Si alloy during a subsequent heating step of the electronic part, resulting in a serious defect. This invention of a plating method is characterized by annealing after Au-plating of an electronic part to eliminate the residual gas.
摘要翻译：在电镀部件的金属表面上镀覆之前，进行镀镍，然后进行镀覆，形成镀Au底漆。但是在Ni和Co电镀工序中，电镀期间产生的氢气被吸入镀层。另一方面，当在电镀部件的随后的加热步骤中形成连接到镀Au金属上的颗粒，形成Au-Si合金时，镀层中的氢气在Au-Si合金中保持为空隙，造成严重缺陷。本发明的电镀方法的特征在于在电子部件的镀覆之后退火以消除残余气体。

100. 发明公开

EP0283681A1 Galvanisiereinrichtung zur Erzeugung von Höckern auf Chip-Bauelementen 失效
标题翻译： Galvanisiereinrichtung zur Erzeugung vonHöckernauf Chip-Bauelementen。
公开(公告)号：EP0283681A1
公开(公告)日：1988-09-28
申请号：EP88101499.7
申请日：1988-02-02
申请人： SIEMENS AKTIENGESELLSCHAFT
发明人： Andrascek, Ernst, Ing. , Hadersbeck, Hans, Ing. grad.
IPC分类号： C25D7/12
CPC分类号： C25D7/12 , C25D17/001
摘要： Der Erfindung liegt die Aufgabe zugrunde, eine Galvanisiereinrichtung zum Erzeugen feinstrukturierter, dicker Metallabscheidungen auf Halbleiterscheiben zu konzipieren. Dabei wird gefordert, daß trotz ungünstiger Ausgangsbasis die Höckeroberfläche nahezu plan sein soll und außerdem eine Gleichmäßigkeit für die Höckerhöhe von ± 1,0 µm erreicht werden soll. Außerdem muß die Galvanisiereinrichtung über Monate hinweg eine reproduzierbare, gleichmäßig gute Metallabscheidung gewährleisten.
Zur Lösung dieser Aufgabe dient eine mit Anode, Kathode und Blendring ausgestattete Galvanisierzelle zum Einhängen in ein Galvanikbad. Diese Zelle besteht aus einem Kunststoffrohr, dessen untere Öffnung mit der Anodenfläche ausgelegt ist und dessen obere Öffnung durch einen Scheibenhalter mit der Halbleiterscheibe abgedeckt ist. Ferner gehört zu der Galvanisiereinrichtung eine auf den Einebnungseffekt abgestimmte Aktivkohlefilterung.
Anwendungsgebiet ist die Mikropack-Technik.
摘要翻译：目的是设计用于在半导体晶片上生产精细结构的厚金属沉积物的电镀设备。同时，尽管不利的起始基底，凸起表面应该是实际上平坦的，此外，对于凸起高度，应该达到+/-1.0μm的均匀性。此外，电镀设备必须确保多个月可重复，均匀地良好的金属沉积。为了达到这个目的，为了在电镀液中悬浮，使用具有阳极，阴极和屏蔽环的电镀槽。该电池由塑料管组成，其下开口设置有阳极表面，并且其上开口被具有半导体晶片的晶片保持器覆盖。电镀装置还包括为调平效果而调整的活性炭过滤系统。 ... 应用领域是microack技术。 ... ...

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