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91. 发明公开

EP2580782A2 SCHOTTKY BARRIER DIODE WITH PERIMETER CAPACITANCE WELL JUNCTION 有权转让
标题翻译：与周长容量公路过渡肖特基二极管
公开(公告)号：EP2580782A2
公开(公告)日：2013-04-17
申请号：EP11810114.6
申请日：2011-06-29
申请人： International Business Machines Corporation
发明人： ANDERSON, Frederick, G. , LARY, Jenifer, E. , RASSEL, Robert, M. , STIDHAM, Mark, E.
IPC分类号： H01L29/872 , H01L29/47
CPC分类号： H01L29/872 , H01L21/761 , H01L29/0619 , H01L29/0646 , H01L29/0692 , H01L29/66143
摘要： A Schottky barrier diode comprises a first-type substrate (100), a second-type well isolation region (102) on the first-type substrate, and a first-type well region (110) on the second-type well isolation region. With embodiments herein a feature referred to as a perimeter capacitance well junction ring (106) is on the second-type well isolation region. A second-type well region (104) is on the second-type well isolation region. The perimeter capacitance well junction ring is positioned between and separates the first-type well region and the second-type well region. A second-type contact region (108) is on the second-type well region, and a first-type contact region (112) contacts the inner portion of the first-type well region. The inner portion of the first-type well region is positioned within the center of the first-type contact region. Additionally, a first ohmic metallic layer (124) is on the first- type contact region and a second ohmic metallic layer (126) is on the first-type well region. The first ohmic metallic layer contacts the second ohmic metallic layer at a junction that makes up the Schottky barrier of the Schottky barrier diode.

92. 发明公开

EP1989738A4 NOISE ISOLATION BETWEEN CIRCUIT BLOCKS IN AN INTEGRATED CIRCUIT CHIP 有权转让
标题翻译：隔声AN集成电路芯片的电路块之间
公开(公告)号：EP1989738A4
公开(公告)日：2012-07-25
申请号：EP07756373
申请日：2007-01-18
申请人： FREESCALE SEMICONDUCTOR INC
发明人： SECAREANU RADU M , BANERJEE SUMAN K , HARTIN OLIN L
IPC分类号： H01L29/76 , H01L21/761 , H01L21/762 , H01L21/765
CPC分类号： H01L29/0649 , H01L21/761 , H01L21/762 , H01L21/765 , H01L21/823481 , H01L29/0619

93. 发明公开

EP2130216A4 ISOLATED INTEGRATED CIRCUIT DEVICES 审中-公开
标题翻译：隔离集成电路的
公开(公告)号：EP2130216A4
公开(公告)日：2011-09-28
申请号：EP08726138
申请日：2008-02-27
申请人： ADVANCED ANALOGIC TECH INC
发明人： WILLIAMS RICHARD K , DISNEY DONALD RAY , CHAN WAI TIEN
IPC分类号： H01L21/761 , H01L21/762 , H01L21/8238
CPC分类号： H01L21/823878 , H01L21/761 , H01L21/76224 , H01L21/823892 , H01L29/0649 , H01L29/0821 , H01L29/732 , H01L29/7371 , H01L2924/0002 , H01L2924/00

94. 发明公开

EP2309537A3 High voltage floating well in a silicon die 有权转让
标题翻译：高电压漂移在硅芯片中
公开(公告)号：EP2309537A3
公开(公告)日：2011-08-03
申请号：EP10176546.9
申请日：2010-09-14
申请人： Monolithic Power Systems, Inc.
发明人： Hsing, Michael R. , Moyer, James C.
IPC分类号： H01L21/761 , H03K17/082 , H01L27/06 , H01L29/36 , H01L29/06 , H01L21/02 , H02M3/158
CPC分类号： H03K17/082 , H01L21/761 , H01L28/20 , H01L29/06 , H01L29/1087 , H02M3/1588 , Y02B70/1466
摘要： Disclosed is an electronic device, comprising a substrate (208), an n-doped buried layer (210), an n-doped region (212,220,222) adjacent to the n-doped buried layer and the substrate, the n-doped region comprising a first n-doped region (212) adjacent to the n-doped buried layer and having a first doping concentration, and a second n-doped region (222) not adjacent to the n-doped buried layer and having a second doping concentration less than the first doping concentration, and a p-doped region (224) adjacent to the second n-doped region and to the substrate, and a spiral resistor (228) coupled to the first n-doped region and to the p-doped region. Thus, regions 212,214,216 and 218 are electrically isolated from the rest of the circuit, which is important for devices integrated in these regions that may be at or near the high voltage (VIN), for example in DC-to-DC converters.
摘要翻译：公开了一种电子器件，包括衬底（208），n掺杂埋层（210），与n掺杂埋层和衬底相邻的n掺杂区域（212,220,222），n掺杂区域包括与所述n掺杂埋层相邻并具有第一掺杂浓度的第一n掺杂区（212）以及不与所述n掺杂埋层相邻且具有小于第二掺杂浓度的第二n掺杂区（222）第一掺杂浓度以及与第二n掺杂区域和衬底相邻的p掺杂区域（224）以及耦合到第一n掺杂区域和p掺杂区域的螺旋电阻（228）。因此，区域212,214,216和218与电路的其余部分电隔离，这对于例如在DC-DC转换器中可能处于或接近高电压（VIN）的这些区域中集成的器件是重要的。

95. 发明授权

EP1388895B1 System and method to reduce noise in a substrate 有权
标题翻译：系统和方法，用于在衬底中降低噪声
公开(公告)号：EP1388895B1
公开(公告)日：2011-06-29
申请号：EP03018063.2
申请日：2003-08-07
申请人： Broadcom Corporation
发明人： Fujimori, Ichiro
IPC分类号： H01L27/02 , H01L27/092
CPC分类号： H01L27/0928 , H01L21/761 , H01L21/823878 , H01L21/823892 , H01L27/092 , Y10S438/914

96. 发明授权

EP1729345B1 Semiconductor device having a diode for a rectifier circuit 有权
标题翻译：一种半导体器件，包括二极管，用于整流电路
公开(公告)号：EP1729345B1
公开(公告)日：2011-04-27
申请号：EP05255727.9
申请日：2005-09-15
申请人： Fujitsu Semiconductor Limited
发明人： Suzuki, Hideaki, c/o Fujitsu Limited , Sugiyama, Hidetoshi, c/o Fujitsu Limited
IPC分类号： H01L27/08
CPC分类号： H01L27/0814 , H01L21/761 , H01L27/0823

97. 发明公开

EP2309537A2 High voltage floating well in a silicon die 有权转让
标题翻译： Schwebende Hochvolt-Wanne在einem Siliziumsubstrat
公开(公告)号：EP2309537A2
公开(公告)日：2011-04-13
申请号：EP10176546.9
申请日：2010-09-14
申请人： Monolithic Power Systems, Inc.
发明人： Hsing, Michael R. , Moyer, James C.
IPC分类号： H01L21/761 , H02M3/158 , H03K19/003 , H01L27/06 , H01L21/02
CPC分类号： H03K17/082 , H01L21/761 , H01L28/20 , H01L29/06 , H01L29/1087 , H02M3/1588 , Y02B70/1466
摘要： Disclosed is an electronic device, comprising a substrate (208), an n-doped buried layer (210), an n-doped region (212,220,222) adjacent to the n-doped buried layer and the substrate, the n-doped region comprising a first n-doped region (212) adjacent to the n-doped buried layer and having a first doping concentration, and a second n-doped region (222) not adjacent to the n-doped buried layer and having a second doping concentration less than the first doping concentration, and a p-doped region (224) adjacent to the second n-doped region and to the substrate, and a spiral resistor (228) coupled to the first n-doped region and to the p-doped region. Thus, regions 212,214,216 and 218 are electrically isolated from the rest of the circuit, which is important for devices integrated in these regions that may be at or near the high voltage (VIN), for example in DC-to-DC converters.
摘要翻译：公开了一种电子器件，其包括衬底（208），n掺杂掩埋层（210），与n掺杂掩埋层和衬底相邻的n掺杂区域（212,220,222），所述n掺杂区域包括与n掺杂掩埋层相邻并且具有第一掺杂浓度的第一n掺杂区域（212）和不与n掺杂掩埋层相邻并且具有小于第二掺杂浓度的第二掺杂浓度第一掺杂浓度和与第二n掺杂区域和衬底相邻的p掺杂区域（224）以及耦合到第一n掺杂区域和p掺杂区域的螺旋电阻器（228）。因此，区域212,214,216和218与电路的其余部分电隔离，这对于集成在可能处于或接近高电压（VIN）的这些区域中的器件是重要的，例如在DC-DC转换器中。

98. 发明公开

EP2183773A1 IMPROVED BURIED ISOLATION LAYER 审中-公开
标题翻译：改进埋入绝缘层
公开(公告)号：EP2183773A1
公开(公告)日：2010-05-12
申请号：EP08755738.5
申请日：2008-05-16
申请人： Intersil America Inc.
发明人： CHURCH, Michael
IPC分类号： H01L21/761 , H01L21/74 , H01L29/06
CPC分类号： H01L21/761 , H01L29/0878 , H01L29/1083 , H01L29/167 , H01L29/7322 , H01L29/7816
摘要： The present disclosed integrated circuit includes a substrate having a top surface, a buried N type layer in the substrate, N type contact region extending from the surface to the buried N type region, a buried P type region abutting and above the buried N type region in the substrate, a P type contact region extending from the surface to the buried P type region, and an N type device region in the surface and above the buried P type region. The P type impurity of the buried P type region including an impurity of a lower coefficient of diffusion than the coefficient of diffusion of the impurities of the P type contact region.

99. 发明公开

EP2130216A1 ISOLATED INTEGRATED CIRCUIT DEVICES 审中-公开
标题翻译： ISOLIERTE INTEGRIERTE SCHALTUNGSANORDNUNGEN
公开(公告)号：EP2130216A1
公开(公告)日：2009-12-09
申请号：EP08726138.4
申请日：2008-02-27
申请人： Advanced Analogic Technologies, Inc.
发明人： WILLIAMS, Richard, K. , DISNEY, Donald, Ray , CHAN, Wai, Tien
IPC分类号： H01L21/76
CPC分类号： H01L21/823878 , H01L21/761 , H01L21/76224 , H01L21/823892 , H01L29/0649 , H01L29/0821 , H01L29/732 , H01L29/7371 , H01L2924/0002 , H01L2924/00
摘要： An isolation structure for a semiconductor device comprises a floor isolation region, a dielectric filled trench above the floor isolation region and a sidewall isolation region extending downward from the bottom of the trench to the floor isolation region. This structure provides a relatively deep isolated pocket in a semiconductor substrate while limiting the depth of the trench that must be etched in the substrate. A variety of devices, including MOSFETs, bipolar transistors, diodes, and JFETs, are formed in the isolated pocket.
摘要翻译：用于半导体器件的隔离结构包括底板隔离区域，位于地板隔离区域上方的电介质填充沟槽以及从沟槽底部向下延伸到地板隔离区域的侧壁隔离区域。这种结构在半导体衬底中提供了相当深的隔离袋，同时限制了必须在衬底中被蚀刻的沟槽的深度。在隔离的袋中形成MOSFET。

100. 发明公开

EP2044622A2 HIGH-VOLTAGE BIPOLAR-CMOS-DMOS INTEGRATED CIRCUIT DEVICES AND MODULAR METHODS OF FORMING THE SAME 审中-公开
标题翻译：在双极CMOS DMOS集成或高压电气设备和模块化成形过程
公开(公告)号：EP2044622A2
公开(公告)日：2009-04-08
申请号：EP07809223.6
申请日：2007-05-30
申请人： Advanced Analogic Technologies Inc.
发明人： WILLIAMS, Richard, K. , DISNEY, Donald Ray , CHEN, Jun-Wei , CHAN, Wai Tien , RYU, HyungSik
IPC分类号： H01L21/336
CPC分类号： H01L29/0847 , H01L21/761 , H01L21/823462 , H01L21/823481 , H01L21/823493 , H01L21/8249 , H01L27/0623 , H01L27/088 , H01L27/098 , H01L29/0696 , H01L29/0878 , H01L29/0886 , H01L29/1045 , H01L29/105 , H01L29/1083 , H01L29/1087 , H01L29/402 , H01L29/42368 , H01L29/456 , H01L29/4933 , H01L29/66106 , H01L29/66659 , H01L29/66704 , H01L29/66901 , H01L29/7825 , H01L29/7835 , H01L29/808 , H01L29/866 , H01L2924/0002 , H01L2924/00
摘要： All low-temperature processes are used to fabricate a variety of semiconductor devices in a substrate the does not include an epitaxial layer. The devices include a non-isolated lateral DMOS, a non-isolated extended drain or drifted MOS device, a lateral trench DMOS, an isolated lateral DMOS, JFET and depletion-mode devices, and P-N diode clamps and rectifiers and junction terminations. Since the processes eliminate the need for high temperature processing and employ “as-implanted” dopant profiles, they constitute a modular architecture which allows devices to be added or omitted to the IC without the necessity of altering the processes used to produce the remaining devices.

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