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1. 发明授权

US5556462A Growth method by repeatedly measuring flux in MBE chamber 失效
标题翻译：通过重复测量MBE室中的通量的生长方法
公开(公告)号：US5556462A
公开(公告)日：1996-09-17
申请号：US349713
申请日：1994-12-05
申请人： Francis G. Celii , Yung-Chung Kao , Andrew J. Purdes
发明人： Francis G. Celii , Yung-Chung Kao , Andrew J. Purdes
IPC分类号： C30B25/02 , C23C14/22 , C30B23/02 , C30B23/08 , H01L21/203 , H01L21/331 , H01L21/66 , H01L29/205 , H01L29/73 , H01L29/737 , C30B23/00
CPC分类号： H01L22/26 , B24B37/013 , B82Y10/00 , B82Y15/00 , C30B23/002 , C30B29/40
摘要： Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of integrated mass spectormeter (204) signals. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
摘要翻译：分子束外延（202）通过集成质谱仪（204）信号的反馈而增长层厚度控制（206）。实例包括具有多个AlAs，InGaAs和InAs层的III-V族化合物结构，如共振隧道二极管所用。

2. 发明授权

US06521042B1 Semiconductor growth method 失效
标题翻译：半导体生长法
公开(公告)号：US06521042B1
公开(公告)日：2003-02-18
申请号：US08667660
申请日：1996-06-21
申请人： Francis G. Celii , Alan J. Katz , Yung-Chung Kao , Theodore S. Moise
发明人： Francis G. Celii , Alan J. Katz , Yung-Chung Kao , Theodore S. Moise
IPC分类号： C30B2516
CPC分类号： H01L29/882 , B82Y10/00 , B82Y15/00 , C30B23/002 , C30B29/40 , H01L21/02392 , H01L21/02463 , H01L21/02546 , H01L21/02631 , Y10T117/1004 , Y10T117/1008
摘要： Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
摘要翻译：基于过程模型，通过质谱仪（204）反馈信号生长层厚度控制（206）的分子束外延（202）。实例包括具有多个AlAs，InGaAs和InAs层的III-V族化合物结构，如共振隧道二极管所用。

3. 发明授权

US5985025A Semiconductor growth method 失效
公开(公告)号：US5985025A
公开(公告)日：1999-11-16
申请号：US382324
申请日：1995-02-01
申请人： Francis G. Celii , Alan J. Katz , Yung-Chung Kao , Theodore S. Moise
发明人： Francis G. Celii , Alan J. Katz , Yung-Chung Kao , Theodore S. Moise
IPC分类号： C30B23/08 , C30B23/02 , C30B29/68 , H01L21/203 , H01L21/338 , H01L29/812 , H01L29/88 , C30B25/16
CPC分类号： H01L29/882 , B82Y10/00 , B82Y15/00 , C30B23/002 , C30B29/40 , H01L21/02392 , H01L21/02463 , H01L21/02546 , H01L21/02631 , Y10T117/1004 , Y10T117/1008
摘要： Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of mass spectrometer (204) signals based on a process model. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.

4. 发明授权

US5399521A Method of semiconductor layer growth by MBE 失效
标题翻译：通过MBE生长半导体层的方法
公开(公告)号：US5399521A
公开(公告)日：1995-03-21
申请号：US133699
申请日：1993-10-08
申请人： Francis G. Celii , Yung-Chung Kao , Andrew J. Purdes
发明人： Francis G. Celii , Yung-Chung Kao , Andrew J. Purdes
IPC分类号： C30B25/02 , C23C14/22 , C30B23/02 , C30B23/08 , H01L21/203 , H01L21/331 , H01L21/66 , H01L29/205 , H01L29/73 , H01L29/737
CPC分类号： H01L22/26 , B24B37/013 , B82Y10/00 , B82Y15/00 , C30B23/002 , C30B29/40
摘要： Molecular beam epitaxy (202) with growing layer thickness control (206) by feedback of integrated mass spectormeter (204) signals. Examples include III-V compound structures with multiple AlAs, InGaAs, and InAs layers as used in resonant tunneling diodes.
摘要翻译：分子束外延（202）通过集成质谱仪（204）信号的反馈而增长层厚度控制（206）。实例包括具有多个AlAs，InGaAs和InAs层的III-V族化合物结构，如共振隧道二极管所用。

5. 发明授权

US5625204A Compound semiconductors and a method for thin film growth 失效
标题翻译：化合物半导体和薄膜生长方法
公开(公告)号：US5625204A
公开(公告)日：1997-04-29
申请号：US480722
申请日：1995-06-07
申请人： Yung-Chung Kao , Francis G. Celii
发明人： Yung-Chung Kao , Francis G. Celii
IPC分类号： C30B23/02 , H01L21/203 , H01L21/66 , H01L31/0328
CPC分类号： C30B29/40 , B24B37/013 , C30B23/002 , C30B29/42 , H01L21/02395 , H01L21/02463 , H01L21/02546 , H01L21/02631 , H01L22/26
摘要： A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
摘要翻译：提供分子束外延（MBE）系统（10）以在化合物半导体衬底（40）上生长薄膜，外延层（44,46,48,50）。质谱仪检测器（95）用于监测和控制来自MBE系统（10）内的所选源（21,23,25,27）的通量。通过控制相对于衬底（40）的铟通量的温度和时间，可以在半导体衬底（40）上生长均匀的砷化铟镓（46,50）。产生具有均匀的摩尔分数浓度和减小的晶格应变的砷化铟镓的外延层（46）。

6. 发明授权

US5490880A Compound semiconductors and a method for thin film growth 失效
标题翻译：化合物半导体和薄膜生长方法
公开(公告)号：US5490880A
公开(公告)日：1996-02-13
申请号：US304985
申请日：1994-12-01
申请人： Yung-Chung Kao , Francis G. Celii
发明人： Yung-Chung Kao , Francis G. Celii
IPC分类号： C30B23/02 , H01L21/203 , H01L21/66 , C23C14/00
CPC分类号： C30B29/40 , B24B37/013 , C30B23/002 , C30B29/42 , H01L21/02395 , H01L21/02463 , H01L21/02546 , H01L21/02631 , H01L22/26
摘要： A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
摘要翻译：提供分子束外延（MBE）系统（10）以在化合物半导体衬底（40）上生长薄膜，外延层（44,46,48,50）。质谱仪检测器（95）用于监测和控制来自MBE系统（10）内的所选源（21,23,25,27）的通量。通过控制相对于衬底（40）的铟通量的温度和时间，可以在半导体衬底（40）上生长均匀的砷化镓镓（46,50）。产生具有均匀的摩尔分数浓度和减小的晶格应变的砷化铟镓的外延层（46）。

7. 发明授权

US5400739A Method for controlling thin film growth of compound semiconductors using mass spectrometer detectors 失效
标题翻译：使用质谱仪检测器控制化合物半导体薄膜生长的方法
公开(公告)号：US5400739A
公开(公告)日：1995-03-28
申请号：US958888
申请日：1992-10-09
申请人： Yung-Chung Kao , Francis G. Celii
发明人： Yung-Chung Kao , Francis G. Celii
IPC分类号： C30B23/02 , H01L21/203 , H01L21/66 , C30B21/00
CPC分类号： C30B29/40 , B24B37/013 , C30B23/002 , C30B29/42 , H01L21/02395 , H01L21/02463 , H01L21/02546 , H01L21/02631 , H01L22/26
摘要： A molecular beam epitaxy (MBE) system (10) is provided to grow thin film, epitaxy layers (44, 46, 48, 50) on compound semiconductor substrates (40). A mass spectrometer detector (95) is used to monitor and control the flux from selected sources (21, 23, 25, 27) within the MBE system (10). A uniform layer of indium gallium arsenide (46, 50) may be grown on a semiconductor substrate (40) by controlling the indium flux with respect to substrate (40) temperature and time. An epitaxy layer (46) of indium gallium arsenide with uniform mole fraction concentration and reduced lattice strain is produced.
摘要翻译：提供分子束外延（MBE）系统（10）以在化合物半导体衬底（40）上生长薄膜，外延层（44,46,48,50）。质谱仪检测器（95）用于监测和控制来自MBE系统（10）内的所选源（21,23,25,27）的通量。通过控制相对于衬底（40）的铟通量的温度和时间，可以在半导体衬底（40）上生长均匀的砷化镓镓（46,50）。产生具有均匀的摩尔分数浓度和减小的晶格应变的砷化铟镓的外延层（46）。

8. 发明申请

US20070281422A1 Mitigation of edge degradation in ferroelectric memory devices through plasma etch clean 有权
标题翻译：通过等离子体蚀刻清洁减轻铁电存储器件中的边缘退化
公开(公告)号：US20070281422A1
公开(公告)日：2007-12-06
申请号：US11442810
申请日：2006-05-30
申请人： Kezhakkedath R. Udayakumar , Lindsey H. Hall , Francis G. Celii , Scott R. Summerfelt
发明人： Kezhakkedath R. Udayakumar , Lindsey H. Hall , Francis G. Celii , Scott R. Summerfelt
IPC分类号： H01L21/336
CPC分类号： H01L21/31122 , H01L21/0206 , H01L21/02071 , H01L21/32136 , H01L27/11502 , H01L28/55 , H01L28/65
摘要： A ferroelectric memory device is fabricated while mitigating edge degradation. A bottom electrode is formed over one or more semiconductor layers. A ferroelectric layer is formed over the bottom electrode. A top electrode is formed over the ferroelectric layer. The top electrode, the ferroelectric layer, and the bottom electrode are patterned or etched. A dry clean is performed that mitigates edge degradation. A wet etch/clean is then performed.
摘要翻译：制造铁电存储器件，同时减轻边缘退化。在一个或多个半导体层上形成底部电极。在底部电极上形成铁电层。顶部电极形成在铁电层上。上电极，铁电层和底电极被图案化或蚀刻。进行干洗以减轻边缘退化。然后进行湿蚀刻/清洁。

9. 发明授权

US06872665B1 Process flow for dual damescene interconnect structures 有权
标题翻译：双重二连体互连结构的工艺流程
公开(公告)号：US06872665B1
公开(公告)日：2005-03-29
申请号：US09599718
申请日：2000-06-22
申请人： Francis G. Celii , Guoqiang Xing , Andrew McKerrow , Andrew Ralston , Zhicheng Tang , Kenneth J. Newton , Robert Kraft , Jeff West
发明人： Francis G. Celii , Guoqiang Xing , Andrew McKerrow , Andrew Ralston , Zhicheng Tang , Kenneth J. Newton , Robert Kraft , Jeff West
IPC分类号： H01L21/768 , H01L21/20
CPC分类号： H01L21/76808
摘要： A dual damascene process flow for forming interconnect lines and vias in which at least part of the via (116) is etched prior to the trench etch. A low-k material such as a thermoset organic polymer is used for the ILD (106) and IMD (110). After the at least partial via etch, a BARC (120) is deposited over the structure including in the via (116). Then, the trench (126) is patterned and etched. Although at least some of the BARC (120) material is removed during the trench etch, the bottom of the via (116) is protected.
摘要翻译：用于形成互连线和通孔的双镶嵌工艺流程，其中在沟槽蚀刻之前蚀刻至少部分通孔（116）。使用低k材料如热固性有机聚合物用于ILD（106）和IMD（110）。在至少部分通孔蚀刻之后，BARC（120）沉积在包括在通孔（116）中的结构上。然后，对沟槽（126）进行图案化和蚀刻。虽然在沟槽蚀刻期间去除了至少一些BARC（120）材料，但是通孔（116）的底部被保护。

10. 发明授权

US5956148A Semiconductor surface measurement system and method 失效
标题翻译：半导体表面测量系统及方法
公开(公告)号：US5956148A
公开(公告)日：1999-09-21
申请号：US989904
申请日：1997-12-12
申请人： Francis G. Celii
发明人： Francis G. Celii
IPC分类号： G01B11/06 , G01J4/00
CPC分类号： G01B11/0641
摘要： A semiconductor surface measurement system (100) is disclosed. In this system, a plurality of wafers (106), each having an exposed surface, are held by a wafer positioning system (104), which sequentially moves the wafers into a measurement zone. A wafer position detection system (124) detects the position of a selected wafer, and generates an output signal indicating the position of the selected wafer. A surface measurement apparatus (114 through 121, 130 through 142) measures a property of the exposed surface of the selected wafer (106) in response to the output signal of the wafer position detection system (124) when the selected wafer is in the measurement zone. The disclosed surface measurement system (100)may be used to gather real-time data concerning surface properties such as composition, roughness and epilayer thickness during multi-wafer semiconductor processing.
摘要翻译：公开了半导体表面测量系统（100）。在该系统中，每个具有暴露表面的多个晶片（106）由晶片定位系统（104）保持，晶片定位系统（104）将晶片顺序地移动到测量区域中。晶片位置检测系统（124）检测所选晶片的位置，并产生指示所选晶片的位置的输出信号。当所选晶片处于测量状态时，表面测量装置（114至121,130至142）响应于晶片位置检测系统（124）的输出信号测量所选晶片（106）的暴露表面的性质区。公开的表面测量系统（100）可以用于收集关于多晶片半导体处理期间的表面特性（例如组成，粗糙度和外延层厚度）的实时数据。

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