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1. 发明授权

US07463100B2 Phase frequency detector capable of improving noise characteristics 失效
标题翻译：相位检波器能够改善噪声特性
公开(公告)号：US07463100B2
公开(公告)日：2008-12-09
申请号：US11549046
申请日：2006-10-12
申请人： Yoo Hwan Kim , Ki Sung Kwon , Soo Woong Lee , Jin Taek Lee , Yo Sub Moon , Sung Cheol Shin , Gyu Suck Kim
发明人： Yoo Hwan Kim , Ki Sung Kwon , Soo Woong Lee , Jin Taek Lee , Yo Sub Moon , Sung Cheol Shin , Gyu Suck Kim
IPC分类号： H03L7/00
CPC分类号： H03L7/087 , H03D13/003 , H03D13/004 , H03L7/085 , H03L7/18
摘要： A phase frequency detector for improving in-band phase noise characteristics of a PLL is disclosed. The phase frequency detector compares a reference frequency with a division frequency created by dividing an output frequency of a voltage controlled oscillator (VCO) by a predetermined division ratio, creates a phase-difference signal corresponding to a phase difference between the reference frequency and the division frequency, and improves noise characteristics.
摘要翻译：公开了一种用于改善PLL的带内相位噪声特性的相位频率检测器。相位频率检测器将参考频率与通过将压控振荡器（VCO）的输出频率除以预定分频比而产生的分频，将与基准频率和分频之间的相位差相对应的相位差信号进行比较频率，并改善噪声特性。

2. 发明授权

US07282969B2 Low divide ratio programmable frequency divider and method thereof 失效
标题翻译：低分频比可编程分频器及其方法
公开(公告)号：US07282969B2
公开(公告)日：2007-10-16
申请号：US11380917
申请日：2006-04-28
申请人： Sung Cheol Shin , Yoo Hwan Kim , Ki Sung Kwon , Soo Woong Lee , Jin Taek Lee , Yo Sub Moon
发明人： Sung Cheol Shin , Yoo Hwan Kim , Ki Sung Kwon , Soo Woong Lee , Jin Taek Lee , Yo Sub Moon
IPC分类号： H03K21/00
CPC分类号： H03K23/68 , H03L7/1978
摘要： The invention provides a low divide ratio programmable frequency divider of a fractional-N type applied to a digital MOPLL tuner and a method thereof. In the invention, a divide ratio assigner assigns divide data as a main divide ratio and a pulse swallow value according to a first or a second dividing operation mode in response to a mode selection signal. A prescaler operates on the first or second divide operation mode in response to the mode selection signal. Also, a main counter divides a frequency from the prescaler by the main divide ratio. Further, a pulse swallow counter counts a clock of the main counter while outputting a pulse swallow signal to the prescaler. The pulse swallow signal has a swallow level if a counting value corresponds to the pulse swallow value, and a non-swallow level if the counting value does not correspond to the pulse swallow value.
摘要翻译：本发明提供一种应用于数字MOPLL调谐器的分数N型的低分频比可编程分频器及其方法。在本发明中，分频比分配器响应于模式选择信号，根据第一或第二分频操作模式分配除数数据作为主分频比和脉冲吞咽值。预分频器响应于模式选择信号在第一或第二除法运算模式下操作。另外，主计数器将预分频器的频率除以主分频比。此外，脉冲吞咽计数器计数主计数器的时钟，同时向预分频器输出脉冲吞咽信号。如果计数值对应于脉冲吞咽值，则脉冲吞咽信号具有吞咽水平，如果计数值与脉冲吞咽值不对应，则为非吞咽水平。

3. 发明申请

US20100073081A1 INTEGRATED TRACKING FILTER 审中-公开
标题翻译：集成跟踪过滤器
公开(公告)号：US20100073081A1
公开(公告)日：2010-03-25
申请号：US12394677
申请日：2009-02-27
申请人： Yo Sub MOON , Jeong Ki Choi , Yoo Hwan Kim , Gyu Suck Kim , Kyoung Seok Park
发明人： Yo Sub MOON , Jeong Ki Choi , Yoo Hwan Kim , Gyu Suck Kim , Kyoung Seok Park
IPC分类号： H03K5/00
CPC分类号： H03H11/1291
摘要： An integrated tracking filter includes: an amplifying unit having first to third terminals, the first terminal being connected to an input stage and the second terminal being connected to an output stage, and amplifying a signal from the input stage; a loading unit connected between a power source stage and the second terminal of the amplifying unit; a current source connected between the third terminal of the amplifying unit and a ground; and a switched LC filter unit connected between the third terminal of the amplifying unit and the ground and varying a pass band of the signal.
摘要翻译：集成跟踪滤波器包括：放大单元，具有第一至第三端子，第一端子连接到输入级，第二端子连接到输出级，并且放大来自输入级的信号; 连接在电源级与放大单元的第二端子之间的负载单元; 连接在放大单元的第三端子与地之间的电流源; 以及连接在放大单元的第三端子和地之间并改变信号的通带的开关LC滤波器单元。

4. 发明申请

US20130082777A1 BIAS CONTROLLING APPARATUS 有权
标题翻译：偏差控制装置
公开(公告)号：US20130082777A1
公开(公告)日：2013-04-04
申请号：US13370227
申请日：2012-02-09
申请人： Hyun Hwan Yoo , Yoo Hwan Kim , Yoo Sam Na
发明人： Hyun Hwan Yoo , Yoo Hwan Kim , Yoo Sam Na
IPC分类号： H03F3/45
CPC分类号： H03F1/301 , H03F3/193 , H03F3/245 , H03F2200/447 , H03F2200/555
摘要： The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor.
摘要翻译：本发明包括：温度补偿电路，用于产生对应于晶体管的温度的数字信号，并输出通过将控制电流加到参考偏置电流而获得的补偿偏置电流，或者通过使用生成的数字信号; 特性补偿电路，用于并联检测连接到晶体管的反射镜晶体管的特性误差，并输出补偿信号以补偿特性误差; 以及偏置补偿电路，用于使用补偿偏置电流和补偿信号来补偿施加到晶体管的偏置功率，以输出补偿的偏置功率。本发明能够提高晶体管的性能。

5. 发明授权

US08093948B2 Power amplifier 有权
标题翻译：功率放大器
公开(公告)号：US08093948B2
公开(公告)日：2012-01-10
申请号：US12883941
申请日：2010-09-16
申请人： Yoo Hwan Kim , Yoo Sam Na , Byeong Hak Jo , Hyun Hwan Yoo
发明人： Yoo Hwan Kim , Yoo Sam Na , Byeong Hak Jo , Hyun Hwan Yoo
IPC分类号： H03G3/20
CPC分类号： H03F1/0266 , H03F1/0272 , H03F1/56 , H03F2200/222 , H03F2200/387 , H03F2200/435 , H03G3/3042
摘要： There is provided a power amplifier that can maintain a constant gain by detecting a level of a signal being input and a level of a signal being output. A power amplifier according to an aspect of the invention may include: an amplification section having at least one amplification unit amplifying an input signal according to an adjustable gain to thereby output the amplified input signal; a detection section detecting signal levels of an input signal and an output signal of the amplification section; and a gain maintaining section controlling a bias power according to a detection result of the detection section so that a gain of the amplification section is maintained within a predetermined gain range.
摘要翻译：提供了一种功率放大器，其可以通过检测输入的信号的电平和正在输出的信号的电平来保持恒定的增益。根据本发明的一个方面的功率放大器可以包括：放大部分，具有至少一个放大单元，根据可调增益放大输入信号，从而输出放大的输入信号; 检测部，检测所述放大部的输入信号和输出信号的信号电平; 以及增益维持部，根据检测部的检测结果来控制偏置功率，使得放大部的增益保持在规定的增益范围内。

6. 发明申请

US20100134188A1 BUFFER AMPLIFIER 有权
标题翻译：缓冲放大器
公开(公告)号：US20100134188A1
公开(公告)日：2010-06-03
申请号：US12504127
申请日：2009-07-16
申请人： Byeong Hak JO , Yoo Sam Na , Yoo Hwan Kim
发明人： Byeong Hak JO , Yoo Sam Na , Yoo Hwan Kim
IPC分类号： H03F3/16 , H03F1/02 , H03F1/30 , H03F3/68
CPC分类号： H03F1/301 , H03F3/3028 , H03F2200/18 , H03F2200/447
摘要： A buffer amplifier has high input impedance and is less affected by temperature by supplying independent bias power to each of amplification units. The buffer amplifier includes a bias supply unit supplying bias power having a preset voltage level, an amplification unit receiving preset driving power and the bias power from the bias supply unit to amplify an input signal, and a compensation unit compensating for current unbalance of the driving power supplied to the amplification unit.
摘要翻译：缓冲放大器具有高输入阻抗，并且通过向每个放大单元提供独立的偏置功率而受温度影响较小。缓冲放大器包括提供具有预设电压电平的偏置功率的偏置电源单元，接收预设驱动功率的放大单元和来自偏置电源单元的偏置功率以放大输入信号;以及补偿单元，用于补偿电流的当前不平衡提供给放大单元的功率。

7. 发明授权

US07973606B2 Fractional-N frequency synthesizer and method thereof 有权
标题翻译：分数N频率合成器及其方法
公开(公告)号：US07973606B2
公开(公告)日：2011-07-05
申请号：US12563903
申请日：2009-09-21
申请人： Yoo Hwan Kim , Yoo Sam Na , Byeong Hak Jo
发明人： Yoo Hwan Kim , Yoo Sam Na , Byeong Hak Jo
IPC分类号： H03L7/06 , H03L7/08 , H03L7/085 , H03L7/087 , H03L7/18
CPC分类号： H03L7/1976 , H03L7/087
摘要： The present relates to a fractional-N frequency synthesizer improving noise characteristics and a method thereof. The fractional-N frequency synthesizer includes a reference oscillator that generates a reference frequency signal; a sigma-delta modulator that generates a desired decimal value based on the reference frequency signal; a divider that divides a voltage controlled oscillation frequency signal; first to M phase/frequency detectors that detect a difference in phase and frequency between the reference frequency signal and the divided voltage controlled oscillation frequency signal; first to M charge pumps that are connected to each of the phase/frequency detectors in series and charges or pumps charge amount according to output signals from each of the phase/frequency detectors; a loop filter that controls the amount of supplied current based on output signals from the charge pumps to filter low-pass frequency components; and a voltage controlled oscillator that is oscillated in response to the output signal from the loop filter and generates voltage controlled oscillation frequency signals.
摘要翻译：本发明涉及一种提高噪声特性的分数N频率合成器及其方法。分数N频率合成器包括产生参考频率信号的参考振荡器; 基于所述参考频率信号产生所需十进制值的Σ-Δ调制器; 分压器，其分压电压控制的振荡频率信号; 首先检测参考频率信号和分压电压控制振荡频率信号之间的相位和频率差异的M相/频率检测器; 首先对M个串联的每个相位/频率检测器的泵进行充电，并根据来自每个相位/频率检测器的输出信号对电荷或泵充电量; 环路滤波器，其基于来自电荷泵的输出信号来控制供电电流量以滤除低通频率分量; 以及响应于来自环路滤波器的输出信号而振荡并产生压控振荡频率信号的压控振荡器。

8. 发明授权

US08531243B2 Bias controlling apparatus 有权
标题翻译：偏压控制装置
公开(公告)号：US08531243B2
公开(公告)日：2013-09-10
申请号：US13370227
申请日：2012-02-09
申请人： Hyun Hwan Yoo , Yoo Hwan Kim , Yoo Sam Na
发明人： Hyun Hwan Yoo , Yoo Hwan Kim , Yoo Sam Na
IPC分类号： H03F3/04
CPC分类号： H03F1/301 , H03F3/193 , H03F3/245 , H03F2200/447 , H03F2200/555
摘要： The present invention includes: a temperature compensation circuit for generating a digital signal corresponding to a temperature of a transistor and outputting a compensation bias current obtained by adding a control current to a reference bias current or by subtracting the control signal from the reference bias current using the generated digital signal; a characteristics compensation circuit for detecting a characteristics error of a mirror transistor connected to the transistor in parallel and for outputting a compensation signal to compensate the characteristics error; and a bias compensation circuit for compensating a bias power applied to the transistor using the compensation bias current and the compensation signal to output the compensated bias power. The present invention is capable of improving the performance of the transistor.
摘要翻译：本发明包括：温度补偿电路，用于产生对应于晶体管的温度的数字信号，并输出通过将控制电流加到参考偏置电流而获得的补偿偏置电流，或者通过使用生成的数字信号; 特性补偿电路，用于并联检测连接到晶体管的反射镜晶体管的特性误差，并输出补偿信号以补偿特性误差; 以及偏置补偿电路，用于使用补偿偏置电流和补偿信号来补偿施加到晶体管的偏置功率，以输出补偿的偏置功率。本发明能够提高晶体管的性能。

9. 发明授权

US08031002B2 Buffer amplifier 有权
标题翻译：缓冲放大器
公开(公告)号：US08031002B2
公开(公告)日：2011-10-04
申请号：US12504127
申请日：2009-07-16
申请人： Byeong Hak Jo , Yoo Sam Na , Yoo Hwan Kim
发明人： Byeong Hak Jo , Yoo Sam Na , Yoo Hwan Kim
IPC分类号： H03F3/26
CPC分类号： H03F1/301 , H03F3/3028 , H03F2200/18 , H03F2200/447
摘要： A buffer amplifier has high input impedance and is less affected by temperature by supplying independent bias power to each of amplification units. The buffer amplifier includes a bias supply unit supplying bias power having a preset voltage level, an amplification unit receiving preset driving power and the bias power from the bias supply unit to amplify an input signal, and a compensation unit compensating for current unbalance of the driving power supplied to the amplification unit.
摘要翻译：缓冲放大器具有高输入阻抗，并且通过向每个放大单元提供独立的偏置功率而受温度影响较小。缓冲放大器包括提供具有预设电压电平的偏置功率的偏置电源单元，接收预设驱动功率的放大单元和来自偏置电源单元的偏置功率以放大输入信号;以及补偿单元，用于补偿电流的当前不平衡提供给放大单元的功率。

10. 发明申请

US20140009317A1 ANALOG-TO-DIGITAL SIGNAL CONVERSION METHOD AND APPARATUS THEREFOR 失效
标题翻译：模拟数字信号转换方法及其设备
公开(公告)号：US20140009317A1
公开(公告)日：2014-01-09
申请号：US13620352
申请日：2012-09-14
申请人： Yoo Sam NA , Kang Yoon Lee , Young Gun Pu , Hyung Gu Park , Hong Jin Kim , Yoo Hwan Kim , Dong Su Lee
发明人： Yoo Sam NA , Kang Yoon Lee , Young Gun Pu , Hyung Gu Park , Hong Jin Kim , Yoo Hwan Kim , Dong Su Lee
IPC分类号： H03M1/12 , H03M1/06
CPC分类号： H03M1/06 , H03M1/502
摘要： There are provided an analog-to-digital signal conversion method and apparatus therefor, and a digital phase locked loop circuit including the same. The analog-to-digital signal conversion method may include: generating a first digital output signal having N number of bits by comparing each of N number of delay signals detected from output terminals of N number of delay cells with a reference signal; generating a second digital output signal by comparing an auxiliary delay signal generated by an (N+1)th delay cell with the reference signal; and determining a change in a delay time of each of the N number of delay cells based on the first digital output signal and the second digital output signal.
摘要翻译：提供了一种模拟 - 数字信号转换方法及其装置，以及包括该数字锁相环电路的数字锁相环电路。模数信号转换方法可以包括：通过将从N个延迟单元的输出端子检测的N个延迟信号中的每一个与参考信号相比较来产生具有N个比特数的第一数字输出信号; 通过将由第（N + 1）个延迟单元产生的辅助延迟信号与参考信号进行比较来产生第二数字输出信号; 以及基于所述第一数字输出信号和所述第二数字输出信号确定所述N个延迟单元中的每一个的延迟时间的变化。

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