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1. 发明申请

US20070164374A1 Molecular memory devices including solid-state dielectric layers and related methods 失效
标题翻译：分子存储器件包括固态介质层和相关方法
公开(公告)号：US20070164374A1
公开(公告)日：2007-07-19
申请号：US11607503
申请日：2006-11-30
申请人： Veena Misra , Ritu Shrivastava , Zhong Chen , Guru Mathur
发明人： Veena Misra , Ritu Shrivastava , Zhong Chen , Guru Mathur
IPC分类号： H01L29/76 , H01L21/336
CPC分类号： H01L51/0591 , B82Y10/00 , G11C11/005 , G11C13/0009 , G11C13/0016 , G11C13/0033 , G11C13/0069 , G11C16/3431 , H01L51/0558 , H01L51/0595 , Y10S977/809 , Y10S977/932 , Y10S977/936 , Y10S977/943
摘要： According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.
摘要翻译：根据一些实施例，制品包括基底; 所述底物上的分子层包含通过分子连接基与所述底物偶联的至少一个电荷存储分子; 直接在分子层上的固体阻挡介电层; 以及直接在固体阻挡介电层上的导电层。在一些实施例中，固体阻挡介电层被配置为当电压施加到导电层时，跨越分子层提供大于固体阻挡介电层上的电压降的电压降。在一些实施例中，分子层的厚度大于固体阻挡介电层的厚度。该制品在分子层和导电层之间不含电解质。

2. 发明授权

US07642546B2 Molecular memory devices including solid-state dielectric layers and related methods 失效
标题翻译：分子存储器件包括固态介质层和相关方法
公开(公告)号：US07642546B2
公开(公告)日：2010-01-05
申请号：US11607503
申请日：2006-11-30
申请人： Veena Misra , Ritu Shrivastava , Zhong Chen , Guru Mathur
发明人： Veena Misra , Ritu Shrivastava , Zhong Chen , Guru Mathur
IPC分类号： H01L35/24
CPC分类号： H01L51/0591 , B82Y10/00 , G11C11/005 , G11C13/0009 , G11C13/0016 , G11C13/0033 , G11C13/0069 , G11C16/3431 , H01L51/0558 , H01L51/0595 , Y10S977/809 , Y10S977/932 , Y10S977/936 , Y10S977/943
摘要： According to some embodiments, an article of manufacture comprises a substrate; a molecular layer on the substrate comprising at least one charge storage molecule coupled to the substrate by a molecular linker; a solid barrier dielectric layer directly on the molecular layer; and a conductive layer directly on the solid barrier dielectric layer. In some embodiments, the solid barrier dielectric layer is configured to provide a voltage drop across the molecular layer that is greater than a voltage drop across the solid barrier dielectric layer when a voltage is applied to the conductive layer. In some embodiments, the molecular layer has a thickness greater than that of the solid barrier dielectric layer. The article of manufacture contains no electrolyte between the molecular layer and the conductive layer.
摘要翻译：根据一些实施例，制品包括基底; 所述底物上的分子层包含通过分子连接基与所述底物偶联的至少一个电荷存储分子; 直接在分子层上的固体阻挡介电层; 以及直接在固体阻挡介电层上的导电层。在一些实施例中，固体阻挡介电层被配置为当电压施加到导电层时，跨越分子层提供大于固体阻挡介电层上的电压降的电压降。在一些实施例中，分子层的厚度大于固体阻挡介电层的厚度。该制品在分子层和导电层之间不含电解质。

3. 发明授权

US06958485B2 Hybrid molecular memory devices and methods of use thereof 失效
标题翻译：混合分子记忆装置及其使用方法
公开(公告)号：US06958485B2
公开(公告)日：2005-10-25
申请号：US10729144
申请日：2003-12-05
申请人： Veena Misra , Srivardhan Gowda , Guru Mathur
发明人： Veena Misra , Srivardhan Gowda , Guru Mathur
IPC分类号： G11C13/02 , H01L51/00 , H01L51/30 , H01L29/06
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0009 , G11C2213/15 , H01L27/285 , H01L51/0077 , H01L51/0595
摘要： The present invention provides hybrid microelectronic memory device, comprising: (a) a substrate having a surface, a first region of first work function adjacent the surface, and a second region of second work function adjacent the surface and adjacent the first region; (b) a film comprising redox-active molecules on the first and second regions; and (c) an electrode connected to the film. The present invention further provides a hybrid microelectronic memory device, comprising: (a) a substrate having surface and a structure or region such as a diode for increasing the retention time of the device formed adjacent the surface; (b) a film comprising redox-active molecules on or associated with the region or structure; and (c) an electrode connected to the redox active molecules opposite the substrate surface. Methods of using such devices are also described.
摘要翻译：本发明提供了一种混合式微电子存储装置，包括：（a）具有表面，邻近表面的第一功函数的第一区域和与表面相邻并邻近第一区域的第二功能函数的第二区域的衬底; （b）在第一和第二区域上包含氧化还原活性分子的膜; 和（c）连接到膜的电极。本发明还提供了一种混合微电子存储器件，包括：（a）具有表面和诸如二极管的结构或区域的衬底的衬底，用于增加邻近表面形成的器件的保留时间; （b）在该区域或结构上或与该区域或结构相关联的包含氧化还原活性分子的膜; 和（c）连接到与衬底表面相对的氧化还原活性分子的电极。还描述了使用这种装置的方法。

4. 发明申请

US20050121660A1 Hybrid molecular memory devices and methods of use thereof 失效
公开(公告)号：US20050121660A1
公开(公告)日：2005-06-09
申请号：US10729144
申请日：2003-12-05
申请人： Veena Misra , Srivardhan Gowda , Guru Mathur
发明人： Veena Misra , Srivardhan Gowda , Guru Mathur
IPC分类号： G11C13/02 , H01L51/00 , H01L51/30 , H01L29/06
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0009 , G11C2213/15 , H01L27/285 , H01L51/0077 , H01L51/0595
摘要： The present invention provides hybrid microelectronic memory device, comprising: (a) a substrate having a surface, a first region of first work function adjacent the surface, and a second region of second work function adjacent the surface and adjacent the first region; (b) a film comprising redox-active molecules on the first and second regions; and (c) an electrode connected to the film. The present invention further provides a hybrid microelectronic memory device, comprising: (a) a substrate having surface and a structure or region such as a diode for increasing the retention time of the device formed adjacent the surface; (b) a film comprising redox-active molecules on or associated with the region or structure; and (c) an electrode connected to the redox active molecules opposite the substrate surface. Methods of using such devices are also described.

5. 发明授权

US07312100B2 In situ patterning of electrolyte for molecular information storage devices 有权
标题翻译：用于分子信息存储设备的电解质原位图案化
公开(公告)号：US07312100B2
公开(公告)日：2007-12-25
申请号：US10837028
申请日：2004-04-30
申请人： David F. Bocian , Werner G. Kuhr , Jonathan S. Lindsey , Veena Misra
发明人： David F. Bocian , Werner G. Kuhr , Jonathan S. Lindsey , Veena Misra
IPC分类号： H01L51/40
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0009 , H01L51/0021 , H01L51/005 , H01L51/0077 , H01L51/0595 , Y10S977/896 , Y10S977/943
摘要： This invention pertains to methods assembly of organic molecules and electrolytes in hybrid electronic. In one embodiment, a method is provided that involves contacting a surface/electrode with a compound of formula: R-L2-M-L1-Z1 where Z1 is a surface attachment group; L1 and L2 are independently linker or covalent bonds; M is an information storage molecule; and R is a protected or unprotected reactive site or group; where the contacting results in attachment of the redox-active moiety to the surface via the surface attachment group; and ii) contacting the surface-attached information storage molecule with an electrolyte having the formula: J-Q where J is a charged moiety (e.g., an electrolyte); and Q is a reactive group that is reactive with the reactive group (R) and attaches J to the information storage molecule thereby patterning the electrolyte on the surface.
摘要翻译：本发明涉及混合电子中有机分子和电解质的组装方法。在一个实施方案中，提供了一种方法，其涉及使表面/电极与下式化合物接触：RL 2 -ML 1 -Z 1 / 其中Z 1是表面附着基团; L 1和L 2独立地是连接基或共价键; M是信息存储分子; 并且R是被保护或未被保护的反应性位点或基团; 其中所述接触导致通过所述表面附着基团将所述氧化还原活性部分附着到所述表面; 和ii）使表面附着的信息存储分子与具有下式的电解质接触：J-Q其中J是带电部分（例如电解质）; 并且Q是与反应性基团（R）反应并且将J附着到信息存储分子的反应性基团，从而对表面上的电解质进行图案化。

6. 发明申请

US20070212897A1 HIGH-TEMPERATURE ATTACHMENT OF ORGANIC MOLECULES TO SUBSTRATES 失效
标题翻译：有机分子与基底的高温连接
公开(公告)号：US20070212897A1
公开(公告)日：2007-09-13
申请号：US11688194
申请日：2007-03-19
申请人： David Bocian , Jonathan Lindsey , Zhiming Liu , Amir Yasseri , Veena Misra , Qian Zhao , Qiliang Li , Shyam Surthi , Robert Loewe
发明人： David Bocian , Jonathan Lindsey , Zhiming Liu , Amir Yasseri , Veena Misra , Qian Zhao , Qiliang Li , Shyam Surthi , Robert Loewe
IPC分类号： H01L21/469
CPC分类号： H01L51/0002 , B82Y10/00 , G11B9/14 , G11B9/149 , G11C13/0014 , G11C13/0016 , H01L51/0008 , H01L51/001 , H01L51/0026 , H01L51/0075 , H01L51/0077 , H01L51/0595 , H01L51/4213 , H01M4/60 , H01M14/005 , Y02E10/549
摘要： This invention provides a new procedure for attaching molecules to semiconductor surfaces, in particular silicon. The molecules, which include, but are not limited to porphyrins and ferrocenes, have been previously shown to be attractive candidates for molecular-based information storage. The new attachment procedure is simple, can be completed in short times, requires minimal amounts of material, is compatible with diverse molecular functional groups, and in some instances affords unprecedented attachment motifs. These features greatly enhance the integration of the molecular materials into the processing steps that are needed to create hybrid molecular/semiconductor information storage devices.
摘要翻译：本发明提供了一种将分子连接到半导体表面，特别是硅的新方法。以前已经显示出包括但不限于卟啉和二茂铁的分子是用于基于分子的信息存储的有吸引力的候选物。新的附件程序简单，可以在短时间内完成，需要最少量的材料，与不同的分子官能团相容，并在某些情况下提供前所未有的附着图案。这些特征大大增强了分子材料与创建混合分子/半导体信息存储设备所需的处理步骤的集成。

7. 发明授权

US07253466B2 Crossbar array microelectronic electrochemical cells 失效
标题翻译：交叉阵列微电子电化学电池
公开(公告)号：US07253466B2
公开(公告)日：2007-08-07
申请号：US11166938
申请日：2005-06-24
申请人： Veena Misra , John Damiano, Jr.
发明人： Veena Misra , John Damiano, Jr.
IPC分类号： H01L29/76
CPC分类号： G11C13/0014 , B82Y10/00 , G11C13/0016 , G11C13/02 , G11C2213/77 , Y10T29/49108 , Y10T29/49115
摘要： The present invention provides microelectronic electrochemical structures and related fabrication methods. A composite microelectronic structure is provided that includes first and second conductors dielectrically isolated from one another at a crossing thereof, the crossing surrounded by a dielectric material. A portion of the dielectric material around the crossing of the first and second conductors is removed to form a well that exposes respective outer surfaces of the first and second conductors and a molecule is deposited in the well such that the deposited molecule contacts the exposed outer surfaces of the first and second conductors.
摘要翻译：本发明提供微电子电化学结构和相关制造方法。提供了复合微电子结构，其包括在其交叉处彼此介电隔离的第一和第二导体，所述交叉被电介质材料包围。除去第一和第二导体的交叉点周围的电介质材料的一部分以形成露出第一和第二导体的相应外表面的阱，并且分子沉积在阱中，使得沉积的分子接触暴露的外表面的第一和第二导体。

8. 发明申请

US20050062097A1 Method and system for molecular charge storage field effect transistor 审中-公开
标题翻译：分子电荷存储场效应晶体管的方法和系统
公开(公告)号：US20050062097A1
公开(公告)日：2005-03-24
申请号：US10498743
申请日：2002-12-12
申请人： Veena Misra , David Bocian , Werner Kuhr , Jonathan Lindsey
发明人： Veena Misra , David Bocian , Werner Kuhr , Jonathan Lindsey
IPC分类号： H01L21/8247 , G11C11/56 , G11C13/02 , H01L27/115 , H01L27/28 , H01L29/788 , H01L29/792 , H01L51/05
CPC分类号： H01L27/283 , B82Y10/00 , G11C11/5664 , G11C13/0009 , G11C13/0014 , G11C13/0016 , G11C2213/53 , H01L51/052 , H01L51/0529 , Y10S977/721 , Y10S977/887 , Y10S977/937
摘要： A method and/or system and/or apparatus for a molecular-based FET device (an m-FET) uses charge storing molecules (120) between a gate (110) and channel (105) of an FET-type transistor. Further embodiments describe fabrication methods for using combinations of standard practices in lithography and synthetic chemistry and novel elements.
摘要翻译：用于分子型FET器件（m-FET）的方法和/或系统和/或设备在FET型晶体管的栅极（110）和沟道（105）之间使用电荷存储分子（120）。另外的实施例描述了使用光刻和合成化学中的标准实践的组合以及新颖元件的制造方法。

9. 发明授权

US08529996B2 High-temperature attachment of organic molecules to substrates 失效
标题翻译：将有机分子高温附着于底物
公开(公告)号：US08529996B2
公开(公告)日：2013-09-10
申请号：US11688194
申请日：2007-03-19
申请人： David F. Bocian , Jonathan S. Lindsey , Zhiming Liu , Amir A. Yasseri , Veena Misra , Qian Zhao , Qiliang Li , Shyam Surthi , Robert S. Loewe
发明人： David F. Bocian , Jonathan S. Lindsey , Zhiming Liu , Amir A. Yasseri , Veena Misra , Qian Zhao , Qiliang Li , Shyam Surthi , Robert S. Loewe
IPC分类号： C23C16/00
CPC分类号： H01L51/0002 , B82Y10/00 , G11B9/14 , G11B9/149 , G11C13/0014 , G11C13/0016 , H01L51/0008 , H01L51/001 , H01L51/0026 , H01L51/0075 , H01L51/0077 , H01L51/0595 , H01L51/4213 , H01M4/60 , H01M14/005 , Y02E10/549
摘要： This invention provides a new procedure for attaching molecules to semiconductor surfaces, in particular silicon. The molecules, which include, but are not limited to porphyrins and ferrocenes, have been previously shown to be attractive candidates for molecular-based information storage. The new attachment procedure is simple, can be completed in short times, requires minimal amounts of material, is compatible with diverse molecular functional groups, and in some instances affords unprecedented attachment motifs. These features greatly enhance the integration of the molecular materials into the processing steps that are needed to create hybrid molecular/semiconductor information storage devices.
摘要翻译：本发明提供了一种将分子连接到半导体表面，特别是硅的新方法。以前已经显示出包括但不限于卟啉和二茂铁的分子是用于基于分子的信息存储的有吸引力的候选物。新的附件程序简单，可以在短时间内完成，需要最少量的材料，与不同的分子官能团相容，并在某些情况下提供前所未有的附着图案。这些特征大大增强了分子材料与创建混合分子/半导体信息存储设备所需的处理步骤的集成。

10. 发明授权

US07265375B2 Optoelectonic devices having arrays of quantum-dot compound semiconductor superlattices therein 有权
标题翻译：具有量子点化合物半导体超晶格阵列的光电器件
公开(公告)号：US07265375B2
公开(公告)日：2007-09-04
申请号：US11065085
申请日：2005-02-24
申请人： Zhibo Zhang , Veena Misra , Salah M. A. Bedair , Mehmet Ozturk
发明人： Zhibo Zhang , Veena Misra , Salah M. A. Bedair , Mehmet Ozturk
IPC分类号： H01L29/12
CPC分类号： H01L29/0665 , B82Y10/00 , H01L21/02381 , H01L21/02395 , H01L21/02463 , H01L21/02488 , H01L21/02546 , H01L21/0262 , H01L21/02642 , H01L29/0673 , H01L29/0676 , H01L29/068 , H01L29/125 , H01L29/127 , Y10S977/762
摘要： Methods of forming a nano-scale electronic and optoelectronic devices include forming a substrate having a semiconductor layer therein and a substrate insulating layer on the semiconductor layer. An etching template having a first array of non-photolithographically defined nano-channels extending therethrough, is formed on the substrate insulating layer. This etching template may comprise an anodized metal oxide, such as an anodized aluminum oxide (AAO) thin film. The substrate insulating layer is then selectively etched to define a second array of nano-channels therein. This selective etching step preferably uses the etching template as an etching mask to transfer the first array of nano-channels to the underlying substrate insulating layer, which may be thinner than the etching template. An array of semiconductor nano-pillars is then formed in the second array of nano-channels. The semiconductor nano-pillars in the array may have an average diameter in a range between about 8 nm and about 50 nm. The semiconductor nano-pillars are also preferably homoepitaxial or heteroepitaxial with the semiconductor layer.
摘要翻译：形成纳米级电子和光电子器件的方法包括在其中形成其中具有半导体层的衬底和在半导体层上的衬底绝缘层。在衬底绝缘层上形成具有非光刻限定的纳米通道的第一阵列的蚀刻模板。该蚀刻模板可以包括阳极氧化的金属氧化物，例如阳极氧化的氧化铝（AAO）薄膜。然后选择性地蚀刻衬底绝缘层以在其中限定纳米通道的第二阵列。该选择蚀刻步骤优选使用蚀刻模板作为蚀刻掩模，将第一纳米通道阵列转移到下面的衬底绝缘层，其可以比蚀刻模板更薄。然后在第二纳米通道阵列中形成半导体纳米柱阵列。阵列中的半导体纳米柱可以具有在约8nm和约50nm之间的范围内的平均直径。半导体纳米柱也优选与半导体层同质外延或异质外延。

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